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Side by Side Diff: test/CodeGen/X86/fast-isel-x86-64.ll

Issue 647443005: Change usage of naclcall and nacljmp pseudo-instructions to match x86 gas (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: remove NACL_call32d and auto-align bare call Created 6 years, 2 months ago
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1 ; RUN: llc < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbo se=0 -fast-isel-abort | FileCheck %s 1 ; RUN: llc < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbo se=0 -fast-isel-abort | FileCheck %s
2 ; RUN: llc < %s -mattr=+avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbo se=0 -fast-isel-abort | FileCheck %s --check-prefix=AVX 2 ; RUN: llc < %s -mattr=+avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbo se=0 -fast-isel-abort | FileCheck %s --check-prefix=AVX
3 ; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort -m triple=x86_64-none-nacl | FileCheck %s --check-prefix=NACL64 3 ; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort -m triple=x86_64-none-nacl | FileCheck %s --check-prefix=NACL64
4 ; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort -m triple=x86_64-none-nacl -relocation-model=pic | FileCheck %s --check-prefix=NACL 64_PIC 4 ; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort -m triple=x86_64-none-nacl -relocation-model=pic | FileCheck %s --check-prefix=NACL 64_PIC
5 5
6 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 2:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:6 4" 6 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 2:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:6 4"
7 target triple = "x86_64-apple-darwin10.0.0" 7 target triple = "x86_64-apple-darwin10.0.0"
8 8
9 ; Make sure that fast-isel folds the immediate into the binop even though it 9 ; Make sure that fast-isel folds the immediate into the binop even though it
10 ; is non-canonical. 10 ; is non-canonical.
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
49 } 49 }
50 50
51 ; NACL64 version uses i32 for 32-bit pointers. 51 ; NACL64 version uses i32 for 32-bit pointers.
52 define i32 @test3_nacl64() nounwind { 52 define i32 @test3_nacl64() nounwind {
53 %A = ptrtoint i32* @G to i32 53 %A = ptrtoint i32* @G to i32
54 ret i32 %A 54 ret i32 %A
55 55
56 ; NACL64_PIC: test3_nacl64: 56 ; NACL64_PIC: test3_nacl64:
57 ; NACL64_PIC: movl G@GOTPCREL(%rip), %eax 57 ; NACL64_PIC: movl G@GOTPCREL(%rip), %eax
58 ; NACL64_PIC-NEXT: popq %r11 58 ; NACL64_PIC-NEXT: popq %r11
59 ; NACL64_PIC-NEXT: nacljmp %r11, %r15 59 ; NACL64_PIC-NEXT: nacljmp %r11d, %r15
60 } 60 }
61 61
62 62
63 ; rdar://9289558 63 ; rdar://9289558
64 @rtx_length = external global [153 x i8] 64 @rtx_length = external global [153 x i8]
65 65
66 define i32 @test4(i64 %idxprom9) nounwind { 66 define i32 @test4(i64 %idxprom9) nounwind {
67 %arrayidx10 = getelementptr inbounds [153 x i8]* @rtx_length, i32 0, i64 %idxp rom9 67 %arrayidx10 = getelementptr inbounds [153 x i8]* @rtx_length, i32 0, i64 %idxp rom9
68 %tmp11 = load i8* %arrayidx10, align 1 68 %tmp11 = load i8* %arrayidx10, align 1
69 %conv = zext i8 %tmp11 to i32 69 %conv = zext i8 %tmp11 to i32
(...skipping 240 matching lines...) Expand 10 before | Expand all | Expand 10 after
310 %b = call i8* @foo23() 310 %b = call i8* @foo23()
311 ret void 311 ret void
312 ; CHECK-LABEL: test23: 312 ; CHECK-LABEL: test23:
313 ; CHECK: call 313 ; CHECK: call
314 ; CHECK: movq %rdi, %rax 314 ; CHECK: movq %rdi, %rax
315 ; CHECK: ret 315 ; CHECK: ret
316 ; NACL64: test23: 316 ; NACL64: test23:
317 ; NACL64: call 317 ; NACL64: call
318 ; NACL64: movl %edi, %eax 318 ; NACL64: movl %edi, %eax
319 ; NACL64: popq %r11 319 ; NACL64: popq %r11
320 ; NACL64: nacljmp %r11, %r15 320 ; NACL64: nacljmp %r11d, %r15
321 } 321 }
322 322
323 declare i8* @foo23() 323 declare i8* @foo23()
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