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1 ; Tests various aspects of i1 related lowering. | 1 ; Tests various aspects of i1 related lowering. |
2 | 2 |
3 ; RUN: %p2i -i %s -a -O2 --verbose none \ | 3 ; RUN: %p2i -i %s -a -O2 --verbose none \ |
4 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ | 4 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
5 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s | 5 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s |
6 ; RUN: %p2i -i %s -a -Om1 --verbose none \ | 6 ; RUN: %p2i -i %s -a -Om1 --verbose none \ |
7 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ | 7 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s | 8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s |
9 ; RUN: %p2i -i %s -a --verbose none | FileCheck --check-prefix=ERRORS %s | 9 ; RUN: %p2i -i %s -a --verbose none | FileCheck --check-prefix=ERRORS %s |
10 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s | 10 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s |
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56 define internal i32 @testZextI8(i32 %arg) { | 56 define internal i32 @testZextI8(i32 %arg) { |
57 entry: | 57 entry: |
58 %arg_i1 = trunc i32 %arg to i1 | 58 %arg_i1 = trunc i32 %arg to i1 |
59 %result_i8 = zext i1 %arg_i1 to i8 | 59 %result_i8 = zext i1 %arg_i1 to i8 |
60 %result = zext i8 %result_i8 to i32 | 60 %result = zext i8 %result_i8 to i32 |
61 ret i32 %result | 61 ret i32 %result |
62 } | 62 } |
63 ; CHECK-LABEL: testZextI8 | 63 ; CHECK-LABEL: testZextI8 |
64 ; match the trunc instruction | 64 ; match the trunc instruction |
65 ; CHECK: and {{.*}}, 1 | 65 ; CHECK: and {{.*}}, 1 |
66 ; match the zext i1 instruction | 66 ; match the zext i1 instruction (NOTE: no mov need between i1 and i8). |
67 ; CHECK: movzx | |
68 ; CHECK: and {{.*}}, 1 | 67 ; CHECK: and {{.*}}, 1 |
69 | 68 |
70 ; Test zext to i16. | 69 ; Test zext to i16. |
71 define internal i32 @testZextI16(i32 %arg) { | 70 define internal i32 @testZextI16(i32 %arg) { |
72 entry: | 71 entry: |
73 %arg_i1 = trunc i32 %arg to i1 | 72 %arg_i1 = trunc i32 %arg to i1 |
74 %result_i16 = zext i1 %arg_i1 to i16 | 73 %result_i16 = zext i1 %arg_i1 to i16 |
75 %result = zext i16 %result_i16 to i32 | 74 %result = zext i16 %result_i16 to i32 |
76 ret i32 %result | 75 ret i32 %result |
77 } | 76 } |
78 ; CHECK-LABEL: testZextI16 | 77 ; CHECK-LABEL: testZextI16 |
79 ; match the trunc instruction | 78 ; match the trunc instruction |
80 ; CHECK: and {{.*}}, 1 | 79 ; CHECK: and {{.*}}, 1 |
81 ; match the zext i1 instruction | 80 ; match the zext i1 instruction (note 32-bit reg is used because it's shorter). |
82 ; CHECK: movzx | 81 ; CHECK: movzx [[REG:e.*]], {{[a-d]l|byte ptr}} |
83 ; CHECK: and {{.*}}, 1 | 82 ; CHECK: and [[REG]], 1 |
84 | 83 |
85 ; Test zext to i32. | 84 ; Test zext to i32. |
86 define internal i32 @testZextI32(i32 %arg) { | 85 define internal i32 @testZextI32(i32 %arg) { |
87 entry: | 86 entry: |
88 %arg_i1 = trunc i32 %arg to i1 | 87 %arg_i1 = trunc i32 %arg to i1 |
89 %result_i32 = zext i1 %arg_i1 to i32 | 88 %result_i32 = zext i1 %arg_i1 to i32 |
90 ret i32 %result_i32 | 89 ret i32 %result_i32 |
91 } | 90 } |
92 ; CHECK-LABEL: testZextI32 | 91 ; CHECK-LABEL: testZextI32 |
93 ; match the trunc instruction | 92 ; match the trunc instruction |
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131 entry: | 130 entry: |
132 %arg_i1 = trunc i32 %arg to i1 | 131 %arg_i1 = trunc i32 %arg to i1 |
133 %result_i16 = sext i1 %arg_i1 to i16 | 132 %result_i16 = sext i1 %arg_i1 to i16 |
134 %result = sext i16 %result_i16 to i32 | 133 %result = sext i16 %result_i16 to i32 |
135 ret i32 %result | 134 ret i32 %result |
136 } | 135 } |
137 ; CHECK-LABEL: testSextI16 | 136 ; CHECK-LABEL: testSextI16 |
138 ; match the trunc instruction | 137 ; match the trunc instruction |
139 ; CHECK: and {{.*}}, 1 | 138 ; CHECK: and {{.*}}, 1 |
140 ; match the sext i1 instruction | 139 ; match the sext i1 instruction |
141 ; CHECK: movzx [[REG:.*]], | 140 ; CHECK: movzx e[[REG:.*]], {{[a-d]l|byte ptr}} |
142 ; CHECK-NEXT: shl [[REG]], 15 | 141 ; CHECK-NEXT: shl [[REG]], 15 |
143 ; CHECK-NEXT: sar [[REG]], 15 | 142 ; CHECK-NEXT: sar [[REG]], 15 |
144 | 143 |
145 ; Test sext to i32. | 144 ; Test sext to i32. |
146 define internal i32 @testSextI32(i32 %arg) { | 145 define internal i32 @testSextI32(i32 %arg) { |
147 entry: | 146 entry: |
148 %arg_i1 = trunc i32 %arg to i1 | 147 %arg_i1 = trunc i32 %arg to i1 |
149 %result_i32 = sext i1 %arg_i1 to i32 | 148 %result_i32 = sext i1 %arg_i1 to i32 |
150 ret i32 %result_i32 | 149 ret i32 %result_i32 |
151 } | 150 } |
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195 } | 194 } |
196 ; CHECK-LABEL: testFptosiDouble | 195 ; CHECK-LABEL: testFptosiDouble |
197 ; CHECK: cvttsd2si | 196 ; CHECK: cvttsd2si |
198 ; CHECK: and {{.*}}, 1 | 197 ; CHECK: and {{.*}}, 1 |
199 ; CHECK: movzx [[REG:.*]], | 198 ; CHECK: movzx [[REG:.*]], |
200 ; CHECK-NEXT: shl [[REG]], 31 | 199 ; CHECK-NEXT: shl [[REG]], 31 |
201 ; CHECK-NEXT: sar [[REG]], 31 | 200 ; CHECK-NEXT: sar [[REG]], 31 |
202 | 201 |
203 ; ERRORS-NOT: ICE translation error | 202 ; ERRORS-NOT: ICE translation error |
204 ; DUMP-NOT: SZ | 203 ; DUMP-NOT: SZ |
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