Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(157)

Side by Side Diff: tests_lit/llvm2ice_tests/8bit.pnacl.ll

Issue 647193003: emitIAS for store and indirect calls. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: stuff Created 6 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 ; This tries to be a comprehensive test of i8 operations. 1 ; This tries to be a comprehensive test of i8 operations.
2 2
3 ; RUN: %p2i -i %s --args -O2 --verbose none \ 3 ; RUN: %p2i -i %s --args -O2 --verbose none \
4 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ 4 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
5 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s 5 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
6 ; RUN: %p2i -i %s --args -Om1 --verbose none \ 6 ; RUN: %p2i -i %s --args -Om1 --verbose none \
7 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ 7 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s 8 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
9 ; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s 9 ; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s
10 10
(...skipping 258 matching lines...) Expand 10 before | Expand all | Expand 10 after
269 %a_8 = trunc i32 %a to i8 269 %a_8 = trunc i32 %a to i8
270 %bptr = inttoptr i32 %b_iptr to i8* 270 %bptr = inttoptr i32 %b_iptr to i8*
271 %b_8 = load i8* %bptr, align 1 271 %b_8 = load i8* %bptr, align 1
272 %icmp = icmp ne i8 %a_8, %b_8 272 %icmp = icmp ne i8 %a_8, %b_8
273 %ret = zext i1 %icmp to i32 273 %ret = zext i1 %icmp to i32
274 ret i32 %ret 274 ret i32 %ret
275 } 275 }
276 ; CHECK-LABEL: icmp8BitMemSwapped 276 ; CHECK-LABEL: icmp8BitMemSwapped
277 ; CHECK: cmp {{[abcd]l|byte ptr}} 277 ; CHECK: cmp {{[abcd]l|byte ptr}}
278 278
279 define internal i32 @selectI8Var(i32 %a, i32 %b) {
280 entry:
281 %a_8 = trunc i32 %a to i8
282 %b_8 = trunc i32 %b to i8
283 %cmp = icmp slt i8 %a_8, %b_8
284 %ret = select i1 %cmp, i8 %a_8, i8 %b_8
285 %ret_ext = zext i8 %ret to i32
286 ret i32 %ret_ext
287 }
288 ; CHECK-LABEL: selectI8Var
289 ; CHECK: cmp
290 ; CHECK: jl
291 ; CHECK: mov {{[a-d]l}}
292
279 define internal i32 @testPhi8(i32 %arg, i32 %arg2, i32 %arg3, i32 %arg4, i32 %ar g5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %arg10) { 293 define internal i32 @testPhi8(i32 %arg, i32 %arg2, i32 %arg3, i32 %arg4, i32 %ar g5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %arg10) {
280 entry: 294 entry:
281 %trunc = trunc i32 %arg to i8 295 %trunc = trunc i32 %arg to i8
282 %trunc2 = trunc i32 %arg2 to i8 296 %trunc2 = trunc i32 %arg2 to i8
283 %trunc3 = trunc i32 %arg3 to i8 297 %trunc3 = trunc i32 %arg3 to i8
284 %trunc4 = trunc i32 %arg4 to i8 298 %trunc4 = trunc i32 %arg4 to i8
285 %trunc5 = trunc i32 %arg5 to i8 299 %trunc5 = trunc i32 %arg5 to i8
286 %cmp1 = icmp sgt i32 %arg, 0 300 %cmp1 = icmp sgt i32 %arg, 0
287 br i1 %cmp1, label %next, label %target 301 br i1 %cmp1, label %next, label %target
288 next: 302 next:
(...skipping 19 matching lines...) Expand all
308 %res123 = select i1 %merge1, i8 %merge6, i8 %res1_2 322 %res123 = select i1 %merge1, i8 %merge6, i8 %res1_2
309 %result = zext i8 %res123 to i32 323 %result = zext i8 %res123 to i32
310 ret i32 %result 324 ret i32 %result
311 } 325 }
312 ; CHECK-LABEL: testPhi8 326 ; CHECK-LABEL: testPhi8
313 ; This assumes there will be some copy from an 8-bit register / stack slot. 327 ; This assumes there will be some copy from an 8-bit register / stack slot.
314 ; CHECK-DAG: mov {{.*}}, {{[a-d]}}l 328 ; CHECK-DAG: mov {{.*}}, {{[a-d]}}l
315 ; CHECK-DAG: mov {{.*}}, byte ptr 329 ; CHECK-DAG: mov {{.*}}, byte ptr
316 ; CHECK-DAG: mov byte ptr {{.*}} 330 ; CHECK-DAG: mov byte ptr {{.*}}
317 331
332 @global8 = internal global [1 x i8] c"\01", align 4
333
334 define i32 @load_i8(i32 %addr_arg) {
335 entry:
336 %addr = inttoptr i32 %addr_arg to i8*
337 %ret = load i8* %addr, align 1
338 %ret_ext = zext i8 %ret to i32
339 ret i32 %ret_ext
340 }
341 ; CHECK-LABEL: load_i8
342 ; CHECK: mov {{[a-d]l}}, byte ptr
343
344 define i32 @load_i8_global(i32 %addr_arg) {
345 entry:
346 %addr = bitcast [1 x i8]* @global8 to i8*
347 %ret = load i8* %addr, align 1
348 %ret_ext = zext i8 %ret to i32
349 ret i32 %ret_ext
350 }
351 ; CHECK-LABEL: load_i8_global
352 ; CHECK: mov {{[a-d]l}}, byte ptr
353
354 define void @store_i8(i32 %addr_arg, i32 %val) {
355 entry:
356 %val_trunc = trunc i32 %val to i8
357 %addr = inttoptr i32 %addr_arg to i8*
358 store i8 %val_trunc, i8* %addr, align 1
359 ret void
360 }
361 ; CHECK-LABEL: store_i8
362 ; CHECK: mov byte ptr {{.*}}, {{[a-d]l}}
363
364 define void @store_i8_const(i32 %addr_arg) {
365 entry:
366 %addr = inttoptr i32 %addr_arg to i8*
367 store i8 123, i8* %addr, align 1
368 ret void
369 }
370 ; CHECK-LABEL: store_i8_const
371 ; CHECK: mov byte ptr {{.*}}, 123
372
318 ; ERRORS-NOT: ICE translation error 373 ; ERRORS-NOT: ICE translation error
319 ; DUMP-NOT: SZ 374 ; DUMP-NOT: SZ
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698