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Issue 646923003: MIPS: Fix loading Float64 constants in turbofan. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/v8.h" 5 #include "src/v8.h"
6 6
7 #if V8_TARGET_ARCH_MIPS 7 #if V8_TARGET_ARCH_MIPS
8 8
9 #include "src/base/bits.h" 9 #include "src/base/bits.h"
10 #include "src/bootstrapper.h" 10 #include "src/bootstrapper.h"
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1245 // args 1245 // args
1246 1246
1247 ProfileEntryHookStub::MaybeCallEntryHook(masm); 1247 ProfileEntryHookStub::MaybeCallEntryHook(masm);
1248 1248
1249 // Save callee saved registers on the stack. 1249 // Save callee saved registers on the stack.
1250 __ MultiPush(kCalleeSaved | ra.bit()); 1250 __ MultiPush(kCalleeSaved | ra.bit());
1251 1251
1252 // Save callee-saved FPU registers. 1252 // Save callee-saved FPU registers.
1253 __ MultiPushFPU(kCalleeSavedFPU); 1253 __ MultiPushFPU(kCalleeSavedFPU);
1254 // Set up the reserved register for 0.0. 1254 // Set up the reserved register for 0.0.
1255 __ Move(kDoubleRegZero, 0.0); 1255 __ Move(kDoubleRegZero, 0.0, true);
1256 1256
1257 1257
1258 // Load argv in s0 register. 1258 // Load argv in s0 register.
1259 int offset_to_argv = (kNumCalleeSaved + 1) * kPointerSize; 1259 int offset_to_argv = (kNumCalleeSaved + 1) * kPointerSize;
1260 offset_to_argv += kNumCalleeSavedFPU * kDoubleSize; 1260 offset_to_argv += kNumCalleeSavedFPU * kDoubleSize;
1261 1261
1262 __ InitializeRootRegister(); 1262 __ InitializeRootRegister();
1263 __ lw(s0, MemOperand(sp, offset_to_argv + kCArgsSlotsSize)); 1263 __ lw(s0, MemOperand(sp, offset_to_argv + kCArgsSlotsSize));
1264 1264
1265 // We build an EntryFrame. 1265 // We build an EntryFrame.
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4898 MemOperand(fp, 6 * kPointerSize), 4898 MemOperand(fp, 6 * kPointerSize),
4899 NULL); 4899 NULL);
4900 } 4900 }
4901 4901
4902 4902
4903 #undef __ 4903 #undef __
4904 4904
4905 } } // namespace v8::internal 4905 } } // namespace v8::internal
4906 4906
4907 #endif // V8_TARGET_ARCH_MIPS 4907 #endif // V8_TARGET_ARCH_MIPS
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