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Side by Side Diff: src/compiler/code-generator-impl.h

Issue 646393002: [turbofan] remove some of the dependency of Instruction on Schedule (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 2 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_CODE_GENERATOR_IMPL_H_ 5 #ifndef V8_COMPILER_CODE_GENERATOR_IMPL_H_
6 #define V8_COMPILER_CODE_GENERATOR_IMPL_H_ 6 #define V8_COMPILER_CODE_GENERATOR_IMPL_H_
7 7
8 #include "src/compiler/code-generator.h" 8 #include "src/compiler/code-generator.h"
9 #include "src/compiler/common-operator.h"
10 #include "src/compiler/generic-graph.h"
11 #include "src/compiler/instruction.h" 9 #include "src/compiler/instruction.h"
12 #include "src/compiler/linkage.h" 10 #include "src/compiler/linkage.h"
13 #include "src/compiler/machine-operator.h"
14 #include "src/compiler/node.h"
15 #include "src/compiler/opcodes.h" 11 #include "src/compiler/opcodes.h"
16 #include "src/compiler/operator.h"
17 12
18 namespace v8 { 13 namespace v8 {
19 namespace internal { 14 namespace internal {
20 namespace compiler { 15 namespace compiler {
21 16
22 // Converts InstructionOperands from a given instruction to 17 // Converts InstructionOperands from a given instruction to
23 // architecture-specific 18 // architecture-specific
24 // registers and operands after they have been assigned by the register 19 // registers and operands after they have been assigned by the register
25 // allocator. 20 // allocator.
26 class InstructionOperandConverter { 21 class InstructionOperandConverter {
(...skipping 27 matching lines...) Expand all
54 49
55 uint8_t InputInt6(int index) { 50 uint8_t InputInt6(int index) {
56 return static_cast<uint8_t>(InputInt32(index) & 0x3F); 51 return static_cast<uint8_t>(InputInt32(index) & 0x3F);
57 } 52 }
58 53
59 Handle<HeapObject> InputHeapObject(int index) { 54 Handle<HeapObject> InputHeapObject(int index) {
60 return ToHeapObject(instr_->InputAt(index)); 55 return ToHeapObject(instr_->InputAt(index));
61 } 56 }
62 57
63 Label* InputLabel(int index) { 58 Label* InputLabel(int index) {
64 return gen_->code()->GetLabel(InputBlock(index)); 59 return gen_->code()->GetLabel(InputRpo(index));
65 } 60 }
66 61
67 BasicBlock* InputBlock(int index) { 62 BasicBlock::RpoNumber InputRpo(int index) {
68 int block_id = InputInt32(index); 63 int rpo_number = InputInt32(index);
69 return gen_->schedule()->GetBlockById(BasicBlock::Id::FromInt(block_id)); 64 return BasicBlock::RpoNumber::FromInt(rpo_number);
70 } 65 }
71 66
72 Register OutputRegister(int index = 0) { 67 Register OutputRegister(int index = 0) {
73 return ToRegister(instr_->OutputAt(index)); 68 return ToRegister(instr_->OutputAt(index));
74 } 69 }
75 70
76 DoubleRegister OutputDoubleRegister() { 71 DoubleRegister OutputDoubleRegister() {
77 return ToDoubleRegister(instr_->Output()); 72 return ToDoubleRegister(instr_->Output());
78 } 73 }
79 74
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120 #if V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_ARM 115 #if V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_ARM
121 masm->CheckConstPool(true, false); 116 masm->CheckConstPool(true, false);
122 #endif 117 #endif
123 } 118 }
124 119
125 } // namespace compiler 120 } // namespace compiler
126 } // namespace internal 121 } // namespace internal
127 } // namespace v8 122 } // namespace v8
128 123
129 #endif // V8_COMPILER_CODE_GENERATOR_IMPL_H 124 #endif // V8_COMPILER_CODE_GENERATOR_IMPL_H
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