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Side by Side Diff: chromeos/drivers/ath6kl/include/a_hci.h

Issue 646055: Atheros AR600x driver + build glue (Closed)
Patch Set: Created 10 years, 10 months ago
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1 //-
2 // Copyright (c) 2009 Atheros Communications Inc.
3 // All rights reserved.
4 // $ATH_LICENSE_TARGET_C$
5 //
6 //
7
8
9 #ifndef __A_HCI_H__
10 #define __A_HCI_H__
11
12 #define HCI_CMD_OGF_MASK 0x3F
13 #define HCI_CMD_OGF_SHIFT 10
14 #define HCI_CMD_GET_OGF(opcode) ((opcode >> HCI_CMD_OGF_SHIFT) & HCI_CMD_OGF _MASK)
15
16 #define HCI_CMD_OCF_MASK 0x3FF
17 #define HCI_CMD_OCF_SHIFT 0
18 #define HCI_CMD_GET_OCF(opcode) (((opcode) >> HCI_CMD_OCF_SHIFT) & HCI_CMD_O CF_MASK)
19
20 #define HCI_FORM_OPCODE(ocf, ogf) ((ocf & HCI_CMD_OCF_MASK) << HCI_CMD_OCF_SH IFT | \
21 (ogf & HCI_CMD_OGF_MASK) << HCI_CMD_OG F_SHIFT)
22
23
24 /*======== HCI Opcode groups ===============*/
25 #define OGF_NOP 0x00
26 #define OGF_LINK_CONTROL 0x01
27 #define OGF_LINK_POLICY 0x03
28 #define OGF_INFO_PARAMS 0x04
29 #define OGF_STATUS 0x05
30 #define OGF_TESTING 0x06
31 #define OGF_BLUETOOTH 0x3E
32 #define OGF_VENDOR_DEBUG 0x3F
33
34
35
36 #define OCF_NOP 0x00
37
38
39 /*===== Link Control Commands Opcode===================*/
40 #define OCF_HCI_Create_Physical_Link 0x35
41 #define OCF_HCI_Accept_Physical_Link_Req 0x36
42 #define OCF_HCI_Disconnect_Physical_Link 0x37
43 #define OCF_HCI_Create_Logical_Link 0x38
44 #define OCF_HCI_Accept_Logical_Link 0x39
45 #define OCF_HCI_Disconnect_Logical_Link 0x3A
46 #define OCF_HCI_Logical_Link_Cancel 0x3B
47 #define OCF_HCI_Flow_Spec_Modify 0x3C
48
49
50
51 /*===== Link Policy Commands Opcode====================*/
52 #define OCF_HCI_Set_Event_Mask 0x01
53 #define OCF_HCI_Reset 0x03
54 #define OCF_HCI_Read_Conn_Accept_Timeout 0x15
55 #define OCF_HCI_Write_Conn_Accept_Timeout 0x16
56 #define OCF_HCI_Read_Link_Supervision_Timeout 0x36
57 #define OCF_HCI_Write_Link_Supervision_Timeout 0x37
58 #define OCF_HCI_Enhanced_Flush 0x5F
59 #define OCF_HCI_Read_Logical_Link_Accept_Timeout 0x61
60 #define OCF_HCI_Write_Logical_Link_Accept_Timeout 0x62
61 #define OCF_HCI_Set_Event_Mask_Page_2 0x63
62 #define OCF_HCI_Read_Location_Data 0x64
63 #define OCF_HCI_Write_Location_Data 0x65
64 #define OCF_HCI_Read_Flow_Control_Mode 0x66
65 #define OCF_HCI_Write_Flow_Control_Mode 0x67
66 #define OCF_HCI_Read_BE_Flush_Timeout 0x69
67 #define OCF_HCI_Write_BE_Flush_Timeout 0x6A
68 #define OCF_HCI_Short_Range_Mode 0x6B
69
70
71 /*======== Info Commands Opcode========================*/
72 #define OCF_HCI_Read_Local_Ver_Info 0x01
73 #define OCF_HCI_Read_Local_Supported_Cmds 0x02
74 #define OCF_HCI_Read_Data_Block_Size 0x0A
75 /*======== Status Commands Opcode======================*/
76 #define OCF_HCI_Read_Failed_Contact_Counter 0x01
77 #define OCF_HCI_Reset_Failed_Contact_Counter 0x02
78 #define OCF_HCI_Read_Link_Quality 0x03
79 #define OCF_HCI_Read_RSSI 0x05
80 #define OCF_HCI_Read_Local_AMP_Info 0x09
81 #define OCF_HCI_Read_Local_AMP_ASSOC 0x0A
82 #define OCF_HCI_Write_Remote_AMP_ASSOC 0x0B
83
84
85 /*======= AMP_ASSOC Specific TLV tags =================*/
86 #define AMP_ASSOC_MAC_ADDRESS_INFO_TYPE 0x1
87 #define AMP_ASSOC_PREF_CHAN_LIST 0x2
88 #define AMP_ASSOC_CONNECTED_CHAN 0x3
89 #define AMP_ASSOC_PAL_CAPABILITIES 0x4
90 #define AMP_ASSOC_PAL_VERSION 0x5
91
92
93 /*========= PAL Events =================================*/
94 #define PAL_COMMAND_COMPLETE_EVENT 0x0E
95 #define PAL_COMMAND_STATUS_EVENT 0x0F
96 #define PAL_HARDWARE_ERROR_EVENT 0x10
97 #define PAL_FLUSH_OCCURRED_EVENT 0x11
98 #define PAL_LOOPBACK_EVENT 0x19
99 #define PAL_BUFFER_OVERFLOW_EVENT 0x1A
100 #define PAL_QOS_VIOLATION_EVENT 0x1E
101 #define PAL_ENHANCED_FLUSH_COMPLT_EVENT 0x39
102 #define PAL_PHYSICAL_LINK_COMPL_EVENT 0x40
103 #define PAL_CHANNEL_SELECT_EVENT 0x41
104 #define PAL_DISCONNECT_PHYSICAL_LINK_EVENT 0x42
105 #define PAL_PHY_LINK_EARLY_LOSS_WARNING_EVENT 0x43
106 #define PAL_PHY_LINK_RECOVERY_EVENT 0x44
107 #define PAL_LOGICAL_LINK_COMPL_EVENT 0x45
108 #define PAL_DISCONNECT_LOGICAL_LINK_COMPL_EVENT 0x46
109 #define PAL_FLOW_SPEC_MODIFY_COMPL_EVENT 0x47
110 #define PAL_NUM_COMPL_DATA_BLOCK_EVENT 0x48
111 #define PAL_SHORT_RANGE_MODE_CHANGE_COMPL_EVENT 0x4C
112 #define PAL_AMP_STATUS_CHANGE_EVENT 0x4D
113 /*======== End of PAL events definiton =================*/
114
115
116 /*======== Timeouts (not part of HCI cmd, but input to PAL engine) =========*/
117 #define Timer_Conn_Accept_TO 0x01
118 #define Timer_Link_Supervision_TO 0x02
119
120 #define NUM_HCI_COMMAND_PKTS 0x1
121
122
123 /*====== NOP Cmd ============================*/
124 #define HCI_CMD_NOP HCI_FORM_OPCODE(OCF_NOP, OGF_NOP)
125
126
127 /*===== Link Control Commands================*/
128 #define HCI_Create_Physical_Link HCI_FORM_OPCODE(OCF_HCI_Create_Physical_ Link, OGF_LINK_CONTROL)
129 #define HCI_Accept_Physical_Link_Req HCI_FORM_OPCODE(OCF_HCI_Accept_Physical_ Link_Req, OGF_LINK_CONTROL)
130 #define HCI_Disconnect_Physical_Link HCI_FORM_OPCODE(OCF_HCI_Disconnect_Physi cal_Link, OGF_LINK_CONTROL)
131 #define HCI_Create_Logical_Link HCI_FORM_OPCODE(OCF_HCI_Create_Logical_L ink, OGF_LINK_CONTROL)
132 #define HCI_Accept_Logical_Link HCI_FORM_OPCODE(OCF_HCI_Accept_Logical_L ink, OGF_LINK_CONTROL)
133 #define HCI_Disconnect_Logical_Link HCI_FORM_OPCODE(OCF_HCI_Disconnect_Logic al_Link, OGF_LINK_CONTROL)
134 #define HCI_Logical_Link_Cancel HCI_FORM_OPCODE(OCF_HCI_Logical_Link_Can cel, OGF_LINK_CONTROL)
135 #define HCI_Flow_Spec_Modify HCI_FORM_OPCODE(OCF_HCI_Flow_Spec_Modify , OGF_LINK_CONTROL)
136
137
138 /*===== Link Policy Commands ================*/
139 #define HCI_Set_Event_Mask HCI_FORM_OPCODE(OCF_HCI_Set_Event_Mask, OGF_LINK_POLICY)
140 #define HCI_Reset HCI_FORM_OPCODE(OCF_HCI_Reset, OGF_LINK_ POLICY)
141 #define HCI_Enhanced_Flush HCI_FORM_OPCODE(OCF_HCI_Enhanced_Flush, OGF_LINK_POLICY)
142 #define HCI_Read_Conn_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_Conn_Accept _Timeout, OGF_LINK_POLICY)
143 #define HCI_Write_Conn_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_Conn_Accep t_Timeout, OGF_LINK_POLICY)
144 #define HCI_Read_Logical_Link_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_Log ical_Link_Accept_Timeout, OGF_LINK_POLICY)
145 #define HCI_Write_Logical_Link_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_Lo gical_Link_Accept_Timeout, OGF_LINK_POLICY)
146 #define HCI_Read_Link_Supervision_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_Lin k_Supervision_Timeout, OGF_LINK_POLICY)
147 #define HCI_Write_Link_Supervision_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_Li nk_Supervision_Timeout, OGF_LINK_POLICY)
148 #define HCI_Read_Location_Data HCI_FORM_OPCODE(OCF_HCI_Read_Location_Da ta, OGF_LINK_POLICY)
149 #define HCI_Write_Location_Data HCI_FORM_OPCODE(OCF_HCI_Write_Location_D ata, OGF_LINK_POLICY)
150 #define HCI_Set_Event_Mask_Page_2 HCI_FORM_OPCODE(OCF_HCI_Set_Event_Mask_P age_2, OGF_LINK_POLICY)
151 #define HCI_Read_Flow_Control_Mode HCI_FORM_OPCODE(OCF_HCI_Read_Flow_Contro l_Mode, OGF_LINK_POLICY)
152 #define HCI_Write_Flow_Control_Mode HCI_FORM_OPCODE(OCF_HCI_Write_Flow_Contr ol_Mode, OGF_LINK_POLICY)
153 #define HCI_Write_BE_Flush_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_BE_Flush_T imeout, OGF_LINK_POLICY)
154 #define HCI_Read_BE_Flush_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_BE_Flush_Ti meout, OGF_LINK_POLICY)
155 #define HCI_Short_Range_Mode HCI_FORM_OPCODE(OCF_HCI_Short_Range_Mode , OGF_LINK_POLICY)
156
157
158 /*===== Info Commands =====================*/
159 #define HCI_Read_Local_Ver_Info HCI_FORM_OPCODE(OCF_HCI_Read_Local_Ver_I nfo, OGF_INFO_PARAMS)
160 #define HCI_Read_Local_Supported_Cmds HCI_FORM_OPCODE(OCF_HCI_Read_Local_Suppo rted_Cmds, OGF_INFO_PARAMS)
161 #define HCI_Read_Data_Block_Size HCI_FORM_OPCODE(OCF_HCI_Read_Data_Block_ Size, OGF_INFO_PARAMS)
162
163 /*===== Status Commands =====================*/
164 #define HCI_Read_Link_Quality HCI_FORM_OPCODE(OCF_HCI_Read_Link_Qualit y, OGF_STATUS)
165 #define HCI_Read_RSSI HCI_FORM_OPCODE(OCF_HCI_Read_RSSI, OGF_S TATUS)
166 #define HCI_Read_Local_AMP_Info HCI_FORM_OPCODE(OCF_HCI_Read_Local_AMP_I nfo, OGF_STATUS)
167 #define HCI_Read_Local_AMP_ASSOC HCI_FORM_OPCODE(OCF_HCI_Read_Local_AMP_A SSOC, OGF_STATUS)
168 #define HCI_Write_Remote_AMP_ASSOC HCI_FORM_OPCODE(OCF_HCI_Write_Remote_AMP _ASSOC, OGF_STATUS)
169
170 /*====== End of cmd definitions =============*/
171
172
173
174 /*===== Timeouts(private - can't come from HCI)=================*/
175 #define Conn_Accept_TO HCI_FORM_OPCODE(Timer_Conn_Accept_TO, OG F_VENDOR_DEBUG)
176 #define Link_Supervision_TO HCI_FORM_OPCODE(Timer_Link_Supervision_T O, OGF_VENDOR_DEBUG)
177
178 /*----- PAL Constants (Sec 6 of Doc)------------------------*/
179 #define Max80211_PAL_PDU_Size 1492
180 #define Max80211_AMP_ASSOC_Len 672
181 #define MinGUserPrio 4
182 #define MaxGUserPrio 7
183 #define BEUserPrio0 0
184 #define BEUserPrio1 3
185 #define Max80211BeaconPeriod 2000 /* in millisec */
186 #define ShortRangeModePowerMax 4 /* dBm */
187
188 /*------ PAL Protocol Identifiers (Sec5.1) ------------------*/
189 typedef enum {
190 ACL_DATA = 0x01,
191 ACTIVITY_REPORT,
192 SECURED_FRAMES,
193 LINK_SUPERVISION_REQ,
194 LINK_SUPERVISION_RESP,
195 }PAL_PROTOCOL_IDENTIFIERS;
196
197 #define HCI_CMD_HDR_SZ 3
198 #define HCI_EVENT_HDR_SIZE 2
199 #define MAX_EVT_PKT_SZ 255
200 #define AMP_ASSOC_MAX_FRAG_SZ 248
201 #define AMP_MAX_GUARANTEED_BW 20000
202
203 #define DEFAULT_CONN_ACCPT_TO 5000
204 #define DEFAULT_LL_ACCPT_TO 5000
205 #define DEFAULT_LSTO 10000
206
207 #define PACKET_BASED_FLOW_CONTROL_MODE 0x00
208 #define DATA_BLK_BASED_FLOW_CONTROL_MODE 0x01
209
210 #define SERVICE_TYPE_BEST_EFFORT 0x01
211 #define SERVICE_TYPE_GUARANTEED 0x02
212
213 #define MAC_ADDR_LEN 6
214 #define LINK_KEY_LEN 32
215
216 typedef enum {
217 ACL_DATA_PB_1ST_NON_AUTOMATICALLY_FLUSHABLE = 0x00,
218 ACL_DATA_PB_CONTINUING_FRAGMENT = 0x01,
219 ACL_DATA_PB_1ST_AUTOMATICALLY_FLUSHABLE = 0x02,
220 ACL_DATA_PB_COMPLETE_PDU = 0x03,
221 } ACL_DATA_PB_FLAGS;
222 #define ACL_DATA_PB_FLAGS_SHIFT 12
223
224 typedef enum {
225 ACL_DATA_BC_POINT_TO_POINT = 0x00,
226 } ACL_DATA_BC_FLAGS;
227 #define ACL_DATA_BC_FLAGS_SHIFT 14
228
229 /* Command pkt */
230 typedef struct hci_cmd_pkt_t {
231 A_UINT16 opcode;
232 A_UINT8 param_length;
233 A_UINT8 params[255];
234 } POSTPACK HCI_CMD_PKT;
235
236 #define ACL_DATA_HDR_SIZE 4 /* hdl_and flags + data_len */
237 /* Data pkt */
238 typedef struct hci_acl_data_pkt_t {
239 A_UINT16 hdl_and_flags;
240 A_UINT16 data_len;
241 A_UINT8 data[Max80211_PAL_PDU_Size];
242 } POSTPACK HCI_ACL_DATA_PKT;
243
244 /* Event pkt */
245 typedef struct hci_event_pkt_t {
246 A_UINT8 event_code;
247 A_UINT8 param_len;
248 A_UINT8 params[256];
249 } POSTPACK HCI_EVENT_PKT;
250
251
252 /*============== HCI Command definitions ======================= */
253 typedef struct hci_cmd_phy_link_t {
254 A_UINT16 opcode;
255 A_UINT8 param_length;
256 A_UINT8 phy_link_hdl;
257 A_UINT8 link_key_len;
258 A_UINT8 link_key_type;
259 A_UINT8 link_key[LINK_KEY_LEN];
260 } POSTPACK HCI_CMD_PHY_LINK;
261
262 typedef struct hci_cmd_write_rem_amp_assoc_t {
263 A_UINT16 opcode;
264 A_UINT8 param_length;
265 A_UINT8 phy_link_hdl;
266 A_UINT16 len_so_far;
267 A_UINT16 amp_assoc_remaining_len;
268 A_UINT8 amp_assoc_frag[AMP_ASSOC_MAX_FRAG_SZ];
269 } POSTPACK HCI_CMD_WRITE_REM_AMP_ASSOC;
270
271
272 typedef struct hci_cmd_opcode_hdl_t {
273 A_UINT16 opcode;
274 A_UINT8 param_length;
275 A_UINT16 hdl;
276 } POSTPACK HCI_CMD_READ_LINK_QUAL,
277 HCI_CMD_FLUSH,
278 HCI_CMD_READ_LINK_SUPERVISION_TIMEOUT;
279
280 typedef struct hci_cmd_read_local_amp_assoc_t {
281 A_UINT16 opcode;
282 A_UINT8 param_length;
283 A_UINT8 phy_link_hdl;
284 A_UINT16 len_so_far;
285 A_UINT16 max_rem_amp_assoc_len;
286 } POSTPACK HCI_CMD_READ_LOCAL_AMP_ASSOC;
287
288
289 typedef struct hci_cmd_set_event_mask_t {
290 A_UINT16 opcode;
291 A_UINT8 param_length;
292 A_UINT64 mask;
293 }POSTPACK HCI_CMD_SET_EVT_MASK, HCI_CMD_SET_EVT_MASK_PG_2;
294
295
296 typedef struct hci_cmd_enhanced_flush_t{
297 A_UINT16 opcode;
298 A_UINT8 param_length;
299 A_UINT16 hdl;
300 A_UINT8 type;
301 } POSTPACK HCI_CMD_ENHANCED_FLUSH;
302
303
304 typedef struct hci_cmd_write_timeout_t {
305 A_UINT16 opcode;
306 A_UINT8 param_length;
307 A_UINT16 timeout;
308 } POSTPACK HCI_CMD_WRITE_TIMEOUT;
309
310 typedef struct hci_cmd_write_link_supervision_timeout_t {
311 A_UINT16 opcode;
312 A_UINT8 param_length;
313 A_UINT16 hdl;
314 A_UINT16 timeout;
315 } POSTPACK HCI_CMD_WRITE_LINK_SUPERVISION_TIMEOUT;
316
317 typedef struct hci_cmd_write_flow_control_t {
318 A_UINT16 opcode;
319 A_UINT8 param_length;
320 A_UINT8 mode;
321 } POSTPACK HCI_CMD_WRITE_FLOW_CONTROL;
322
323 typedef struct location_data_cfg_t {
324 A_UINT8 reg_domain_aware;
325 A_UINT8 reg_domain[3];
326 A_UINT8 reg_options;
327 } POSTPACK LOCATION_DATA_CFG;
328
329 typedef struct hci_cmd_write_location_data_t {
330 A_UINT16 opcode;
331 A_UINT8 param_length;
332 LOCATION_DATA_CFG cfg;
333 } POSTPACK HCI_CMD_WRITE_LOCATION_DATA;
334
335
336 typedef struct flow_spec_t {
337 A_UINT8 id;
338 A_UINT8 service_type;
339 A_UINT16 max_sdu;
340 A_UINT32 sdu_inter_arrival_time;
341 A_UINT32 access_latency;
342 A_UINT32 flush_timeout;
343 } POSTPACK FLOW_SPEC;
344
345
346 typedef struct hci_cmd_create_logical_link_t {
347 A_UINT16 opcode;
348 A_UINT8 param_length;
349 A_UINT8 phy_link_hdl;
350 FLOW_SPEC tx_flow_spec;
351 FLOW_SPEC rx_flow_spec;
352 } POSTPACK HCI_CMD_CREATE_LOGICAL_LINK;
353
354 typedef struct hci_cmd_flow_spec_modify_t {
355 A_UINT16 opcode;
356 A_UINT8 param_length;
357 A_UINT16 hdl;
358 FLOW_SPEC tx_flow_spec;
359 FLOW_SPEC rx_flow_spec;
360 } POSTPACK HCI_CMD_FLOW_SPEC_MODIFY;
361
362 typedef struct hci_cmd_logical_link_cancel_t {
363 A_UINT16 opcode;
364 A_UINT8 param_length;
365 A_UINT8 phy_link_hdl;
366 A_UINT8 tx_flow_spec_id;
367 } POSTPACK HCI_CMD_LOGICAL_LINK_CANCEL;
368
369 typedef struct hci_cmd_disconnect_logical_link_t {
370 A_UINT16 opcode;
371 A_UINT8 param_length;
372 A_UINT16 logical_link_hdl;
373 } POSTPACK HCI_CMD_DISCONNECT_LOGICAL_LINK;
374
375 typedef struct hci_cmd_disconnect_phy_link_t {
376 A_UINT16 opcode;
377 A_UINT8 param_length;
378 A_UINT8 phy_link_hdl;
379 } POSTPACK HCI_CMD_DISCONNECT_PHY_LINK;
380
381 typedef struct hci_cmd_srm_t {
382 A_UINT16 opcode;
383 A_UINT8 param_length;
384 A_UINT8 phy_link_hdl;
385 A_UINT8 mode;
386 } POSTPACK HCI_CMD_SHORT_RANGE_MODE;
387 /*============== HCI Command definitions end ======================= */
388
389
390
391 /*============== HCI Event definitions ============================= */
392
393 /* Command complete event */
394 typedef struct hci_event_cmd_complete_t {
395 A_UINT8 event_code;
396 A_UINT8 param_len;
397 A_UINT8 num_hci_cmd_pkts;
398 A_UINT16 opcode;
399 A_UINT8 params[255];
400 } POSTPACK HCI_EVENT_CMD_COMPLETE;
401
402
403 /* Command status event */
404 typedef struct hci_event_cmd_status_t {
405 A_UINT8 event_code;
406 A_UINT8 param_len;
407 A_UINT8 status;
408 A_UINT8 num_hci_cmd_pkts;
409 A_UINT16 opcode;
410 } POSTPACK HCI_EVENT_CMD_STATUS;
411
412 /* Hardware Error event */
413 typedef struct hci_event_hw_err_t {
414 A_UINT8 event_code;
415 A_UINT8 param_len;
416 A_UINT8 hw_err_code;
417 } POSTPACK HCI_EVENT_HW_ERR;
418
419 /* Flush occured event */
420 /* Qos Violation event */
421 typedef struct hci_event_handle_t {
422 A_UINT8 event_code;
423 A_UINT8 param_len;
424 A_UINT16 handle;
425 } POSTPACK HCI_EVENT_FLUSH_OCCRD,
426 HCI_EVENT_QOS_VIOLATION;
427
428 /* Loopback command event */
429 typedef struct hci_loopback_cmd_t {
430 A_UINT8 event_code;
431 A_UINT8 param_len;
432 A_UINT8 params[252];
433 } POSTPACK HCI_EVENT_LOOPBACK_CMD;
434
435 /* Data buffer overflow event */
436 typedef struct hci_data_buf_overflow_t {
437 A_UINT8 event_code;
438 A_UINT8 param_len;
439 A_UINT8 link_type;
440 } POSTPACK HCI_EVENT_DATA_BUF_OVERFLOW;
441
442 /* Enhanced Flush complete event */
443 typedef struct hci_enhanced_flush_complt_t{
444 A_UINT8 event_code;
445 A_UINT8 param_len;
446 A_UINT16 hdl;
447 } POSTPACK HCI_EVENT_ENHANCED_FLUSH_COMPLT;
448
449 /* Channel select event */
450 typedef struct hci_event_chan_select_t {
451 A_UINT8 event_code;
452 A_UINT8 param_len;
453 A_UINT8 phy_link_hdl;
454 } POSTPACK HCI_EVENT_CHAN_SELECT;
455
456 /* Physical Link Complete event */
457 typedef struct hci_event_phy_link_complete_event_t {
458 A_UINT8 event_code;
459 A_UINT8 param_len;
460 A_UINT8 status;
461 A_UINT8 phy_link_hdl;
462 } POSTPACK HCI_EVENT_PHY_LINK_COMPLETE;
463
464 /* Logical Link complete event */
465 typedef struct hci_event_logical_link_complete_event_t {
466 A_UINT8 event_code;
467 A_UINT8 param_len;
468 A_UINT8 status;
469 A_UINT16 logical_link_hdl;
470 A_UINT8 phy_hdl;
471 A_UINT8 tx_flow_id;
472 } POSTPACK HCI_EVENT_LOGICAL_LINK_COMPLETE_EVENT;
473
474 /* Disconnect Logical Link complete event */
475 typedef struct hci_event_disconnect_logical_link_event_t {
476 A_UINT8 event_code;
477 A_UINT8 param_len;
478 A_UINT8 status;
479 A_UINT16 logical_link_hdl;
480 A_UINT8 reason;
481 } POSTPACK HCI_EVENT_DISCONNECT_LOGICAL_LINK_EVENT;
482
483 /* Disconnect Physical Link complete event */
484 typedef struct hci_event_disconnect_phy_link_complete_t {
485 A_UINT8 event_code;
486 A_UINT8 param_len;
487 A_UINT8 status;
488 A_UINT8 phy_link_hdl;
489 A_UINT8 reason;
490 } POSTPACK HCI_EVENT_DISCONNECT_PHY_LINK_COMPLETE;
491
492 typedef struct hci_event_physical_link_loss_early_warning_t{
493 A_UINT8 event_code;
494 A_UINT8 param_len;
495 A_UINT8 phy_hdl;
496 A_UINT8 reason;
497 } POSTPACK HCI_EVENT_PHY_LINK_LOSS_EARLY_WARNING;
498
499 typedef struct hci_event_physical_link_recovery_t{
500 A_UINT8 event_code;
501 A_UINT8 param_len;
502 A_UINT8 phy_hdl;
503 } POSTPACK HCI_EVENT_PHY_LINK_RECOVERY;
504
505
506 /* Flow spec modify complete event */
507 /* Flush event */
508 typedef struct hci_event_status_handle_t {
509 A_UINT8 event_code;
510 A_UINT8 param_len;
511 A_UINT8 status;
512 A_UINT16 handle;
513 } POSTPACK HCI_EVENT_FLOW_SPEC_MODIFY,
514 HCI_EVENT_FLUSH;
515
516
517 /* Num of completed data blocks event */
518 typedef struct hci_event_num_of_compl_data_blks_t {
519 A_UINT8 event_code;
520 A_UINT8 param_len;
521 A_UINT16 num_data_blks;
522 A_UINT8 num_handles;
523 A_UINT8 params[255];
524 } POSTPACK HCI_EVENT_NUM_COMPL_DATA_BLKS;
525
526 /* Short range mode change complete event */
527 typedef struct hci_srm_cmpl_t {
528 A_UINT8 event_code;
529 A_UINT8 param_len;
530 A_UINT8 status;
531 A_UINT8 phy_link;
532 A_UINT8 state;
533 } POSTPACK HCI_EVENT_SRM_COMPL;
534
535 typedef struct hci_event_amp_status_change_t{
536 A_UINT8 event_code;
537 A_UINT8 param_len;
538 A_UINT8 status;
539 A_UINT8 amp_status;
540 } POSTPACK HCI_EVENT_AMP_STATUS_CHANGE;
541
542 /*============== Event definitions end =========================== */
543
544
545 typedef struct local_amp_info_resp_t {
546 A_UINT8 status;
547 A_UINT8 amp_status;
548 A_UINT32 total_bw; /* kbps */
549 A_UINT32 max_guranteed_bw; /* kbps */
550 A_UINT32 min_latency;
551 A_UINT32 max_pdu_size;
552 A_UINT8 amp_type;
553 A_UINT16 pal_capabilities;
554 A_UINT16 amp_assoc_len;
555 A_UINT32 max_flush_timeout; /* in ms */
556 A_UINT32 be_flush_timeout; /* in ms */
557 } POSTPACK LOCAL_AMP_INFO;
558
559 typedef struct amp_assoc_cmd_resp_t{
560 A_UINT8 status;
561 A_UINT8 phy_hdl;
562 A_UINT16 amp_assoc_len;
563 A_UINT8 amp_assoc_frag[AMP_ASSOC_MAX_FRAG_SZ];
564 }POSTPACK AMP_ASSOC_CMD_RESP;
565
566
567 enum PAL_HCI_CMD_STATUS {
568 PAL_HCI_CMD_PROCESSED,
569 PAL_HCI_CMD_IGNORED
570 };
571
572
573 /*============= HCI Error Codes =======================*/
574 #define HCI_SUCCESS 0x00
575 #define HCI_ERR_UNKNOW_CMD 0x01
576 #define HCI_ERR_UNKNOWN_CONN_ID 0x02
577 #define HCI_ERR_HW_FAILURE 0x03
578 #define HCI_ERR_PAGE_TIMEOUT 0x04
579 #define HCI_ERR_AUTH_FAILURE 0x05
580 #define HCI_ERR_KEY_MISSING 0x06
581 #define HCI_ERR_MEM_CAP_EXECED 0x07
582 #define HCI_ERR_CON_TIMEOUT 0x08
583 #define HCI_ERR_CON_LIMIT_EXECED 0x09
584 #define HCI_ERR_ACL_CONN_ALRDY_EXISTS 0x0B
585 #define HCI_ERR_COMMAND_DISALLOWED 0x0C
586 #define HCI_ERR_CONN_REJ_BY_LIMIT_RES 0x0D
587 #define HCI_ERR_CONN_REJ_BY_SEC 0x0E
588 #define HCI_ERR_CONN_REJ_BY_BAD_ADDR 0x0F
589 #define HCI_ERR_CONN_ACCPT_TIMEOUT 0x10
590 #define HCI_ERR_UNSUPPORT_FEATURE 0x11
591 #define HCI_ERR_INVALID_HCI_CMD_PARAMS 0x12
592 #define HCI_ERR_REMOTE_USER_TERMINATE_CONN 0x13
593 #define HCI_ERR_CON_TERM_BY_HOST 0x16
594 #define HCI_ERR_UNSPECIFIED_ERROR 0x1F
595 #define HCI_ERR_ENCRYPTION_MODE_NOT_SUPPORT 0x25
596 #define HCI_ERR_REQUESTED_QOS_NOT_SUPPORT 0x27
597 #define HCI_ERR_QOS_UNACCEPTABLE_PARM 0x2C
598 #define HCI_ERR_QOS_REJECTED 0x2D
599 #define HCI_ERR_CONN_REJ_NO_SUITABLE_CHAN 0x39
600
601 /*============= HCI Error Codes End =======================*/
602
603
604 /* Following are event return parameters.. part of HCI events
605 */
606 typedef struct timeout_read_t {
607 A_UINT8 status;
608 A_UINT16 timeout;
609 }POSTPACK TIMEOUT_INFO;
610
611 typedef struct link_supervision_timeout_read_t {
612 A_UINT8 status;
613 A_UINT16 hdl;
614 A_UINT16 timeout;
615 }POSTPACK LINK_SUPERVISION_TIMEOUT_INFO;
616
617 typedef struct status_hdl_t {
618 A_UINT8 status;
619 A_UINT16 hdl;
620 }POSTPACK INFO_STATUS_HDL;
621
622 typedef struct write_remote_amp_assoc_t{
623 A_UINT8 status;
624 A_UINT8 hdl;
625 }POSTPACK WRITE_REMOTE_AMP_ASSOC_INFO;
626
627 typedef struct read_loc_info_t {
628 A_UINT8 status;
629 LOCATION_DATA_CFG loc;
630 }POSTPACK READ_LOC_INFO;
631
632 typedef struct read_flow_ctrl_mode_t {
633 A_UINT8 status;
634 A_UINT8 mode;
635 }POSTPACK READ_FLWCTRL_INFO;
636
637 typedef struct read_data_blk_size_t {
638 A_UINT8 status;
639 A_UINT16 max_acl_data_pkt_len;
640 A_UINT16 data_block_len;
641 A_UINT16 total_num_data_blks;
642 }POSTPACK READ_DATA_BLK_SIZE_INFO;
643
644 /* Read Link quality info */
645 typedef struct link_qual_t {
646 A_UINT8 status;
647 A_UINT16 hdl;
648 A_UINT8 link_qual;
649 } POSTPACK READ_LINK_QUAL_INFO,
650 READ_RSSI_INFO;
651
652 typedef struct ll_cancel_resp_t {
653 A_UINT8 status;
654 A_UINT8 phy_link_hdl;
655 A_UINT8 tx_flow_spec_id;
656 } POSTPACK LL_CANCEL_RESP;
657
658 typedef struct read_local_ver_info_t {
659 A_UINT8 status;
660 A_UINT8 hci_version;
661 A_UINT16 hci_revision;
662 A_UINT8 pal_version;
663 A_UINT16 manf_name;
664 A_UINT16 pal_sub_ver;
665 } POSTPACK READ_LOCAL_VER_INFO;
666
667
668 #endif /* __A_HCI_H__ */
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