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| 1 // ------------------------------------------------------------------ |
| 2 // Copyright (c) 2004-2007 Atheros Corporation. All rights reserved. |
| 3 // |
| 4 // This program is free software; you can redistribute it and/or modify |
| 5 // it under the terms of the GNU General Public License version 2 as |
| 6 // published by the Free Software Foundation; |
| 7 // |
| 8 // Software distributed under the License is distributed on an "AS |
| 9 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
| 10 // implied. See the License for the specific language governing |
| 11 // rights and limitations under the License. |
| 12 // |
| 13 // |
| 14 // ------------------------------------------------------------------ |
| 15 //=================================================================== |
| 16 // Author(s): ="Atheros" |
| 17 //=================================================================== |
| 18 |
| 19 |
| 20 #ifndef _RTC_WLAN_REG_REG_H_ |
| 21 #define _RTC_WLAN_REG_REG_H_ |
| 22 |
| 23 #define WLAN_RESET_CONTROL_ADDRESS 0x00000000 |
| 24 #define WLAN_RESET_CONTROL_OFFSET 0x00000000 |
| 25 #define WLAN_RESET_CONTROL_DEBUG_UART_RST_MSB 14 |
| 26 #define WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB 14 |
| 27 #define WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK 0x00004000 |
| 28 #define WLAN_RESET_CONTROL_DEBUG_UART_RST_GET(x) (((x) & WLAN_RESET_CONTROL_DEBU
G_UART_RST_MASK) >> WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB) |
| 29 #define WLAN_RESET_CONTROL_DEBUG_UART_RST_SET(x) (((x) << WLAN_RESET_CONTROL_DEB
UG_UART_RST_LSB) & WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK) |
| 30 #define WLAN_RESET_CONTROL_BB_COLD_RST_MSB 13 |
| 31 #define WLAN_RESET_CONTROL_BB_COLD_RST_LSB 13 |
| 32 #define WLAN_RESET_CONTROL_BB_COLD_RST_MASK 0x00002000 |
| 33 #define WLAN_RESET_CONTROL_BB_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_BB_C
OLD_RST_MASK) >> WLAN_RESET_CONTROL_BB_COLD_RST_LSB) |
| 34 #define WLAN_RESET_CONTROL_BB_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_BB_
COLD_RST_LSB) & WLAN_RESET_CONTROL_BB_COLD_RST_MASK) |
| 35 #define WLAN_RESET_CONTROL_BB_WARM_RST_MSB 12 |
| 36 #define WLAN_RESET_CONTROL_BB_WARM_RST_LSB 12 |
| 37 #define WLAN_RESET_CONTROL_BB_WARM_RST_MASK 0x00001000 |
| 38 #define WLAN_RESET_CONTROL_BB_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_BB_W
ARM_RST_MASK) >> WLAN_RESET_CONTROL_BB_WARM_RST_LSB) |
| 39 #define WLAN_RESET_CONTROL_BB_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_BB_
WARM_RST_LSB) & WLAN_RESET_CONTROL_BB_WARM_RST_MASK) |
| 40 #define WLAN_RESET_CONTROL_CPU_INIT_RESET_MSB 11 |
| 41 #define WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB 11 |
| 42 #define WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK 0x00000800 |
| 43 #define WLAN_RESET_CONTROL_CPU_INIT_RESET_GET(x) (((x) & WLAN_RESET_CONTROL_CPU_
INIT_RESET_MASK) >> WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB) |
| 44 #define WLAN_RESET_CONTROL_CPU_INIT_RESET_SET(x) (((x) << WLAN_RESET_CONTROL_CPU
_INIT_RESET_LSB) & WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK) |
| 45 #define WLAN_RESET_CONTROL_VMC_REMAP_RESET_MSB 10 |
| 46 #define WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB 10 |
| 47 #define WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK 0x00000400 |
| 48 #define WLAN_RESET_CONTROL_VMC_REMAP_RESET_GET(x) (((x) & WLAN_RESET_CONTROL_VMC
_REMAP_RESET_MASK) >> WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB) |
| 49 #define WLAN_RESET_CONTROL_VMC_REMAP_RESET_SET(x) (((x) << WLAN_RESET_CONTROL_VM
C_REMAP_RESET_LSB) & WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK) |
| 50 #define WLAN_RESET_CONTROL_RST_OUT_MSB 9 |
| 51 #define WLAN_RESET_CONTROL_RST_OUT_LSB 9 |
| 52 #define WLAN_RESET_CONTROL_RST_OUT_MASK 0x00000200 |
| 53 #define WLAN_RESET_CONTROL_RST_OUT_GET(x) (((x) & WLAN_RESET_CONTROL_RST_
OUT_MASK) >> WLAN_RESET_CONTROL_RST_OUT_LSB) |
| 54 #define WLAN_RESET_CONTROL_RST_OUT_SET(x) (((x) << WLAN_RESET_CONTROL_RST
_OUT_LSB) & WLAN_RESET_CONTROL_RST_OUT_MASK) |
| 55 #define WLAN_RESET_CONTROL_COLD_RST_MSB 8 |
| 56 #define WLAN_RESET_CONTROL_COLD_RST_LSB 8 |
| 57 #define WLAN_RESET_CONTROL_COLD_RST_MASK 0x00000100 |
| 58 #define WLAN_RESET_CONTROL_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_COLD
_RST_MASK) >> WLAN_RESET_CONTROL_COLD_RST_LSB) |
| 59 #define WLAN_RESET_CONTROL_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_COL
D_RST_LSB) & WLAN_RESET_CONTROL_COLD_RST_MASK) |
| 60 #define WLAN_RESET_CONTROL_WARM_RST_MSB 7 |
| 61 #define WLAN_RESET_CONTROL_WARM_RST_LSB 7 |
| 62 #define WLAN_RESET_CONTROL_WARM_RST_MASK 0x00000080 |
| 63 #define WLAN_RESET_CONTROL_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_WARM
_RST_MASK) >> WLAN_RESET_CONTROL_WARM_RST_LSB) |
| 64 #define WLAN_RESET_CONTROL_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_WAR
M_RST_LSB) & WLAN_RESET_CONTROL_WARM_RST_MASK) |
| 65 #define WLAN_RESET_CONTROL_CPU_WARM_RST_MSB 6 |
| 66 #define WLAN_RESET_CONTROL_CPU_WARM_RST_LSB 6 |
| 67 #define WLAN_RESET_CONTROL_CPU_WARM_RST_MASK 0x00000040 |
| 68 #define WLAN_RESET_CONTROL_CPU_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_CPU_
WARM_RST_MASK) >> WLAN_RESET_CONTROL_CPU_WARM_RST_LSB) |
| 69 #define WLAN_RESET_CONTROL_CPU_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_CPU
_WARM_RST_LSB) & WLAN_RESET_CONTROL_CPU_WARM_RST_MASK) |
| 70 #define WLAN_RESET_CONTROL_MAC_COLD_RST_MSB 5 |
| 71 #define WLAN_RESET_CONTROL_MAC_COLD_RST_LSB 5 |
| 72 #define WLAN_RESET_CONTROL_MAC_COLD_RST_MASK 0x00000020 |
| 73 #define WLAN_RESET_CONTROL_MAC_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MAC_
COLD_RST_MASK) >> WLAN_RESET_CONTROL_MAC_COLD_RST_LSB) |
| 74 #define WLAN_RESET_CONTROL_MAC_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MAC
_COLD_RST_LSB) & WLAN_RESET_CONTROL_MAC_COLD_RST_MASK) |
| 75 #define WLAN_RESET_CONTROL_MAC_WARM_RST_MSB 4 |
| 76 #define WLAN_RESET_CONTROL_MAC_WARM_RST_LSB 4 |
| 77 #define WLAN_RESET_CONTROL_MAC_WARM_RST_MASK 0x00000010 |
| 78 #define WLAN_RESET_CONTROL_MAC_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MAC_
WARM_RST_MASK) >> WLAN_RESET_CONTROL_MAC_WARM_RST_LSB) |
| 79 #define WLAN_RESET_CONTROL_MAC_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MAC
_WARM_RST_LSB) & WLAN_RESET_CONTROL_MAC_WARM_RST_MASK) |
| 80 #define WLAN_RESET_CONTROL_MBOX_RST_MSB 2 |
| 81 #define WLAN_RESET_CONTROL_MBOX_RST_LSB 2 |
| 82 #define WLAN_RESET_CONTROL_MBOX_RST_MASK 0x00000004 |
| 83 #define WLAN_RESET_CONTROL_MBOX_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MBOX
_RST_MASK) >> WLAN_RESET_CONTROL_MBOX_RST_LSB) |
| 84 #define WLAN_RESET_CONTROL_MBOX_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MBO
X_RST_LSB) & WLAN_RESET_CONTROL_MBOX_RST_MASK) |
| 85 #define WLAN_RESET_CONTROL_UART_RST_MSB 1 |
| 86 #define WLAN_RESET_CONTROL_UART_RST_LSB 1 |
| 87 #define WLAN_RESET_CONTROL_UART_RST_MASK 0x00000002 |
| 88 #define WLAN_RESET_CONTROL_UART_RST_GET(x) (((x) & WLAN_RESET_CONTROL_UART
_RST_MASK) >> WLAN_RESET_CONTROL_UART_RST_LSB) |
| 89 #define WLAN_RESET_CONTROL_UART_RST_SET(x) (((x) << WLAN_RESET_CONTROL_UAR
T_RST_LSB) & WLAN_RESET_CONTROL_UART_RST_MASK) |
| 90 #define WLAN_RESET_CONTROL_SI0_RST_MSB 0 |
| 91 #define WLAN_RESET_CONTROL_SI0_RST_LSB 0 |
| 92 #define WLAN_RESET_CONTROL_SI0_RST_MASK 0x00000001 |
| 93 #define WLAN_RESET_CONTROL_SI0_RST_GET(x) (((x) & WLAN_RESET_CONTROL_SI0_
RST_MASK) >> WLAN_RESET_CONTROL_SI0_RST_LSB) |
| 94 #define WLAN_RESET_CONTROL_SI0_RST_SET(x) (((x) << WLAN_RESET_CONTROL_SI0
_RST_LSB) & WLAN_RESET_CONTROL_SI0_RST_MASK) |
| 95 |
| 96 #define WLAN_XTAL_CONTROL_ADDRESS 0x00000004 |
| 97 #define WLAN_XTAL_CONTROL_OFFSET 0x00000004 |
| 98 #define WLAN_XTAL_CONTROL_TCXO_MSB 0 |
| 99 #define WLAN_XTAL_CONTROL_TCXO_LSB 0 |
| 100 #define WLAN_XTAL_CONTROL_TCXO_MASK 0x00000001 |
| 101 #define WLAN_XTAL_CONTROL_TCXO_GET(x) (((x) & WLAN_XTAL_CONTROL_TCXO_
MASK) >> WLAN_XTAL_CONTROL_TCXO_LSB) |
| 102 #define WLAN_XTAL_CONTROL_TCXO_SET(x) (((x) << WLAN_XTAL_CONTROL_TCXO
_LSB) & WLAN_XTAL_CONTROL_TCXO_MASK) |
| 103 |
| 104 #define WLAN_TCXO_DETECT_ADDRESS 0x00000008 |
| 105 #define WLAN_TCXO_DETECT_OFFSET 0x00000008 |
| 106 #define WLAN_TCXO_DETECT_PRESENT_MSB 0 |
| 107 #define WLAN_TCXO_DETECT_PRESENT_LSB 0 |
| 108 #define WLAN_TCXO_DETECT_PRESENT_MASK 0x00000001 |
| 109 #define WLAN_TCXO_DETECT_PRESENT_GET(x) (((x) & WLAN_TCXO_DETECT_PRESEN
T_MASK) >> WLAN_TCXO_DETECT_PRESENT_LSB) |
| 110 #define WLAN_TCXO_DETECT_PRESENT_SET(x) (((x) << WLAN_TCXO_DETECT_PRESE
NT_LSB) & WLAN_TCXO_DETECT_PRESENT_MASK) |
| 111 |
| 112 #define WLAN_XTAL_TEST_ADDRESS 0x0000000c |
| 113 #define WLAN_XTAL_TEST_OFFSET 0x0000000c |
| 114 #define WLAN_XTAL_TEST_NOTCXODET_MSB 0 |
| 115 #define WLAN_XTAL_TEST_NOTCXODET_LSB 0 |
| 116 #define WLAN_XTAL_TEST_NOTCXODET_MASK 0x00000001 |
| 117 #define WLAN_XTAL_TEST_NOTCXODET_GET(x) (((x) & WLAN_XTAL_TEST_NOTCXODE
T_MASK) >> WLAN_XTAL_TEST_NOTCXODET_LSB) |
| 118 #define WLAN_XTAL_TEST_NOTCXODET_SET(x) (((x) << WLAN_XTAL_TEST_NOTCXOD
ET_LSB) & WLAN_XTAL_TEST_NOTCXODET_MASK) |
| 119 |
| 120 #define WLAN_QUADRATURE_ADDRESS 0x00000010 |
| 121 #define WLAN_QUADRATURE_OFFSET 0x00000010 |
| 122 #define WLAN_QUADRATURE_ADC_MSB 7 |
| 123 #define WLAN_QUADRATURE_ADC_LSB 4 |
| 124 #define WLAN_QUADRATURE_ADC_MASK 0x000000f0 |
| 125 #define WLAN_QUADRATURE_ADC_GET(x) (((x) & WLAN_QUADRATURE_ADC_MAS
K) >> WLAN_QUADRATURE_ADC_LSB) |
| 126 #define WLAN_QUADRATURE_ADC_SET(x) (((x) << WLAN_QUADRATURE_ADC_LS
B) & WLAN_QUADRATURE_ADC_MASK) |
| 127 #define WLAN_QUADRATURE_SEL_MSB 2 |
| 128 #define WLAN_QUADRATURE_SEL_LSB 2 |
| 129 #define WLAN_QUADRATURE_SEL_MASK 0x00000004 |
| 130 #define WLAN_QUADRATURE_SEL_GET(x) (((x) & WLAN_QUADRATURE_SEL_MAS
K) >> WLAN_QUADRATURE_SEL_LSB) |
| 131 #define WLAN_QUADRATURE_SEL_SET(x) (((x) << WLAN_QUADRATURE_SEL_LS
B) & WLAN_QUADRATURE_SEL_MASK) |
| 132 #define WLAN_QUADRATURE_DAC_MSB 1 |
| 133 #define WLAN_QUADRATURE_DAC_LSB 0 |
| 134 #define WLAN_QUADRATURE_DAC_MASK 0x00000003 |
| 135 #define WLAN_QUADRATURE_DAC_GET(x) (((x) & WLAN_QUADRATURE_DAC_MAS
K) >> WLAN_QUADRATURE_DAC_LSB) |
| 136 #define WLAN_QUADRATURE_DAC_SET(x) (((x) << WLAN_QUADRATURE_DAC_LS
B) & WLAN_QUADRATURE_DAC_MASK) |
| 137 |
| 138 #define WLAN_PLL_CONTROL_ADDRESS 0x00000014 |
| 139 #define WLAN_PLL_CONTROL_OFFSET 0x00000014 |
| 140 #define WLAN_PLL_CONTROL_DIG_TEST_CLK_MSB 20 |
| 141 #define WLAN_PLL_CONTROL_DIG_TEST_CLK_LSB 20 |
| 142 #define WLAN_PLL_CONTROL_DIG_TEST_CLK_MASK 0x00100000 |
| 143 #define WLAN_PLL_CONTROL_DIG_TEST_CLK_GET(x) (((x) & WLAN_PLL_CONTROL_DIG_TE
ST_CLK_MASK) >> WLAN_PLL_CONTROL_DIG_TEST_CLK_LSB) |
| 144 #define WLAN_PLL_CONTROL_DIG_TEST_CLK_SET(x) (((x) << WLAN_PLL_CONTROL_DIG_T
EST_CLK_LSB) & WLAN_PLL_CONTROL_DIG_TEST_CLK_MASK) |
| 145 #define WLAN_PLL_CONTROL_MAC_OVERRIDE_MSB 19 |
| 146 #define WLAN_PLL_CONTROL_MAC_OVERRIDE_LSB 19 |
| 147 #define WLAN_PLL_CONTROL_MAC_OVERRIDE_MASK 0x00080000 |
| 148 #define WLAN_PLL_CONTROL_MAC_OVERRIDE_GET(x) (((x) & WLAN_PLL_CONTROL_MAC_OV
ERRIDE_MASK) >> WLAN_PLL_CONTROL_MAC_OVERRIDE_LSB) |
| 149 #define WLAN_PLL_CONTROL_MAC_OVERRIDE_SET(x) (((x) << WLAN_PLL_CONTROL_MAC_O
VERRIDE_LSB) & WLAN_PLL_CONTROL_MAC_OVERRIDE_MASK) |
| 150 #define WLAN_PLL_CONTROL_NOPWD_MSB 18 |
| 151 #define WLAN_PLL_CONTROL_NOPWD_LSB 18 |
| 152 #define WLAN_PLL_CONTROL_NOPWD_MASK 0x00040000 |
| 153 #define WLAN_PLL_CONTROL_NOPWD_GET(x) (((x) & WLAN_PLL_CONTROL_NOPWD_
MASK) >> WLAN_PLL_CONTROL_NOPWD_LSB) |
| 154 #define WLAN_PLL_CONTROL_NOPWD_SET(x) (((x) << WLAN_PLL_CONTROL_NOPWD
_LSB) & WLAN_PLL_CONTROL_NOPWD_MASK) |
| 155 #define WLAN_PLL_CONTROL_UPDATING_MSB 17 |
| 156 #define WLAN_PLL_CONTROL_UPDATING_LSB 17 |
| 157 #define WLAN_PLL_CONTROL_UPDATING_MASK 0x00020000 |
| 158 #define WLAN_PLL_CONTROL_UPDATING_GET(x) (((x) & WLAN_PLL_CONTROL_UPDATI
NG_MASK) >> WLAN_PLL_CONTROL_UPDATING_LSB) |
| 159 #define WLAN_PLL_CONTROL_UPDATING_SET(x) (((x) << WLAN_PLL_CONTROL_UPDAT
ING_LSB) & WLAN_PLL_CONTROL_UPDATING_MASK) |
| 160 #define WLAN_PLL_CONTROL_BYPASS_MSB 16 |
| 161 #define WLAN_PLL_CONTROL_BYPASS_LSB 16 |
| 162 #define WLAN_PLL_CONTROL_BYPASS_MASK 0x00010000 |
| 163 #define WLAN_PLL_CONTROL_BYPASS_GET(x) (((x) & WLAN_PLL_CONTROL_BYPASS
_MASK) >> WLAN_PLL_CONTROL_BYPASS_LSB) |
| 164 #define WLAN_PLL_CONTROL_BYPASS_SET(x) (((x) << WLAN_PLL_CONTROL_BYPAS
S_LSB) & WLAN_PLL_CONTROL_BYPASS_MASK) |
| 165 #define WLAN_PLL_CONTROL_REFDIV_MSB 15 |
| 166 #define WLAN_PLL_CONTROL_REFDIV_LSB 12 |
| 167 #define WLAN_PLL_CONTROL_REFDIV_MASK 0x0000f000 |
| 168 #define WLAN_PLL_CONTROL_REFDIV_GET(x) (((x) & WLAN_PLL_CONTROL_REFDIV
_MASK) >> WLAN_PLL_CONTROL_REFDIV_LSB) |
| 169 #define WLAN_PLL_CONTROL_REFDIV_SET(x) (((x) << WLAN_PLL_CONTROL_REFDI
V_LSB) & WLAN_PLL_CONTROL_REFDIV_MASK) |
| 170 #define WLAN_PLL_CONTROL_DIV_MSB 9 |
| 171 #define WLAN_PLL_CONTROL_DIV_LSB 0 |
| 172 #define WLAN_PLL_CONTROL_DIV_MASK 0x000003ff |
| 173 #define WLAN_PLL_CONTROL_DIV_GET(x) (((x) & WLAN_PLL_CONTROL_DIV_MA
SK) >> WLAN_PLL_CONTROL_DIV_LSB) |
| 174 #define WLAN_PLL_CONTROL_DIV_SET(x) (((x) << WLAN_PLL_CONTROL_DIV_L
SB) & WLAN_PLL_CONTROL_DIV_MASK) |
| 175 |
| 176 #define WLAN_PLL_SETTLE_ADDRESS 0x00000018 |
| 177 #define WLAN_PLL_SETTLE_OFFSET 0x00000018 |
| 178 #define WLAN_PLL_SETTLE_TIME_MSB 11 |
| 179 #define WLAN_PLL_SETTLE_TIME_LSB 0 |
| 180 #define WLAN_PLL_SETTLE_TIME_MASK 0x00000fff |
| 181 #define WLAN_PLL_SETTLE_TIME_GET(x) (((x) & WLAN_PLL_SETTLE_TIME_MA
SK) >> WLAN_PLL_SETTLE_TIME_LSB) |
| 182 #define WLAN_PLL_SETTLE_TIME_SET(x) (((x) << WLAN_PLL_SETTLE_TIME_L
SB) & WLAN_PLL_SETTLE_TIME_MASK) |
| 183 |
| 184 #define WLAN_XTAL_SETTLE_ADDRESS 0x0000001c |
| 185 #define WLAN_XTAL_SETTLE_OFFSET 0x0000001c |
| 186 #define WLAN_XTAL_SETTLE_TIME_MSB 7 |
| 187 #define WLAN_XTAL_SETTLE_TIME_LSB 0 |
| 188 #define WLAN_XTAL_SETTLE_TIME_MASK 0x000000ff |
| 189 #define WLAN_XTAL_SETTLE_TIME_GET(x) (((x) & WLAN_XTAL_SETTLE_TIME_M
ASK) >> WLAN_XTAL_SETTLE_TIME_LSB) |
| 190 #define WLAN_XTAL_SETTLE_TIME_SET(x) (((x) << WLAN_XTAL_SETTLE_TIME_
LSB) & WLAN_XTAL_SETTLE_TIME_MASK) |
| 191 |
| 192 #define WLAN_CPU_CLOCK_ADDRESS 0x00000020 |
| 193 #define WLAN_CPU_CLOCK_OFFSET 0x00000020 |
| 194 #define WLAN_CPU_CLOCK_STANDARD_MSB 1 |
| 195 #define WLAN_CPU_CLOCK_STANDARD_LSB 0 |
| 196 #define WLAN_CPU_CLOCK_STANDARD_MASK 0x00000003 |
| 197 #define WLAN_CPU_CLOCK_STANDARD_GET(x) (((x) & WLAN_CPU_CLOCK_STANDARD
_MASK) >> WLAN_CPU_CLOCK_STANDARD_LSB) |
| 198 #define WLAN_CPU_CLOCK_STANDARD_SET(x) (((x) << WLAN_CPU_CLOCK_STANDAR
D_LSB) & WLAN_CPU_CLOCK_STANDARD_MASK) |
| 199 |
| 200 #define WLAN_CLOCK_OUT_ADDRESS 0x00000024 |
| 201 #define WLAN_CLOCK_OUT_OFFSET 0x00000024 |
| 202 #define WLAN_CLOCK_OUT_SELECT_MSB 3 |
| 203 #define WLAN_CLOCK_OUT_SELECT_LSB 0 |
| 204 #define WLAN_CLOCK_OUT_SELECT_MASK 0x0000000f |
| 205 #define WLAN_CLOCK_OUT_SELECT_GET(x) (((x) & WLAN_CLOCK_OUT_SELECT_M
ASK) >> WLAN_CLOCK_OUT_SELECT_LSB) |
| 206 #define WLAN_CLOCK_OUT_SELECT_SET(x) (((x) << WLAN_CLOCK_OUT_SELECT_
LSB) & WLAN_CLOCK_OUT_SELECT_MASK) |
| 207 |
| 208 #define WLAN_CLOCK_CONTROL_ADDRESS 0x00000028 |
| 209 #define WLAN_CLOCK_CONTROL_OFFSET 0x00000028 |
| 210 #define WLAN_CLOCK_CONTROL_LF_CLK32_MSB 2 |
| 211 #define WLAN_CLOCK_CONTROL_LF_CLK32_LSB 2 |
| 212 #define WLAN_CLOCK_CONTROL_LF_CLK32_MASK 0x00000004 |
| 213 #define WLAN_CLOCK_CONTROL_LF_CLK32_GET(x) (((x) & WLAN_CLOCK_CONTROL_LF_C
LK32_MASK) >> WLAN_CLOCK_CONTROL_LF_CLK32_LSB) |
| 214 #define WLAN_CLOCK_CONTROL_LF_CLK32_SET(x) (((x) << WLAN_CLOCK_CONTROL_LF_
CLK32_LSB) & WLAN_CLOCK_CONTROL_LF_CLK32_MASK) |
| 215 #define WLAN_CLOCK_CONTROL_SI0_CLK_MSB 0 |
| 216 #define WLAN_CLOCK_CONTROL_SI0_CLK_LSB 0 |
| 217 #define WLAN_CLOCK_CONTROL_SI0_CLK_MASK 0x00000001 |
| 218 #define WLAN_CLOCK_CONTROL_SI0_CLK_GET(x) (((x) & WLAN_CLOCK_CONTROL_SI0_
CLK_MASK) >> WLAN_CLOCK_CONTROL_SI0_CLK_LSB) |
| 219 #define WLAN_CLOCK_CONTROL_SI0_CLK_SET(x) (((x) << WLAN_CLOCK_CONTROL_SI0
_CLK_LSB) & WLAN_CLOCK_CONTROL_SI0_CLK_MASK) |
| 220 |
| 221 #define WLAN_BIAS_OVERRIDE_ADDRESS 0x0000002c |
| 222 #define WLAN_BIAS_OVERRIDE_OFFSET 0x0000002c |
| 223 #define WLAN_BIAS_OVERRIDE_ON_MSB 0 |
| 224 #define WLAN_BIAS_OVERRIDE_ON_LSB 0 |
| 225 #define WLAN_BIAS_OVERRIDE_ON_MASK 0x00000001 |
| 226 #define WLAN_BIAS_OVERRIDE_ON_GET(x) (((x) & WLAN_BIAS_OVERRIDE_ON_M
ASK) >> WLAN_BIAS_OVERRIDE_ON_LSB) |
| 227 #define WLAN_BIAS_OVERRIDE_ON_SET(x) (((x) << WLAN_BIAS_OVERRIDE_ON_
LSB) & WLAN_BIAS_OVERRIDE_ON_MASK) |
| 228 |
| 229 #define WLAN_WDT_CONTROL_ADDRESS 0x00000030 |
| 230 #define WLAN_WDT_CONTROL_OFFSET 0x00000030 |
| 231 #define WLAN_WDT_CONTROL_ACTION_MSB 2 |
| 232 #define WLAN_WDT_CONTROL_ACTION_LSB 0 |
| 233 #define WLAN_WDT_CONTROL_ACTION_MASK 0x00000007 |
| 234 #define WLAN_WDT_CONTROL_ACTION_GET(x) (((x) & WLAN_WDT_CONTROL_ACTION
_MASK) >> WLAN_WDT_CONTROL_ACTION_LSB) |
| 235 #define WLAN_WDT_CONTROL_ACTION_SET(x) (((x) << WLAN_WDT_CONTROL_ACTIO
N_LSB) & WLAN_WDT_CONTROL_ACTION_MASK) |
| 236 |
| 237 #define WLAN_WDT_STATUS_ADDRESS 0x00000034 |
| 238 #define WLAN_WDT_STATUS_OFFSET 0x00000034 |
| 239 #define WLAN_WDT_STATUS_INTERRUPT_MSB 0 |
| 240 #define WLAN_WDT_STATUS_INTERRUPT_LSB 0 |
| 241 #define WLAN_WDT_STATUS_INTERRUPT_MASK 0x00000001 |
| 242 #define WLAN_WDT_STATUS_INTERRUPT_GET(x) (((x) & WLAN_WDT_STATUS_INTERRU
PT_MASK) >> WLAN_WDT_STATUS_INTERRUPT_LSB) |
| 243 #define WLAN_WDT_STATUS_INTERRUPT_SET(x) (((x) << WLAN_WDT_STATUS_INTERR
UPT_LSB) & WLAN_WDT_STATUS_INTERRUPT_MASK) |
| 244 |
| 245 #define WLAN_WDT_ADDRESS 0x00000038 |
| 246 #define WLAN_WDT_OFFSET 0x00000038 |
| 247 #define WLAN_WDT_TARGET_MSB 21 |
| 248 #define WLAN_WDT_TARGET_LSB 0 |
| 249 #define WLAN_WDT_TARGET_MASK 0x003fffff |
| 250 #define WLAN_WDT_TARGET_GET(x) (((x) & WLAN_WDT_TARGET_MASK) >
> WLAN_WDT_TARGET_LSB) |
| 251 #define WLAN_WDT_TARGET_SET(x) (((x) << WLAN_WDT_TARGET_LSB) &
WLAN_WDT_TARGET_MASK) |
| 252 |
| 253 #define WLAN_WDT_COUNT_ADDRESS 0x0000003c |
| 254 #define WLAN_WDT_COUNT_OFFSET 0x0000003c |
| 255 #define WLAN_WDT_COUNT_VALUE_MSB 21 |
| 256 #define WLAN_WDT_COUNT_VALUE_LSB 0 |
| 257 #define WLAN_WDT_COUNT_VALUE_MASK 0x003fffff |
| 258 #define WLAN_WDT_COUNT_VALUE_GET(x) (((x) & WLAN_WDT_COUNT_VALUE_MA
SK) >> WLAN_WDT_COUNT_VALUE_LSB) |
| 259 #define WLAN_WDT_COUNT_VALUE_SET(x) (((x) << WLAN_WDT_COUNT_VALUE_L
SB) & WLAN_WDT_COUNT_VALUE_MASK) |
| 260 |
| 261 #define WLAN_WDT_RESET_ADDRESS 0x00000040 |
| 262 #define WLAN_WDT_RESET_OFFSET 0x00000040 |
| 263 #define WLAN_WDT_RESET_VALUE_MSB 0 |
| 264 #define WLAN_WDT_RESET_VALUE_LSB 0 |
| 265 #define WLAN_WDT_RESET_VALUE_MASK 0x00000001 |
| 266 #define WLAN_WDT_RESET_VALUE_GET(x) (((x) & WLAN_WDT_RESET_VALUE_MA
SK) >> WLAN_WDT_RESET_VALUE_LSB) |
| 267 #define WLAN_WDT_RESET_VALUE_SET(x) (((x) << WLAN_WDT_RESET_VALUE_L
SB) & WLAN_WDT_RESET_VALUE_MASK) |
| 268 |
| 269 #define WLAN_INT_STATUS_ADDRESS 0x00000044 |
| 270 #define WLAN_INT_STATUS_OFFSET 0x00000044 |
| 271 #define WLAN_INT_STATUS_HCI_UART_MSB 21 |
| 272 #define WLAN_INT_STATUS_HCI_UART_LSB 21 |
| 273 #define WLAN_INT_STATUS_HCI_UART_MASK 0x00200000 |
| 274 #define WLAN_INT_STATUS_HCI_UART_GET(x) (((x) & WLAN_INT_STATUS_HCI_UAR
T_MASK) >> WLAN_INT_STATUS_HCI_UART_LSB) |
| 275 #define WLAN_INT_STATUS_HCI_UART_SET(x) (((x) << WLAN_INT_STATUS_HCI_UA
RT_LSB) & WLAN_INT_STATUS_HCI_UART_MASK) |
| 276 #define WLAN_INT_STATUS_THERM_MSB 20 |
| 277 #define WLAN_INT_STATUS_THERM_LSB 20 |
| 278 #define WLAN_INT_STATUS_THERM_MASK 0x00100000 |
| 279 #define WLAN_INT_STATUS_THERM_GET(x) (((x) & WLAN_INT_STATUS_THERM_M
ASK) >> WLAN_INT_STATUS_THERM_LSB) |
| 280 #define WLAN_INT_STATUS_THERM_SET(x) (((x) << WLAN_INT_STATUS_THERM_
LSB) & WLAN_INT_STATUS_THERM_MASK) |
| 281 #define WLAN_INT_STATUS_EFUSE_OVERWRITE_MSB 19 |
| 282 #define WLAN_INT_STATUS_EFUSE_OVERWRITE_LSB 19 |
| 283 #define WLAN_INT_STATUS_EFUSE_OVERWRITE_MASK 0x00080000 |
| 284 #define WLAN_INT_STATUS_EFUSE_OVERWRITE_GET(x) (((x) & WLAN_INT_STATUS_EFUSE_O
VERWRITE_MASK) >> WLAN_INT_STATUS_EFUSE_OVERWRITE_LSB) |
| 285 #define WLAN_INT_STATUS_EFUSE_OVERWRITE_SET(x) (((x) << WLAN_INT_STATUS_EFUSE_
OVERWRITE_LSB) & WLAN_INT_STATUS_EFUSE_OVERWRITE_MASK) |
| 286 #define WLAN_INT_STATUS_UART_MBOX_MSB 18 |
| 287 #define WLAN_INT_STATUS_UART_MBOX_LSB 18 |
| 288 #define WLAN_INT_STATUS_UART_MBOX_MASK 0x00040000 |
| 289 #define WLAN_INT_STATUS_UART_MBOX_GET(x) (((x) & WLAN_INT_STATUS_UART_MB
OX_MASK) >> WLAN_INT_STATUS_UART_MBOX_LSB) |
| 290 #define WLAN_INT_STATUS_UART_MBOX_SET(x) (((x) << WLAN_INT_STATUS_UART_M
BOX_LSB) & WLAN_INT_STATUS_UART_MBOX_MASK) |
| 291 #define WLAN_INT_STATUS_GENERIC_MBOX_MSB 17 |
| 292 #define WLAN_INT_STATUS_GENERIC_MBOX_LSB 17 |
| 293 #define WLAN_INT_STATUS_GENERIC_MBOX_MASK 0x00020000 |
| 294 #define WLAN_INT_STATUS_GENERIC_MBOX_GET(x) (((x) & WLAN_INT_STATUS_GENERIC
_MBOX_MASK) >> WLAN_INT_STATUS_GENERIC_MBOX_LSB) |
| 295 #define WLAN_INT_STATUS_GENERIC_MBOX_SET(x) (((x) << WLAN_INT_STATUS_GENERI
C_MBOX_LSB) & WLAN_INT_STATUS_GENERIC_MBOX_MASK) |
| 296 #define WLAN_INT_STATUS_RDMA_MSB 16 |
| 297 #define WLAN_INT_STATUS_RDMA_LSB 16 |
| 298 #define WLAN_INT_STATUS_RDMA_MASK 0x00010000 |
| 299 #define WLAN_INT_STATUS_RDMA_GET(x) (((x) & WLAN_INT_STATUS_RDMA_MA
SK) >> WLAN_INT_STATUS_RDMA_LSB) |
| 300 #define WLAN_INT_STATUS_RDMA_SET(x) (((x) << WLAN_INT_STATUS_RDMA_L
SB) & WLAN_INT_STATUS_RDMA_MASK) |
| 301 #define WLAN_INT_STATUS_BTCOEX_MSB 15 |
| 302 #define WLAN_INT_STATUS_BTCOEX_LSB 15 |
| 303 #define WLAN_INT_STATUS_BTCOEX_MASK 0x00008000 |
| 304 #define WLAN_INT_STATUS_BTCOEX_GET(x) (((x) & WLAN_INT_STATUS_BTCOEX_
MASK) >> WLAN_INT_STATUS_BTCOEX_LSB) |
| 305 #define WLAN_INT_STATUS_BTCOEX_SET(x) (((x) << WLAN_INT_STATUS_BTCOEX
_LSB) & WLAN_INT_STATUS_BTCOEX_MASK) |
| 306 #define WLAN_INT_STATUS_RTC_POWER_MSB 14 |
| 307 #define WLAN_INT_STATUS_RTC_POWER_LSB 14 |
| 308 #define WLAN_INT_STATUS_RTC_POWER_MASK 0x00004000 |
| 309 #define WLAN_INT_STATUS_RTC_POWER_GET(x) (((x) & WLAN_INT_STATUS_RTC_POW
ER_MASK) >> WLAN_INT_STATUS_RTC_POWER_LSB) |
| 310 #define WLAN_INT_STATUS_RTC_POWER_SET(x) (((x) << WLAN_INT_STATUS_RTC_PO
WER_LSB) & WLAN_INT_STATUS_RTC_POWER_MASK) |
| 311 #define WLAN_INT_STATUS_MAC_MSB 13 |
| 312 #define WLAN_INT_STATUS_MAC_LSB 13 |
| 313 #define WLAN_INT_STATUS_MAC_MASK 0x00002000 |
| 314 #define WLAN_INT_STATUS_MAC_GET(x) (((x) & WLAN_INT_STATUS_MAC_MAS
K) >> WLAN_INT_STATUS_MAC_LSB) |
| 315 #define WLAN_INT_STATUS_MAC_SET(x) (((x) << WLAN_INT_STATUS_MAC_LS
B) & WLAN_INT_STATUS_MAC_MASK) |
| 316 #define WLAN_INT_STATUS_MAILBOX_MSB 12 |
| 317 #define WLAN_INT_STATUS_MAILBOX_LSB 12 |
| 318 #define WLAN_INT_STATUS_MAILBOX_MASK 0x00001000 |
| 319 #define WLAN_INT_STATUS_MAILBOX_GET(x) (((x) & WLAN_INT_STATUS_MAILBOX
_MASK) >> WLAN_INT_STATUS_MAILBOX_LSB) |
| 320 #define WLAN_INT_STATUS_MAILBOX_SET(x) (((x) << WLAN_INT_STATUS_MAILBO
X_LSB) & WLAN_INT_STATUS_MAILBOX_MASK) |
| 321 #define WLAN_INT_STATUS_RTC_ALARM_MSB 11 |
| 322 #define WLAN_INT_STATUS_RTC_ALARM_LSB 11 |
| 323 #define WLAN_INT_STATUS_RTC_ALARM_MASK 0x00000800 |
| 324 #define WLAN_INT_STATUS_RTC_ALARM_GET(x) (((x) & WLAN_INT_STATUS_RTC_ALA
RM_MASK) >> WLAN_INT_STATUS_RTC_ALARM_LSB) |
| 325 #define WLAN_INT_STATUS_RTC_ALARM_SET(x) (((x) << WLAN_INT_STATUS_RTC_AL
ARM_LSB) & WLAN_INT_STATUS_RTC_ALARM_MASK) |
| 326 #define WLAN_INT_STATUS_HF_TIMER_MSB 10 |
| 327 #define WLAN_INT_STATUS_HF_TIMER_LSB 10 |
| 328 #define WLAN_INT_STATUS_HF_TIMER_MASK 0x00000400 |
| 329 #define WLAN_INT_STATUS_HF_TIMER_GET(x) (((x) & WLAN_INT_STATUS_HF_TIME
R_MASK) >> WLAN_INT_STATUS_HF_TIMER_LSB) |
| 330 #define WLAN_INT_STATUS_HF_TIMER_SET(x) (((x) << WLAN_INT_STATUS_HF_TIM
ER_LSB) & WLAN_INT_STATUS_HF_TIMER_MASK) |
| 331 #define WLAN_INT_STATUS_LF_TIMER3_MSB 9 |
| 332 #define WLAN_INT_STATUS_LF_TIMER3_LSB 9 |
| 333 #define WLAN_INT_STATUS_LF_TIMER3_MASK 0x00000200 |
| 334 #define WLAN_INT_STATUS_LF_TIMER3_GET(x) (((x) & WLAN_INT_STATUS_LF_TIME
R3_MASK) >> WLAN_INT_STATUS_LF_TIMER3_LSB) |
| 335 #define WLAN_INT_STATUS_LF_TIMER3_SET(x) (((x) << WLAN_INT_STATUS_LF_TIM
ER3_LSB) & WLAN_INT_STATUS_LF_TIMER3_MASK) |
| 336 #define WLAN_INT_STATUS_LF_TIMER2_MSB 8 |
| 337 #define WLAN_INT_STATUS_LF_TIMER2_LSB 8 |
| 338 #define WLAN_INT_STATUS_LF_TIMER2_MASK 0x00000100 |
| 339 #define WLAN_INT_STATUS_LF_TIMER2_GET(x) (((x) & WLAN_INT_STATUS_LF_TIME
R2_MASK) >> WLAN_INT_STATUS_LF_TIMER2_LSB) |
| 340 #define WLAN_INT_STATUS_LF_TIMER2_SET(x) (((x) << WLAN_INT_STATUS_LF_TIM
ER2_LSB) & WLAN_INT_STATUS_LF_TIMER2_MASK) |
| 341 #define WLAN_INT_STATUS_LF_TIMER1_MSB 7 |
| 342 #define WLAN_INT_STATUS_LF_TIMER1_LSB 7 |
| 343 #define WLAN_INT_STATUS_LF_TIMER1_MASK 0x00000080 |
| 344 #define WLAN_INT_STATUS_LF_TIMER1_GET(x) (((x) & WLAN_INT_STATUS_LF_TIME
R1_MASK) >> WLAN_INT_STATUS_LF_TIMER1_LSB) |
| 345 #define WLAN_INT_STATUS_LF_TIMER1_SET(x) (((x) << WLAN_INT_STATUS_LF_TIM
ER1_LSB) & WLAN_INT_STATUS_LF_TIMER1_MASK) |
| 346 #define WLAN_INT_STATUS_LF_TIMER0_MSB 6 |
| 347 #define WLAN_INT_STATUS_LF_TIMER0_LSB 6 |
| 348 #define WLAN_INT_STATUS_LF_TIMER0_MASK 0x00000040 |
| 349 #define WLAN_INT_STATUS_LF_TIMER0_GET(x) (((x) & WLAN_INT_STATUS_LF_TIME
R0_MASK) >> WLAN_INT_STATUS_LF_TIMER0_LSB) |
| 350 #define WLAN_INT_STATUS_LF_TIMER0_SET(x) (((x) << WLAN_INT_STATUS_LF_TIM
ER0_LSB) & WLAN_INT_STATUS_LF_TIMER0_MASK) |
| 351 #define WLAN_INT_STATUS_KEYPAD_MSB 5 |
| 352 #define WLAN_INT_STATUS_KEYPAD_LSB 5 |
| 353 #define WLAN_INT_STATUS_KEYPAD_MASK 0x00000020 |
| 354 #define WLAN_INT_STATUS_KEYPAD_GET(x) (((x) & WLAN_INT_STATUS_KEYPAD_
MASK) >> WLAN_INT_STATUS_KEYPAD_LSB) |
| 355 #define WLAN_INT_STATUS_KEYPAD_SET(x) (((x) << WLAN_INT_STATUS_KEYPAD
_LSB) & WLAN_INT_STATUS_KEYPAD_MASK) |
| 356 #define WLAN_INT_STATUS_SI_MSB 4 |
| 357 #define WLAN_INT_STATUS_SI_LSB 4 |
| 358 #define WLAN_INT_STATUS_SI_MASK 0x00000010 |
| 359 #define WLAN_INT_STATUS_SI_GET(x) (((x) & WLAN_INT_STATUS_SI_MASK
) >> WLAN_INT_STATUS_SI_LSB) |
| 360 #define WLAN_INT_STATUS_SI_SET(x) (((x) << WLAN_INT_STATUS_SI_LSB
) & WLAN_INT_STATUS_SI_MASK) |
| 361 #define WLAN_INT_STATUS_GPIO_MSB 3 |
| 362 #define WLAN_INT_STATUS_GPIO_LSB 3 |
| 363 #define WLAN_INT_STATUS_GPIO_MASK 0x00000008 |
| 364 #define WLAN_INT_STATUS_GPIO_GET(x) (((x) & WLAN_INT_STATUS_GPIO_MA
SK) >> WLAN_INT_STATUS_GPIO_LSB) |
| 365 #define WLAN_INT_STATUS_GPIO_SET(x) (((x) << WLAN_INT_STATUS_GPIO_L
SB) & WLAN_INT_STATUS_GPIO_MASK) |
| 366 #define WLAN_INT_STATUS_UART_MSB 2 |
| 367 #define WLAN_INT_STATUS_UART_LSB 2 |
| 368 #define WLAN_INT_STATUS_UART_MASK 0x00000004 |
| 369 #define WLAN_INT_STATUS_UART_GET(x) (((x) & WLAN_INT_STATUS_UART_MA
SK) >> WLAN_INT_STATUS_UART_LSB) |
| 370 #define WLAN_INT_STATUS_UART_SET(x) (((x) << WLAN_INT_STATUS_UART_L
SB) & WLAN_INT_STATUS_UART_MASK) |
| 371 #define WLAN_INT_STATUS_ERROR_MSB 1 |
| 372 #define WLAN_INT_STATUS_ERROR_LSB 1 |
| 373 #define WLAN_INT_STATUS_ERROR_MASK 0x00000002 |
| 374 #define WLAN_INT_STATUS_ERROR_GET(x) (((x) & WLAN_INT_STATUS_ERROR_M
ASK) >> WLAN_INT_STATUS_ERROR_LSB) |
| 375 #define WLAN_INT_STATUS_ERROR_SET(x) (((x) << WLAN_INT_STATUS_ERROR_
LSB) & WLAN_INT_STATUS_ERROR_MASK) |
| 376 #define WLAN_INT_STATUS_WDT_INT_MSB 0 |
| 377 #define WLAN_INT_STATUS_WDT_INT_LSB 0 |
| 378 #define WLAN_INT_STATUS_WDT_INT_MASK 0x00000001 |
| 379 #define WLAN_INT_STATUS_WDT_INT_GET(x) (((x) & WLAN_INT_STATUS_WDT_INT
_MASK) >> WLAN_INT_STATUS_WDT_INT_LSB) |
| 380 #define WLAN_INT_STATUS_WDT_INT_SET(x) (((x) << WLAN_INT_STATUS_WDT_IN
T_LSB) & WLAN_INT_STATUS_WDT_INT_MASK) |
| 381 |
| 382 #define WLAN_LF_TIMER0_ADDRESS 0x00000048 |
| 383 #define WLAN_LF_TIMER0_OFFSET 0x00000048 |
| 384 #define WLAN_LF_TIMER0_TARGET_MSB 31 |
| 385 #define WLAN_LF_TIMER0_TARGET_LSB 0 |
| 386 #define WLAN_LF_TIMER0_TARGET_MASK 0xffffffff |
| 387 #define WLAN_LF_TIMER0_TARGET_GET(x) (((x) & WLAN_LF_TIMER0_TARGET_M
ASK) >> WLAN_LF_TIMER0_TARGET_LSB) |
| 388 #define WLAN_LF_TIMER0_TARGET_SET(x) (((x) << WLAN_LF_TIMER0_TARGET_
LSB) & WLAN_LF_TIMER0_TARGET_MASK) |
| 389 |
| 390 #define WLAN_LF_TIMER_COUNT0_ADDRESS 0x0000004c |
| 391 #define WLAN_LF_TIMER_COUNT0_OFFSET 0x0000004c |
| 392 #define WLAN_LF_TIMER_COUNT0_VALUE_MSB 31 |
| 393 #define WLAN_LF_TIMER_COUNT0_VALUE_LSB 0 |
| 394 #define WLAN_LF_TIMER_COUNT0_VALUE_MASK 0xffffffff |
| 395 #define WLAN_LF_TIMER_COUNT0_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT0_VA
LUE_MASK) >> WLAN_LF_TIMER_COUNT0_VALUE_LSB) |
| 396 #define WLAN_LF_TIMER_COUNT0_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT0_V
ALUE_LSB) & WLAN_LF_TIMER_COUNT0_VALUE_MASK) |
| 397 |
| 398 #define WLAN_LF_TIMER_CONTROL0_ADDRESS 0x00000050 |
| 399 #define WLAN_LF_TIMER_CONTROL0_OFFSET 0x00000050 |
| 400 #define WLAN_LF_TIMER_CONTROL0_ENABLE_MSB 2 |
| 401 #define WLAN_LF_TIMER_CONTROL0_ENABLE_LSB 2 |
| 402 #define WLAN_LF_TIMER_CONTROL0_ENABLE_MASK 0x00000004 |
| 403 #define WLAN_LF_TIMER_CONTROL0_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL0_
ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL0_ENABLE_LSB) |
| 404 #define WLAN_LF_TIMER_CONTROL0_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL0
_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL0_ENABLE_MASK) |
| 405 #define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MSB 1 |
| 406 #define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_LSB 1 |
| 407 #define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MASK 0x00000002 |
| 408 #define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL
0_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_LSB) |
| 409 #define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTRO
L0_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MASK) |
| 410 #define WLAN_LF_TIMER_CONTROL0_RESET_MSB 0 |
| 411 #define WLAN_LF_TIMER_CONTROL0_RESET_LSB 0 |
| 412 #define WLAN_LF_TIMER_CONTROL0_RESET_MASK 0x00000001 |
| 413 #define WLAN_LF_TIMER_CONTROL0_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL0_
RESET_MASK) >> WLAN_LF_TIMER_CONTROL0_RESET_LSB) |
| 414 #define WLAN_LF_TIMER_CONTROL0_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL0
_RESET_LSB) & WLAN_LF_TIMER_CONTROL0_RESET_MASK) |
| 415 |
| 416 #define WLAN_LF_TIMER_STATUS0_ADDRESS 0x00000054 |
| 417 #define WLAN_LF_TIMER_STATUS0_OFFSET 0x00000054 |
| 418 #define WLAN_LF_TIMER_STATUS0_INTERRUPT_MSB 0 |
| 419 #define WLAN_LF_TIMER_STATUS0_INTERRUPT_LSB 0 |
| 420 #define WLAN_LF_TIMER_STATUS0_INTERRUPT_MASK 0x00000001 |
| 421 #define WLAN_LF_TIMER_STATUS0_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS0_I
NTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS0_INTERRUPT_LSB) |
| 422 #define WLAN_LF_TIMER_STATUS0_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS0_
INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS0_INTERRUPT_MASK) |
| 423 |
| 424 #define WLAN_LF_TIMER1_ADDRESS 0x00000058 |
| 425 #define WLAN_LF_TIMER1_OFFSET 0x00000058 |
| 426 #define WLAN_LF_TIMER1_TARGET_MSB 31 |
| 427 #define WLAN_LF_TIMER1_TARGET_LSB 0 |
| 428 #define WLAN_LF_TIMER1_TARGET_MASK 0xffffffff |
| 429 #define WLAN_LF_TIMER1_TARGET_GET(x) (((x) & WLAN_LF_TIMER1_TARGET_M
ASK) >> WLAN_LF_TIMER1_TARGET_LSB) |
| 430 #define WLAN_LF_TIMER1_TARGET_SET(x) (((x) << WLAN_LF_TIMER1_TARGET_
LSB) & WLAN_LF_TIMER1_TARGET_MASK) |
| 431 |
| 432 #define WLAN_LF_TIMER_COUNT1_ADDRESS 0x0000005c |
| 433 #define WLAN_LF_TIMER_COUNT1_OFFSET 0x0000005c |
| 434 #define WLAN_LF_TIMER_COUNT1_VALUE_MSB 31 |
| 435 #define WLAN_LF_TIMER_COUNT1_VALUE_LSB 0 |
| 436 #define WLAN_LF_TIMER_COUNT1_VALUE_MASK 0xffffffff |
| 437 #define WLAN_LF_TIMER_COUNT1_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT1_VA
LUE_MASK) >> WLAN_LF_TIMER_COUNT1_VALUE_LSB) |
| 438 #define WLAN_LF_TIMER_COUNT1_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT1_V
ALUE_LSB) & WLAN_LF_TIMER_COUNT1_VALUE_MASK) |
| 439 |
| 440 #define WLAN_LF_TIMER_CONTROL1_ADDRESS 0x00000060 |
| 441 #define WLAN_LF_TIMER_CONTROL1_OFFSET 0x00000060 |
| 442 #define WLAN_LF_TIMER_CONTROL1_ENABLE_MSB 2 |
| 443 #define WLAN_LF_TIMER_CONTROL1_ENABLE_LSB 2 |
| 444 #define WLAN_LF_TIMER_CONTROL1_ENABLE_MASK 0x00000004 |
| 445 #define WLAN_LF_TIMER_CONTROL1_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL1_
ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL1_ENABLE_LSB) |
| 446 #define WLAN_LF_TIMER_CONTROL1_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL1
_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL1_ENABLE_MASK) |
| 447 #define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MSB 1 |
| 448 #define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_LSB 1 |
| 449 #define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MASK 0x00000002 |
| 450 #define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL
1_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_LSB) |
| 451 #define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTRO
L1_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MASK) |
| 452 #define WLAN_LF_TIMER_CONTROL1_RESET_MSB 0 |
| 453 #define WLAN_LF_TIMER_CONTROL1_RESET_LSB 0 |
| 454 #define WLAN_LF_TIMER_CONTROL1_RESET_MASK 0x00000001 |
| 455 #define WLAN_LF_TIMER_CONTROL1_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL1_
RESET_MASK) >> WLAN_LF_TIMER_CONTROL1_RESET_LSB) |
| 456 #define WLAN_LF_TIMER_CONTROL1_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL1
_RESET_LSB) & WLAN_LF_TIMER_CONTROL1_RESET_MASK) |
| 457 |
| 458 #define WLAN_LF_TIMER_STATUS1_ADDRESS 0x00000064 |
| 459 #define WLAN_LF_TIMER_STATUS1_OFFSET 0x00000064 |
| 460 #define WLAN_LF_TIMER_STATUS1_INTERRUPT_MSB 0 |
| 461 #define WLAN_LF_TIMER_STATUS1_INTERRUPT_LSB 0 |
| 462 #define WLAN_LF_TIMER_STATUS1_INTERRUPT_MASK 0x00000001 |
| 463 #define WLAN_LF_TIMER_STATUS1_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS1_I
NTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS1_INTERRUPT_LSB) |
| 464 #define WLAN_LF_TIMER_STATUS1_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS1_
INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS1_INTERRUPT_MASK) |
| 465 |
| 466 #define WLAN_LF_TIMER2_ADDRESS 0x00000068 |
| 467 #define WLAN_LF_TIMER2_OFFSET 0x00000068 |
| 468 #define WLAN_LF_TIMER2_TARGET_MSB 31 |
| 469 #define WLAN_LF_TIMER2_TARGET_LSB 0 |
| 470 #define WLAN_LF_TIMER2_TARGET_MASK 0xffffffff |
| 471 #define WLAN_LF_TIMER2_TARGET_GET(x) (((x) & WLAN_LF_TIMER2_TARGET_M
ASK) >> WLAN_LF_TIMER2_TARGET_LSB) |
| 472 #define WLAN_LF_TIMER2_TARGET_SET(x) (((x) << WLAN_LF_TIMER2_TARGET_
LSB) & WLAN_LF_TIMER2_TARGET_MASK) |
| 473 |
| 474 #define WLAN_LF_TIMER_COUNT2_ADDRESS 0x0000006c |
| 475 #define WLAN_LF_TIMER_COUNT2_OFFSET 0x0000006c |
| 476 #define WLAN_LF_TIMER_COUNT2_VALUE_MSB 31 |
| 477 #define WLAN_LF_TIMER_COUNT2_VALUE_LSB 0 |
| 478 #define WLAN_LF_TIMER_COUNT2_VALUE_MASK 0xffffffff |
| 479 #define WLAN_LF_TIMER_COUNT2_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT2_VA
LUE_MASK) >> WLAN_LF_TIMER_COUNT2_VALUE_LSB) |
| 480 #define WLAN_LF_TIMER_COUNT2_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT2_V
ALUE_LSB) & WLAN_LF_TIMER_COUNT2_VALUE_MASK) |
| 481 |
| 482 #define WLAN_LF_TIMER_CONTROL2_ADDRESS 0x00000070 |
| 483 #define WLAN_LF_TIMER_CONTROL2_OFFSET 0x00000070 |
| 484 #define WLAN_LF_TIMER_CONTROL2_ENABLE_MSB 2 |
| 485 #define WLAN_LF_TIMER_CONTROL2_ENABLE_LSB 2 |
| 486 #define WLAN_LF_TIMER_CONTROL2_ENABLE_MASK 0x00000004 |
| 487 #define WLAN_LF_TIMER_CONTROL2_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL2_
ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL2_ENABLE_LSB) |
| 488 #define WLAN_LF_TIMER_CONTROL2_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL2
_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL2_ENABLE_MASK) |
| 489 #define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MSB 1 |
| 490 #define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_LSB 1 |
| 491 #define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MASK 0x00000002 |
| 492 #define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL
2_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_LSB) |
| 493 #define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTRO
L2_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MASK) |
| 494 #define WLAN_LF_TIMER_CONTROL2_RESET_MSB 0 |
| 495 #define WLAN_LF_TIMER_CONTROL2_RESET_LSB 0 |
| 496 #define WLAN_LF_TIMER_CONTROL2_RESET_MASK 0x00000001 |
| 497 #define WLAN_LF_TIMER_CONTROL2_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL2_
RESET_MASK) >> WLAN_LF_TIMER_CONTROL2_RESET_LSB) |
| 498 #define WLAN_LF_TIMER_CONTROL2_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL2
_RESET_LSB) & WLAN_LF_TIMER_CONTROL2_RESET_MASK) |
| 499 |
| 500 #define WLAN_LF_TIMER_STATUS2_ADDRESS 0x00000074 |
| 501 #define WLAN_LF_TIMER_STATUS2_OFFSET 0x00000074 |
| 502 #define WLAN_LF_TIMER_STATUS2_INTERRUPT_MSB 0 |
| 503 #define WLAN_LF_TIMER_STATUS2_INTERRUPT_LSB 0 |
| 504 #define WLAN_LF_TIMER_STATUS2_INTERRUPT_MASK 0x00000001 |
| 505 #define WLAN_LF_TIMER_STATUS2_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS2_I
NTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS2_INTERRUPT_LSB) |
| 506 #define WLAN_LF_TIMER_STATUS2_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS2_
INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS2_INTERRUPT_MASK) |
| 507 |
| 508 #define WLAN_LF_TIMER3_ADDRESS 0x00000078 |
| 509 #define WLAN_LF_TIMER3_OFFSET 0x00000078 |
| 510 #define WLAN_LF_TIMER3_TARGET_MSB 31 |
| 511 #define WLAN_LF_TIMER3_TARGET_LSB 0 |
| 512 #define WLAN_LF_TIMER3_TARGET_MASK 0xffffffff |
| 513 #define WLAN_LF_TIMER3_TARGET_GET(x) (((x) & WLAN_LF_TIMER3_TARGET_M
ASK) >> WLAN_LF_TIMER3_TARGET_LSB) |
| 514 #define WLAN_LF_TIMER3_TARGET_SET(x) (((x) << WLAN_LF_TIMER3_TARGET_
LSB) & WLAN_LF_TIMER3_TARGET_MASK) |
| 515 |
| 516 #define WLAN_LF_TIMER_COUNT3_ADDRESS 0x0000007c |
| 517 #define WLAN_LF_TIMER_COUNT3_OFFSET 0x0000007c |
| 518 #define WLAN_LF_TIMER_COUNT3_VALUE_MSB 31 |
| 519 #define WLAN_LF_TIMER_COUNT3_VALUE_LSB 0 |
| 520 #define WLAN_LF_TIMER_COUNT3_VALUE_MASK 0xffffffff |
| 521 #define WLAN_LF_TIMER_COUNT3_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT3_VA
LUE_MASK) >> WLAN_LF_TIMER_COUNT3_VALUE_LSB) |
| 522 #define WLAN_LF_TIMER_COUNT3_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT3_V
ALUE_LSB) & WLAN_LF_TIMER_COUNT3_VALUE_MASK) |
| 523 |
| 524 #define WLAN_LF_TIMER_CONTROL3_ADDRESS 0x00000080 |
| 525 #define WLAN_LF_TIMER_CONTROL3_OFFSET 0x00000080 |
| 526 #define WLAN_LF_TIMER_CONTROL3_ENABLE_MSB 2 |
| 527 #define WLAN_LF_TIMER_CONTROL3_ENABLE_LSB 2 |
| 528 #define WLAN_LF_TIMER_CONTROL3_ENABLE_MASK 0x00000004 |
| 529 #define WLAN_LF_TIMER_CONTROL3_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL3_
ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL3_ENABLE_LSB) |
| 530 #define WLAN_LF_TIMER_CONTROL3_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL3
_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL3_ENABLE_MASK) |
| 531 #define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MSB 1 |
| 532 #define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_LSB 1 |
| 533 #define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MASK 0x00000002 |
| 534 #define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL
3_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_LSB) |
| 535 #define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTRO
L3_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MASK) |
| 536 #define WLAN_LF_TIMER_CONTROL3_RESET_MSB 0 |
| 537 #define WLAN_LF_TIMER_CONTROL3_RESET_LSB 0 |
| 538 #define WLAN_LF_TIMER_CONTROL3_RESET_MASK 0x00000001 |
| 539 #define WLAN_LF_TIMER_CONTROL3_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL3_
RESET_MASK) >> WLAN_LF_TIMER_CONTROL3_RESET_LSB) |
| 540 #define WLAN_LF_TIMER_CONTROL3_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL3
_RESET_LSB) & WLAN_LF_TIMER_CONTROL3_RESET_MASK) |
| 541 |
| 542 #define WLAN_LF_TIMER_STATUS3_ADDRESS 0x00000084 |
| 543 #define WLAN_LF_TIMER_STATUS3_OFFSET 0x00000084 |
| 544 #define WLAN_LF_TIMER_STATUS3_INTERRUPT_MSB 0 |
| 545 #define WLAN_LF_TIMER_STATUS3_INTERRUPT_LSB 0 |
| 546 #define WLAN_LF_TIMER_STATUS3_INTERRUPT_MASK 0x00000001 |
| 547 #define WLAN_LF_TIMER_STATUS3_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS3_I
NTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS3_INTERRUPT_LSB) |
| 548 #define WLAN_LF_TIMER_STATUS3_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS3_
INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS3_INTERRUPT_MASK) |
| 549 |
| 550 #define WLAN_HF_TIMER_ADDRESS 0x00000088 |
| 551 #define WLAN_HF_TIMER_OFFSET 0x00000088 |
| 552 #define WLAN_HF_TIMER_TARGET_MSB 31 |
| 553 #define WLAN_HF_TIMER_TARGET_LSB 12 |
| 554 #define WLAN_HF_TIMER_TARGET_MASK 0xfffff000 |
| 555 #define WLAN_HF_TIMER_TARGET_GET(x) (((x) & WLAN_HF_TIMER_TARGET_MA
SK) >> WLAN_HF_TIMER_TARGET_LSB) |
| 556 #define WLAN_HF_TIMER_TARGET_SET(x) (((x) << WLAN_HF_TIMER_TARGET_L
SB) & WLAN_HF_TIMER_TARGET_MASK) |
| 557 |
| 558 #define WLAN_HF_TIMER_COUNT_ADDRESS 0x0000008c |
| 559 #define WLAN_HF_TIMER_COUNT_OFFSET 0x0000008c |
| 560 #define WLAN_HF_TIMER_COUNT_VALUE_MSB 31 |
| 561 #define WLAN_HF_TIMER_COUNT_VALUE_LSB 12 |
| 562 #define WLAN_HF_TIMER_COUNT_VALUE_MASK 0xfffff000 |
| 563 #define WLAN_HF_TIMER_COUNT_VALUE_GET(x) (((x) & WLAN_HF_TIMER_COUNT_VAL
UE_MASK) >> WLAN_HF_TIMER_COUNT_VALUE_LSB) |
| 564 #define WLAN_HF_TIMER_COUNT_VALUE_SET(x) (((x) << WLAN_HF_TIMER_COUNT_VA
LUE_LSB) & WLAN_HF_TIMER_COUNT_VALUE_MASK) |
| 565 |
| 566 #define WLAN_HF_LF_COUNT_ADDRESS 0x00000090 |
| 567 #define WLAN_HF_LF_COUNT_OFFSET 0x00000090 |
| 568 #define WLAN_HF_LF_COUNT_VALUE_MSB 31 |
| 569 #define WLAN_HF_LF_COUNT_VALUE_LSB 0 |
| 570 #define WLAN_HF_LF_COUNT_VALUE_MASK 0xffffffff |
| 571 #define WLAN_HF_LF_COUNT_VALUE_GET(x) (((x) & WLAN_HF_LF_COUNT_VALUE_
MASK) >> WLAN_HF_LF_COUNT_VALUE_LSB) |
| 572 #define WLAN_HF_LF_COUNT_VALUE_SET(x) (((x) << WLAN_HF_LF_COUNT_VALUE
_LSB) & WLAN_HF_LF_COUNT_VALUE_MASK) |
| 573 |
| 574 #define WLAN_HF_TIMER_CONTROL_ADDRESS 0x00000094 |
| 575 #define WLAN_HF_TIMER_CONTROL_OFFSET 0x00000094 |
| 576 #define WLAN_HF_TIMER_CONTROL_ENABLE_MSB 3 |
| 577 #define WLAN_HF_TIMER_CONTROL_ENABLE_LSB 3 |
| 578 #define WLAN_HF_TIMER_CONTROL_ENABLE_MASK 0x00000008 |
| 579 #define WLAN_HF_TIMER_CONTROL_ENABLE_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_E
NABLE_MASK) >> WLAN_HF_TIMER_CONTROL_ENABLE_LSB) |
| 580 #define WLAN_HF_TIMER_CONTROL_ENABLE_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_
ENABLE_LSB) & WLAN_HF_TIMER_CONTROL_ENABLE_MASK) |
| 581 #define WLAN_HF_TIMER_CONTROL_ON_MSB 2 |
| 582 #define WLAN_HF_TIMER_CONTROL_ON_LSB 2 |
| 583 #define WLAN_HF_TIMER_CONTROL_ON_MASK 0x00000004 |
| 584 #define WLAN_HF_TIMER_CONTROL_ON_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_O
N_MASK) >> WLAN_HF_TIMER_CONTROL_ON_LSB) |
| 585 #define WLAN_HF_TIMER_CONTROL_ON_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_
ON_LSB) & WLAN_HF_TIMER_CONTROL_ON_MASK) |
| 586 #define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MSB 1 |
| 587 #define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_LSB 1 |
| 588 #define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MASK 0x00000002 |
| 589 #define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_
AUTO_RESTART_MASK) >> WLAN_HF_TIMER_CONTROL_AUTO_RESTART_LSB) |
| 590 #define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_SET(x) (((x) << WLAN_HF_TIMER_CONTROL
_AUTO_RESTART_LSB) & WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MASK) |
| 591 #define WLAN_HF_TIMER_CONTROL_RESET_MSB 0 |
| 592 #define WLAN_HF_TIMER_CONTROL_RESET_LSB 0 |
| 593 #define WLAN_HF_TIMER_CONTROL_RESET_MASK 0x00000001 |
| 594 #define WLAN_HF_TIMER_CONTROL_RESET_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_R
ESET_MASK) >> WLAN_HF_TIMER_CONTROL_RESET_LSB) |
| 595 #define WLAN_HF_TIMER_CONTROL_RESET_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_
RESET_LSB) & WLAN_HF_TIMER_CONTROL_RESET_MASK) |
| 596 |
| 597 #define WLAN_HF_TIMER_STATUS_ADDRESS 0x00000098 |
| 598 #define WLAN_HF_TIMER_STATUS_OFFSET 0x00000098 |
| 599 #define WLAN_HF_TIMER_STATUS_INTERRUPT_MSB 0 |
| 600 #define WLAN_HF_TIMER_STATUS_INTERRUPT_LSB 0 |
| 601 #define WLAN_HF_TIMER_STATUS_INTERRUPT_MASK 0x00000001 |
| 602 #define WLAN_HF_TIMER_STATUS_INTERRUPT_GET(x) (((x) & WLAN_HF_TIMER_STATUS_IN
TERRUPT_MASK) >> WLAN_HF_TIMER_STATUS_INTERRUPT_LSB) |
| 603 #define WLAN_HF_TIMER_STATUS_INTERRUPT_SET(x) (((x) << WLAN_HF_TIMER_STATUS_I
NTERRUPT_LSB) & WLAN_HF_TIMER_STATUS_INTERRUPT_MASK) |
| 604 |
| 605 #define WLAN_RTC_CONTROL_ADDRESS 0x0000009c |
| 606 #define WLAN_RTC_CONTROL_OFFSET 0x0000009c |
| 607 #define WLAN_RTC_CONTROL_ENABLE_MSB 2 |
| 608 #define WLAN_RTC_CONTROL_ENABLE_LSB 2 |
| 609 #define WLAN_RTC_CONTROL_ENABLE_MASK 0x00000004 |
| 610 #define WLAN_RTC_CONTROL_ENABLE_GET(x) (((x) & WLAN_RTC_CONTROL_ENABLE
_MASK) >> WLAN_RTC_CONTROL_ENABLE_LSB) |
| 611 #define WLAN_RTC_CONTROL_ENABLE_SET(x) (((x) << WLAN_RTC_CONTROL_ENABL
E_LSB) & WLAN_RTC_CONTROL_ENABLE_MASK) |
| 612 #define WLAN_RTC_CONTROL_LOAD_RTC_MSB 1 |
| 613 #define WLAN_RTC_CONTROL_LOAD_RTC_LSB 1 |
| 614 #define WLAN_RTC_CONTROL_LOAD_RTC_MASK 0x00000002 |
| 615 #define WLAN_RTC_CONTROL_LOAD_RTC_GET(x) (((x) & WLAN_RTC_CONTROL_LOAD_R
TC_MASK) >> WLAN_RTC_CONTROL_LOAD_RTC_LSB) |
| 616 #define WLAN_RTC_CONTROL_LOAD_RTC_SET(x) (((x) << WLAN_RTC_CONTROL_LOAD_
RTC_LSB) & WLAN_RTC_CONTROL_LOAD_RTC_MASK) |
| 617 #define WLAN_RTC_CONTROL_LOAD_ALARM_MSB 0 |
| 618 #define WLAN_RTC_CONTROL_LOAD_ALARM_LSB 0 |
| 619 #define WLAN_RTC_CONTROL_LOAD_ALARM_MASK 0x00000001 |
| 620 #define WLAN_RTC_CONTROL_LOAD_ALARM_GET(x) (((x) & WLAN_RTC_CONTROL_LOAD_A
LARM_MASK) >> WLAN_RTC_CONTROL_LOAD_ALARM_LSB) |
| 621 #define WLAN_RTC_CONTROL_LOAD_ALARM_SET(x) (((x) << WLAN_RTC_CONTROL_LOAD_
ALARM_LSB) & WLAN_RTC_CONTROL_LOAD_ALARM_MASK) |
| 622 |
| 623 #define WLAN_RTC_TIME_ADDRESS 0x000000a0 |
| 624 #define WLAN_RTC_TIME_OFFSET 0x000000a0 |
| 625 #define WLAN_RTC_TIME_WEEK_DAY_MSB 26 |
| 626 #define WLAN_RTC_TIME_WEEK_DAY_LSB 24 |
| 627 #define WLAN_RTC_TIME_WEEK_DAY_MASK 0x07000000 |
| 628 #define WLAN_RTC_TIME_WEEK_DAY_GET(x) (((x) & WLAN_RTC_TIME_WEEK_DAY_
MASK) >> WLAN_RTC_TIME_WEEK_DAY_LSB) |
| 629 #define WLAN_RTC_TIME_WEEK_DAY_SET(x) (((x) << WLAN_RTC_TIME_WEEK_DAY
_LSB) & WLAN_RTC_TIME_WEEK_DAY_MASK) |
| 630 #define WLAN_RTC_TIME_HOUR_MSB 21 |
| 631 #define WLAN_RTC_TIME_HOUR_LSB 16 |
| 632 #define WLAN_RTC_TIME_HOUR_MASK 0x003f0000 |
| 633 #define WLAN_RTC_TIME_HOUR_GET(x) (((x) & WLAN_RTC_TIME_HOUR_MASK
) >> WLAN_RTC_TIME_HOUR_LSB) |
| 634 #define WLAN_RTC_TIME_HOUR_SET(x) (((x) << WLAN_RTC_TIME_HOUR_LSB
) & WLAN_RTC_TIME_HOUR_MASK) |
| 635 #define WLAN_RTC_TIME_MINUTE_MSB 14 |
| 636 #define WLAN_RTC_TIME_MINUTE_LSB 8 |
| 637 #define WLAN_RTC_TIME_MINUTE_MASK 0x00007f00 |
| 638 #define WLAN_RTC_TIME_MINUTE_GET(x) (((x) & WLAN_RTC_TIME_MINUTE_MA
SK) >> WLAN_RTC_TIME_MINUTE_LSB) |
| 639 #define WLAN_RTC_TIME_MINUTE_SET(x) (((x) << WLAN_RTC_TIME_MINUTE_L
SB) & WLAN_RTC_TIME_MINUTE_MASK) |
| 640 #define WLAN_RTC_TIME_SECOND_MSB 6 |
| 641 #define WLAN_RTC_TIME_SECOND_LSB 0 |
| 642 #define WLAN_RTC_TIME_SECOND_MASK 0x0000007f |
| 643 #define WLAN_RTC_TIME_SECOND_GET(x) (((x) & WLAN_RTC_TIME_SECOND_MA
SK) >> WLAN_RTC_TIME_SECOND_LSB) |
| 644 #define WLAN_RTC_TIME_SECOND_SET(x) (((x) << WLAN_RTC_TIME_SECOND_L
SB) & WLAN_RTC_TIME_SECOND_MASK) |
| 645 |
| 646 #define WLAN_RTC_DATE_ADDRESS 0x000000a4 |
| 647 #define WLAN_RTC_DATE_OFFSET 0x000000a4 |
| 648 #define WLAN_RTC_DATE_YEAR_MSB 23 |
| 649 #define WLAN_RTC_DATE_YEAR_LSB 16 |
| 650 #define WLAN_RTC_DATE_YEAR_MASK 0x00ff0000 |
| 651 #define WLAN_RTC_DATE_YEAR_GET(x) (((x) & WLAN_RTC_DATE_YEAR_MASK
) >> WLAN_RTC_DATE_YEAR_LSB) |
| 652 #define WLAN_RTC_DATE_YEAR_SET(x) (((x) << WLAN_RTC_DATE_YEAR_LSB
) & WLAN_RTC_DATE_YEAR_MASK) |
| 653 #define WLAN_RTC_DATE_MONTH_MSB 12 |
| 654 #define WLAN_RTC_DATE_MONTH_LSB 8 |
| 655 #define WLAN_RTC_DATE_MONTH_MASK 0x00001f00 |
| 656 #define WLAN_RTC_DATE_MONTH_GET(x) (((x) & WLAN_RTC_DATE_MONTH_MAS
K) >> WLAN_RTC_DATE_MONTH_LSB) |
| 657 #define WLAN_RTC_DATE_MONTH_SET(x) (((x) << WLAN_RTC_DATE_MONTH_LS
B) & WLAN_RTC_DATE_MONTH_MASK) |
| 658 #define WLAN_RTC_DATE_MONTH_DAY_MSB 5 |
| 659 #define WLAN_RTC_DATE_MONTH_DAY_LSB 0 |
| 660 #define WLAN_RTC_DATE_MONTH_DAY_MASK 0x0000003f |
| 661 #define WLAN_RTC_DATE_MONTH_DAY_GET(x) (((x) & WLAN_RTC_DATE_MONTH_DAY
_MASK) >> WLAN_RTC_DATE_MONTH_DAY_LSB) |
| 662 #define WLAN_RTC_DATE_MONTH_DAY_SET(x) (((x) << WLAN_RTC_DATE_MONTH_DA
Y_LSB) & WLAN_RTC_DATE_MONTH_DAY_MASK) |
| 663 |
| 664 #define WLAN_RTC_SET_TIME_ADDRESS 0x000000a8 |
| 665 #define WLAN_RTC_SET_TIME_OFFSET 0x000000a8 |
| 666 #define WLAN_RTC_SET_TIME_WEEK_DAY_MSB 26 |
| 667 #define WLAN_RTC_SET_TIME_WEEK_DAY_LSB 24 |
| 668 #define WLAN_RTC_SET_TIME_WEEK_DAY_MASK 0x07000000 |
| 669 #define WLAN_RTC_SET_TIME_WEEK_DAY_GET(x) (((x) & WLAN_RTC_SET_TIME_WEEK_
DAY_MASK) >> WLAN_RTC_SET_TIME_WEEK_DAY_LSB) |
| 670 #define WLAN_RTC_SET_TIME_WEEK_DAY_SET(x) (((x) << WLAN_RTC_SET_TIME_WEEK
_DAY_LSB) & WLAN_RTC_SET_TIME_WEEK_DAY_MASK) |
| 671 #define WLAN_RTC_SET_TIME_HOUR_MSB 21 |
| 672 #define WLAN_RTC_SET_TIME_HOUR_LSB 16 |
| 673 #define WLAN_RTC_SET_TIME_HOUR_MASK 0x003f0000 |
| 674 #define WLAN_RTC_SET_TIME_HOUR_GET(x) (((x) & WLAN_RTC_SET_TIME_HOUR_
MASK) >> WLAN_RTC_SET_TIME_HOUR_LSB) |
| 675 #define WLAN_RTC_SET_TIME_HOUR_SET(x) (((x) << WLAN_RTC_SET_TIME_HOUR
_LSB) & WLAN_RTC_SET_TIME_HOUR_MASK) |
| 676 #define WLAN_RTC_SET_TIME_MINUTE_MSB 14 |
| 677 #define WLAN_RTC_SET_TIME_MINUTE_LSB 8 |
| 678 #define WLAN_RTC_SET_TIME_MINUTE_MASK 0x00007f00 |
| 679 #define WLAN_RTC_SET_TIME_MINUTE_GET(x) (((x) & WLAN_RTC_SET_TIME_MINUT
E_MASK) >> WLAN_RTC_SET_TIME_MINUTE_LSB) |
| 680 #define WLAN_RTC_SET_TIME_MINUTE_SET(x) (((x) << WLAN_RTC_SET_TIME_MINU
TE_LSB) & WLAN_RTC_SET_TIME_MINUTE_MASK) |
| 681 #define WLAN_RTC_SET_TIME_SECOND_MSB 6 |
| 682 #define WLAN_RTC_SET_TIME_SECOND_LSB 0 |
| 683 #define WLAN_RTC_SET_TIME_SECOND_MASK 0x0000007f |
| 684 #define WLAN_RTC_SET_TIME_SECOND_GET(x) (((x) & WLAN_RTC_SET_TIME_SECON
D_MASK) >> WLAN_RTC_SET_TIME_SECOND_LSB) |
| 685 #define WLAN_RTC_SET_TIME_SECOND_SET(x) (((x) << WLAN_RTC_SET_TIME_SECO
ND_LSB) & WLAN_RTC_SET_TIME_SECOND_MASK) |
| 686 |
| 687 #define WLAN_RTC_SET_DATE_ADDRESS 0x000000ac |
| 688 #define WLAN_RTC_SET_DATE_OFFSET 0x000000ac |
| 689 #define WLAN_RTC_SET_DATE_YEAR_MSB 23 |
| 690 #define WLAN_RTC_SET_DATE_YEAR_LSB 16 |
| 691 #define WLAN_RTC_SET_DATE_YEAR_MASK 0x00ff0000 |
| 692 #define WLAN_RTC_SET_DATE_YEAR_GET(x) (((x) & WLAN_RTC_SET_DATE_YEAR_
MASK) >> WLAN_RTC_SET_DATE_YEAR_LSB) |
| 693 #define WLAN_RTC_SET_DATE_YEAR_SET(x) (((x) << WLAN_RTC_SET_DATE_YEAR
_LSB) & WLAN_RTC_SET_DATE_YEAR_MASK) |
| 694 #define WLAN_RTC_SET_DATE_MONTH_MSB 12 |
| 695 #define WLAN_RTC_SET_DATE_MONTH_LSB 8 |
| 696 #define WLAN_RTC_SET_DATE_MONTH_MASK 0x00001f00 |
| 697 #define WLAN_RTC_SET_DATE_MONTH_GET(x) (((x) & WLAN_RTC_SET_DATE_MONTH
_MASK) >> WLAN_RTC_SET_DATE_MONTH_LSB) |
| 698 #define WLAN_RTC_SET_DATE_MONTH_SET(x) (((x) << WLAN_RTC_SET_DATE_MONT
H_LSB) & WLAN_RTC_SET_DATE_MONTH_MASK) |
| 699 #define WLAN_RTC_SET_DATE_MONTH_DAY_MSB 5 |
| 700 #define WLAN_RTC_SET_DATE_MONTH_DAY_LSB 0 |
| 701 #define WLAN_RTC_SET_DATE_MONTH_DAY_MASK 0x0000003f |
| 702 #define WLAN_RTC_SET_DATE_MONTH_DAY_GET(x) (((x) & WLAN_RTC_SET_DATE_MONTH
_DAY_MASK) >> WLAN_RTC_SET_DATE_MONTH_DAY_LSB) |
| 703 #define WLAN_RTC_SET_DATE_MONTH_DAY_SET(x) (((x) << WLAN_RTC_SET_DATE_MONT
H_DAY_LSB) & WLAN_RTC_SET_DATE_MONTH_DAY_MASK) |
| 704 |
| 705 #define WLAN_RTC_SET_ALARM_ADDRESS 0x000000b0 |
| 706 #define WLAN_RTC_SET_ALARM_OFFSET 0x000000b0 |
| 707 #define WLAN_RTC_SET_ALARM_HOUR_MSB 21 |
| 708 #define WLAN_RTC_SET_ALARM_HOUR_LSB 16 |
| 709 #define WLAN_RTC_SET_ALARM_HOUR_MASK 0x003f0000 |
| 710 #define WLAN_RTC_SET_ALARM_HOUR_GET(x) (((x) & WLAN_RTC_SET_ALARM_HOUR
_MASK) >> WLAN_RTC_SET_ALARM_HOUR_LSB) |
| 711 #define WLAN_RTC_SET_ALARM_HOUR_SET(x) (((x) << WLAN_RTC_SET_ALARM_HOU
R_LSB) & WLAN_RTC_SET_ALARM_HOUR_MASK) |
| 712 #define WLAN_RTC_SET_ALARM_MINUTE_MSB 14 |
| 713 #define WLAN_RTC_SET_ALARM_MINUTE_LSB 8 |
| 714 #define WLAN_RTC_SET_ALARM_MINUTE_MASK 0x00007f00 |
| 715 #define WLAN_RTC_SET_ALARM_MINUTE_GET(x) (((x) & WLAN_RTC_SET_ALARM_MINU
TE_MASK) >> WLAN_RTC_SET_ALARM_MINUTE_LSB) |
| 716 #define WLAN_RTC_SET_ALARM_MINUTE_SET(x) (((x) << WLAN_RTC_SET_ALARM_MIN
UTE_LSB) & WLAN_RTC_SET_ALARM_MINUTE_MASK) |
| 717 #define WLAN_RTC_SET_ALARM_SECOND_MSB 6 |
| 718 #define WLAN_RTC_SET_ALARM_SECOND_LSB 0 |
| 719 #define WLAN_RTC_SET_ALARM_SECOND_MASK 0x0000007f |
| 720 #define WLAN_RTC_SET_ALARM_SECOND_GET(x) (((x) & WLAN_RTC_SET_ALARM_SECO
ND_MASK) >> WLAN_RTC_SET_ALARM_SECOND_LSB) |
| 721 #define WLAN_RTC_SET_ALARM_SECOND_SET(x) (((x) << WLAN_RTC_SET_ALARM_SEC
OND_LSB) & WLAN_RTC_SET_ALARM_SECOND_MASK) |
| 722 |
| 723 #define WLAN_RTC_CONFIG_ADDRESS 0x000000b4 |
| 724 #define WLAN_RTC_CONFIG_OFFSET 0x000000b4 |
| 725 #define WLAN_RTC_CONFIG_BCD_MSB 2 |
| 726 #define WLAN_RTC_CONFIG_BCD_LSB 2 |
| 727 #define WLAN_RTC_CONFIG_BCD_MASK 0x00000004 |
| 728 #define WLAN_RTC_CONFIG_BCD_GET(x) (((x) & WLAN_RTC_CONFIG_BCD_MAS
K) >> WLAN_RTC_CONFIG_BCD_LSB) |
| 729 #define WLAN_RTC_CONFIG_BCD_SET(x) (((x) << WLAN_RTC_CONFIG_BCD_LS
B) & WLAN_RTC_CONFIG_BCD_MASK) |
| 730 #define WLAN_RTC_CONFIG_TWELVE_HOUR_MSB 1 |
| 731 #define WLAN_RTC_CONFIG_TWELVE_HOUR_LSB 1 |
| 732 #define WLAN_RTC_CONFIG_TWELVE_HOUR_MASK 0x00000002 |
| 733 #define WLAN_RTC_CONFIG_TWELVE_HOUR_GET(x) (((x) & WLAN_RTC_CONFIG_TWELVE_
HOUR_MASK) >> WLAN_RTC_CONFIG_TWELVE_HOUR_LSB) |
| 734 #define WLAN_RTC_CONFIG_TWELVE_HOUR_SET(x) (((x) << WLAN_RTC_CONFIG_TWELVE
_HOUR_LSB) & WLAN_RTC_CONFIG_TWELVE_HOUR_MASK) |
| 735 #define WLAN_RTC_CONFIG_DSE_MSB 0 |
| 736 #define WLAN_RTC_CONFIG_DSE_LSB 0 |
| 737 #define WLAN_RTC_CONFIG_DSE_MASK 0x00000001 |
| 738 #define WLAN_RTC_CONFIG_DSE_GET(x) (((x) & WLAN_RTC_CONFIG_DSE_MAS
K) >> WLAN_RTC_CONFIG_DSE_LSB) |
| 739 #define WLAN_RTC_CONFIG_DSE_SET(x) (((x) << WLAN_RTC_CONFIG_DSE_LS
B) & WLAN_RTC_CONFIG_DSE_MASK) |
| 740 |
| 741 #define WLAN_RTC_ALARM_STATUS_ADDRESS 0x000000b8 |
| 742 #define WLAN_RTC_ALARM_STATUS_OFFSET 0x000000b8 |
| 743 #define WLAN_RTC_ALARM_STATUS_ENABLE_MSB 1 |
| 744 #define WLAN_RTC_ALARM_STATUS_ENABLE_LSB 1 |
| 745 #define WLAN_RTC_ALARM_STATUS_ENABLE_MASK 0x00000002 |
| 746 #define WLAN_RTC_ALARM_STATUS_ENABLE_GET(x) (((x) & WLAN_RTC_ALARM_STATUS_E
NABLE_MASK) >> WLAN_RTC_ALARM_STATUS_ENABLE_LSB) |
| 747 #define WLAN_RTC_ALARM_STATUS_ENABLE_SET(x) (((x) << WLAN_RTC_ALARM_STATUS_
ENABLE_LSB) & WLAN_RTC_ALARM_STATUS_ENABLE_MASK) |
| 748 #define WLAN_RTC_ALARM_STATUS_INTERRUPT_MSB 0 |
| 749 #define WLAN_RTC_ALARM_STATUS_INTERRUPT_LSB 0 |
| 750 #define WLAN_RTC_ALARM_STATUS_INTERRUPT_MASK 0x00000001 |
| 751 #define WLAN_RTC_ALARM_STATUS_INTERRUPT_GET(x) (((x) & WLAN_RTC_ALARM_STATUS_I
NTERRUPT_MASK) >> WLAN_RTC_ALARM_STATUS_INTERRUPT_LSB) |
| 752 #define WLAN_RTC_ALARM_STATUS_INTERRUPT_SET(x) (((x) << WLAN_RTC_ALARM_STATUS_
INTERRUPT_LSB) & WLAN_RTC_ALARM_STATUS_INTERRUPT_MASK) |
| 753 |
| 754 #define WLAN_UART_WAKEUP_ADDRESS 0x000000bc |
| 755 #define WLAN_UART_WAKEUP_OFFSET 0x000000bc |
| 756 #define WLAN_UART_WAKEUP_ENABLE_MSB 0 |
| 757 #define WLAN_UART_WAKEUP_ENABLE_LSB 0 |
| 758 #define WLAN_UART_WAKEUP_ENABLE_MASK 0x00000001 |
| 759 #define WLAN_UART_WAKEUP_ENABLE_GET(x) (((x) & WLAN_UART_WAKEUP_ENABLE
_MASK) >> WLAN_UART_WAKEUP_ENABLE_LSB) |
| 760 #define WLAN_UART_WAKEUP_ENABLE_SET(x) (((x) << WLAN_UART_WAKEUP_ENABL
E_LSB) & WLAN_UART_WAKEUP_ENABLE_MASK) |
| 761 |
| 762 #define WLAN_RESET_CAUSE_ADDRESS 0x000000c0 |
| 763 #define WLAN_RESET_CAUSE_OFFSET 0x000000c0 |
| 764 #define WLAN_RESET_CAUSE_LAST_MSB 2 |
| 765 #define WLAN_RESET_CAUSE_LAST_LSB 0 |
| 766 #define WLAN_RESET_CAUSE_LAST_MASK 0x00000007 |
| 767 #define WLAN_RESET_CAUSE_LAST_GET(x) (((x) & WLAN_RESET_CAUSE_LAST_M
ASK) >> WLAN_RESET_CAUSE_LAST_LSB) |
| 768 #define WLAN_RESET_CAUSE_LAST_SET(x) (((x) << WLAN_RESET_CAUSE_LAST_
LSB) & WLAN_RESET_CAUSE_LAST_MASK) |
| 769 |
| 770 #define WLAN_SYSTEM_SLEEP_ADDRESS 0x000000c4 |
| 771 #define WLAN_SYSTEM_SLEEP_OFFSET 0x000000c4 |
| 772 #define WLAN_SYSTEM_SLEEP_HOST_IF_MSB 4 |
| 773 #define WLAN_SYSTEM_SLEEP_HOST_IF_LSB 4 |
| 774 #define WLAN_SYSTEM_SLEEP_HOST_IF_MASK 0x00000010 |
| 775 #define WLAN_SYSTEM_SLEEP_HOST_IF_GET(x) (((x) & WLAN_SYSTEM_SLEEP_HOST_
IF_MASK) >> WLAN_SYSTEM_SLEEP_HOST_IF_LSB) |
| 776 #define WLAN_SYSTEM_SLEEP_HOST_IF_SET(x) (((x) << WLAN_SYSTEM_SLEEP_HOST
_IF_LSB) & WLAN_SYSTEM_SLEEP_HOST_IF_MASK) |
| 777 #define WLAN_SYSTEM_SLEEP_MBOX_MSB 3 |
| 778 #define WLAN_SYSTEM_SLEEP_MBOX_LSB 3 |
| 779 #define WLAN_SYSTEM_SLEEP_MBOX_MASK 0x00000008 |
| 780 #define WLAN_SYSTEM_SLEEP_MBOX_GET(x) (((x) & WLAN_SYSTEM_SLEEP_MBOX_
MASK) >> WLAN_SYSTEM_SLEEP_MBOX_LSB) |
| 781 #define WLAN_SYSTEM_SLEEP_MBOX_SET(x) (((x) << WLAN_SYSTEM_SLEEP_MBOX
_LSB) & WLAN_SYSTEM_SLEEP_MBOX_MASK) |
| 782 #define WLAN_SYSTEM_SLEEP_MAC_IF_MSB 2 |
| 783 #define WLAN_SYSTEM_SLEEP_MAC_IF_LSB 2 |
| 784 #define WLAN_SYSTEM_SLEEP_MAC_IF_MASK 0x00000004 |
| 785 #define WLAN_SYSTEM_SLEEP_MAC_IF_GET(x) (((x) & WLAN_SYSTEM_SLEEP_MAC_I
F_MASK) >> WLAN_SYSTEM_SLEEP_MAC_IF_LSB) |
| 786 #define WLAN_SYSTEM_SLEEP_MAC_IF_SET(x) (((x) << WLAN_SYSTEM_SLEEP_MAC_
IF_LSB) & WLAN_SYSTEM_SLEEP_MAC_IF_MASK) |
| 787 #define WLAN_SYSTEM_SLEEP_LIGHT_MSB 1 |
| 788 #define WLAN_SYSTEM_SLEEP_LIGHT_LSB 1 |
| 789 #define WLAN_SYSTEM_SLEEP_LIGHT_MASK 0x00000002 |
| 790 #define WLAN_SYSTEM_SLEEP_LIGHT_GET(x) (((x) & WLAN_SYSTEM_SLEEP_LIGHT
_MASK) >> WLAN_SYSTEM_SLEEP_LIGHT_LSB) |
| 791 #define WLAN_SYSTEM_SLEEP_LIGHT_SET(x) (((x) << WLAN_SYSTEM_SLEEP_LIGH
T_LSB) & WLAN_SYSTEM_SLEEP_LIGHT_MASK) |
| 792 #define WLAN_SYSTEM_SLEEP_DISABLE_MSB 0 |
| 793 #define WLAN_SYSTEM_SLEEP_DISABLE_LSB 0 |
| 794 #define WLAN_SYSTEM_SLEEP_DISABLE_MASK 0x00000001 |
| 795 #define WLAN_SYSTEM_SLEEP_DISABLE_GET(x) (((x) & WLAN_SYSTEM_SLEEP_DISAB
LE_MASK) >> WLAN_SYSTEM_SLEEP_DISABLE_LSB) |
| 796 #define WLAN_SYSTEM_SLEEP_DISABLE_SET(x) (((x) << WLAN_SYSTEM_SLEEP_DISA
BLE_LSB) & WLAN_SYSTEM_SLEEP_DISABLE_MASK) |
| 797 |
| 798 #define WLAN_SDIO_WRAPPER_ADDRESS 0x000000c8 |
| 799 #define WLAN_SDIO_WRAPPER_OFFSET 0x000000c8 |
| 800 #define WLAN_SDIO_WRAPPER_SLEEP_MSB 3 |
| 801 #define WLAN_SDIO_WRAPPER_SLEEP_LSB 3 |
| 802 #define WLAN_SDIO_WRAPPER_SLEEP_MASK 0x00000008 |
| 803 #define WLAN_SDIO_WRAPPER_SLEEP_GET(x) (((x) & WLAN_SDIO_WRAPPER_SLEEP
_MASK) >> WLAN_SDIO_WRAPPER_SLEEP_LSB) |
| 804 #define WLAN_SDIO_WRAPPER_SLEEP_SET(x) (((x) << WLAN_SDIO_WRAPPER_SLEE
P_LSB) & WLAN_SDIO_WRAPPER_SLEEP_MASK) |
| 805 #define WLAN_SDIO_WRAPPER_WAKEUP_MSB 2 |
| 806 #define WLAN_SDIO_WRAPPER_WAKEUP_LSB 2 |
| 807 #define WLAN_SDIO_WRAPPER_WAKEUP_MASK 0x00000004 |
| 808 #define WLAN_SDIO_WRAPPER_WAKEUP_GET(x) (((x) & WLAN_SDIO_WRAPPER_WAKEU
P_MASK) >> WLAN_SDIO_WRAPPER_WAKEUP_LSB) |
| 809 #define WLAN_SDIO_WRAPPER_WAKEUP_SET(x) (((x) << WLAN_SDIO_WRAPPER_WAKE
UP_LSB) & WLAN_SDIO_WRAPPER_WAKEUP_MASK) |
| 810 #define WLAN_SDIO_WRAPPER_SOC_ON_MSB 1 |
| 811 #define WLAN_SDIO_WRAPPER_SOC_ON_LSB 1 |
| 812 #define WLAN_SDIO_WRAPPER_SOC_ON_MASK 0x00000002 |
| 813 #define WLAN_SDIO_WRAPPER_SOC_ON_GET(x) (((x) & WLAN_SDIO_WRAPPER_SOC_O
N_MASK) >> WLAN_SDIO_WRAPPER_SOC_ON_LSB) |
| 814 #define WLAN_SDIO_WRAPPER_SOC_ON_SET(x) (((x) << WLAN_SDIO_WRAPPER_SOC_
ON_LSB) & WLAN_SDIO_WRAPPER_SOC_ON_MASK) |
| 815 #define WLAN_SDIO_WRAPPER_ON_MSB 0 |
| 816 #define WLAN_SDIO_WRAPPER_ON_LSB 0 |
| 817 #define WLAN_SDIO_WRAPPER_ON_MASK 0x00000001 |
| 818 #define WLAN_SDIO_WRAPPER_ON_GET(x) (((x) & WLAN_SDIO_WRAPPER_ON_MA
SK) >> WLAN_SDIO_WRAPPER_ON_LSB) |
| 819 #define WLAN_SDIO_WRAPPER_ON_SET(x) (((x) << WLAN_SDIO_WRAPPER_ON_L
SB) & WLAN_SDIO_WRAPPER_ON_MASK) |
| 820 |
| 821 #define WLAN_MAC_SLEEP_CONTROL_ADDRESS 0x000000cc |
| 822 #define WLAN_MAC_SLEEP_CONTROL_OFFSET 0x000000cc |
| 823 #define WLAN_MAC_SLEEP_CONTROL_ENABLE_MSB 1 |
| 824 #define WLAN_MAC_SLEEP_CONTROL_ENABLE_LSB 0 |
| 825 #define WLAN_MAC_SLEEP_CONTROL_ENABLE_MASK 0x00000003 |
| 826 #define WLAN_MAC_SLEEP_CONTROL_ENABLE_GET(x) (((x) & WLAN_MAC_SLEEP_CONTROL_
ENABLE_MASK) >> WLAN_MAC_SLEEP_CONTROL_ENABLE_LSB) |
| 827 #define WLAN_MAC_SLEEP_CONTROL_ENABLE_SET(x) (((x) << WLAN_MAC_SLEEP_CONTROL
_ENABLE_LSB) & WLAN_MAC_SLEEP_CONTROL_ENABLE_MASK) |
| 828 |
| 829 #define WLAN_KEEP_AWAKE_ADDRESS 0x000000d0 |
| 830 #define WLAN_KEEP_AWAKE_OFFSET 0x000000d0 |
| 831 #define WLAN_KEEP_AWAKE_COUNT_MSB 7 |
| 832 #define WLAN_KEEP_AWAKE_COUNT_LSB 0 |
| 833 #define WLAN_KEEP_AWAKE_COUNT_MASK 0x000000ff |
| 834 #define WLAN_KEEP_AWAKE_COUNT_GET(x) (((x) & WLAN_KEEP_AWAKE_COUNT_M
ASK) >> WLAN_KEEP_AWAKE_COUNT_LSB) |
| 835 #define WLAN_KEEP_AWAKE_COUNT_SET(x) (((x) << WLAN_KEEP_AWAKE_COUNT_
LSB) & WLAN_KEEP_AWAKE_COUNT_MASK) |
| 836 |
| 837 #define WLAN_LPO_CAL_TIME_ADDRESS 0x000000d4 |
| 838 #define WLAN_LPO_CAL_TIME_OFFSET 0x000000d4 |
| 839 #define WLAN_LPO_CAL_TIME_LENGTH_MSB 13 |
| 840 #define WLAN_LPO_CAL_TIME_LENGTH_LSB 0 |
| 841 #define WLAN_LPO_CAL_TIME_LENGTH_MASK 0x00003fff |
| 842 #define WLAN_LPO_CAL_TIME_LENGTH_GET(x) (((x) & WLAN_LPO_CAL_TIME_LENGT
H_MASK) >> WLAN_LPO_CAL_TIME_LENGTH_LSB) |
| 843 #define WLAN_LPO_CAL_TIME_LENGTH_SET(x) (((x) << WLAN_LPO_CAL_TIME_LENG
TH_LSB) & WLAN_LPO_CAL_TIME_LENGTH_MASK) |
| 844 |
| 845 #define WLAN_LPO_INIT_DIVIDEND_INT_ADDRESS 0x000000d8 |
| 846 #define WLAN_LPO_INIT_DIVIDEND_INT_OFFSET 0x000000d8 |
| 847 #define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MSB 23 |
| 848 #define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_LSB 0 |
| 849 #define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MASK 0x00ffffff |
| 850 #define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_GET(x) (((x) & WLAN_LPO_INIT_DIVIDEND_
INT_VALUE_MASK) >> WLAN_LPO_INIT_DIVIDEND_INT_VALUE_LSB) |
| 851 #define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_SET(x) (((x) << WLAN_LPO_INIT_DIVIDEND
_INT_VALUE_LSB) & WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MASK) |
| 852 |
| 853 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_ADDRESS 0x000000dc |
| 854 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_OFFSET 0x000000dc |
| 855 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MSB 10 |
| 856 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB 0 |
| 857 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK 0x000007ff |
| 858 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_GET(x) (((x) & WLAN_LPO_INIT_DIVID
END_FRACTION_VALUE_MASK) >> WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB) |
| 859 #define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_SET(x) (((x) << WLAN_LPO_INIT_DIVI
DEND_FRACTION_VALUE_LSB) & WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK) |
| 860 |
| 861 #define WLAN_LPO_CAL_ADDRESS 0x000000e0 |
| 862 #define WLAN_LPO_CAL_OFFSET 0x000000e0 |
| 863 #define WLAN_LPO_CAL_ENABLE_MSB 20 |
| 864 #define WLAN_LPO_CAL_ENABLE_LSB 20 |
| 865 #define WLAN_LPO_CAL_ENABLE_MASK 0x00100000 |
| 866 #define WLAN_LPO_CAL_ENABLE_GET(x) (((x) & WLAN_LPO_CAL_ENABLE_MAS
K) >> WLAN_LPO_CAL_ENABLE_LSB) |
| 867 #define WLAN_LPO_CAL_ENABLE_SET(x) (((x) << WLAN_LPO_CAL_ENABLE_LS
B) & WLAN_LPO_CAL_ENABLE_MASK) |
| 868 #define WLAN_LPO_CAL_COUNT_MSB 19 |
| 869 #define WLAN_LPO_CAL_COUNT_LSB 0 |
| 870 #define WLAN_LPO_CAL_COUNT_MASK 0x000fffff |
| 871 #define WLAN_LPO_CAL_COUNT_GET(x) (((x) & WLAN_LPO_CAL_COUNT_MASK
) >> WLAN_LPO_CAL_COUNT_LSB) |
| 872 #define WLAN_LPO_CAL_COUNT_SET(x) (((x) << WLAN_LPO_CAL_COUNT_LSB
) & WLAN_LPO_CAL_COUNT_MASK) |
| 873 |
| 874 #define WLAN_LPO_CAL_TEST_CONTROL_ADDRESS 0x000000e4 |
| 875 #define WLAN_LPO_CAL_TEST_CONTROL_OFFSET 0x000000e4 |
| 876 #define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MSB 5 |
| 877 #define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_LSB 5 |
| 878 #define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MASK 0x00000020 |
| 879 #define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_GET(x) (((x) & WLAN_LPO_CAL_TEST_CONTR
OL_ENABLE_MASK) >> WLAN_LPO_CAL_TEST_CONTROL_ENABLE_LSB) |
| 880 #define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_SET(x) (((x) << WLAN_LPO_CAL_TEST_CONT
ROL_ENABLE_LSB) & WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MASK) |
| 881 #define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MSB 4 |
| 882 #define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB 0 |
| 883 #define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK 0x0000001f |
| 884 #define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_GET(x) (((x) & WLAN_LPO_CAL_TEST_CO
NTROL_RTC_CYCLES_MASK) >> WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB) |
| 885 #define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_SET(x) (((x) << WLAN_LPO_CAL_TEST_C
ONTROL_RTC_CYCLES_LSB) & WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK) |
| 886 |
| 887 #define WLAN_LPO_CAL_TEST_STATUS_ADDRESS 0x000000e8 |
| 888 #define WLAN_LPO_CAL_TEST_STATUS_OFFSET 0x000000e8 |
| 889 #define WLAN_LPO_CAL_TEST_STATUS_READY_MSB 16 |
| 890 #define WLAN_LPO_CAL_TEST_STATUS_READY_LSB 16 |
| 891 #define WLAN_LPO_CAL_TEST_STATUS_READY_MASK 0x00010000 |
| 892 #define WLAN_LPO_CAL_TEST_STATUS_READY_GET(x) (((x) & WLAN_LPO_CAL_TEST_STATU
S_READY_MASK) >> WLAN_LPO_CAL_TEST_STATUS_READY_LSB) |
| 893 #define WLAN_LPO_CAL_TEST_STATUS_READY_SET(x) (((x) << WLAN_LPO_CAL_TEST_STAT
US_READY_LSB) & WLAN_LPO_CAL_TEST_STATUS_READY_MASK) |
| 894 #define WLAN_LPO_CAL_TEST_STATUS_COUNT_MSB 15 |
| 895 #define WLAN_LPO_CAL_TEST_STATUS_COUNT_LSB 0 |
| 896 #define WLAN_LPO_CAL_TEST_STATUS_COUNT_MASK 0x0000ffff |
| 897 #define WLAN_LPO_CAL_TEST_STATUS_COUNT_GET(x) (((x) & WLAN_LPO_CAL_TEST_STATU
S_COUNT_MASK) >> WLAN_LPO_CAL_TEST_STATUS_COUNT_LSB) |
| 898 #define WLAN_LPO_CAL_TEST_STATUS_COUNT_SET(x) (((x) << WLAN_LPO_CAL_TEST_STAT
US_COUNT_LSB) & WLAN_LPO_CAL_TEST_STATUS_COUNT_MASK) |
| 899 |
| 900 #define WLAN_CHIP_ID_ADDRESS 0x000000ec |
| 901 #define WLAN_CHIP_ID_OFFSET 0x000000ec |
| 902 #define WLAN_CHIP_ID_DEVICE_ID_MSB 31 |
| 903 #define WLAN_CHIP_ID_DEVICE_ID_LSB 16 |
| 904 #define WLAN_CHIP_ID_DEVICE_ID_MASK 0xffff0000 |
| 905 #define WLAN_CHIP_ID_DEVICE_ID_GET(x) (((x) & WLAN_CHIP_ID_DEVICE_ID_
MASK) >> WLAN_CHIP_ID_DEVICE_ID_LSB) |
| 906 #define WLAN_CHIP_ID_DEVICE_ID_SET(x) (((x) << WLAN_CHIP_ID_DEVICE_ID
_LSB) & WLAN_CHIP_ID_DEVICE_ID_MASK) |
| 907 #define WLAN_CHIP_ID_CONFIG_ID_MSB 15 |
| 908 #define WLAN_CHIP_ID_CONFIG_ID_LSB 4 |
| 909 #define WLAN_CHIP_ID_CONFIG_ID_MASK 0x0000fff0 |
| 910 #define WLAN_CHIP_ID_CONFIG_ID_GET(x) (((x) & WLAN_CHIP_ID_CONFIG_ID_
MASK) >> WLAN_CHIP_ID_CONFIG_ID_LSB) |
| 911 #define WLAN_CHIP_ID_CONFIG_ID_SET(x) (((x) << WLAN_CHIP_ID_CONFIG_ID
_LSB) & WLAN_CHIP_ID_CONFIG_ID_MASK) |
| 912 #define WLAN_CHIP_ID_VERSION_ID_MSB 3 |
| 913 #define WLAN_CHIP_ID_VERSION_ID_LSB 0 |
| 914 #define WLAN_CHIP_ID_VERSION_ID_MASK 0x0000000f |
| 915 #define WLAN_CHIP_ID_VERSION_ID_GET(x) (((x) & WLAN_CHIP_ID_VERSION_ID
_MASK) >> WLAN_CHIP_ID_VERSION_ID_LSB) |
| 916 #define WLAN_CHIP_ID_VERSION_ID_SET(x) (((x) << WLAN_CHIP_ID_VERSION_I
D_LSB) & WLAN_CHIP_ID_VERSION_ID_MASK) |
| 917 |
| 918 #define WLAN_DERIVED_RTC_CLK_ADDRESS 0x000000f0 |
| 919 #define WLAN_DERIVED_RTC_CLK_OFFSET 0x000000f0 |
| 920 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MSB 20 |
| 921 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_LSB 20 |
| 922 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MASK 0x00100000 |
| 923 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_GET(x) (((x) & WLAN_DERIVED_RTC_
CLK_EXTERNAL_DETECT_EN_MASK) >> WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_LSB) |
| 924 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_SET(x) (((x) << WLAN_DERIVED_RTC
_CLK_EXTERNAL_DETECT_EN_LSB) & WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MASK) |
| 925 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MSB 18 |
| 926 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_LSB 18 |
| 927 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MASK 0x00040000 |
| 928 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_GET(x) (((x) & WLAN_DERIVED_RTC_CLK
_EXTERNAL_DETECT_MASK) >> WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_LSB) |
| 929 #define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_SET(x) (((x) << WLAN_DERIVED_RTC_CL
K_EXTERNAL_DETECT_LSB) & WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MASK) |
| 930 #define WLAN_DERIVED_RTC_CLK_FORCE_MSB 17 |
| 931 #define WLAN_DERIVED_RTC_CLK_FORCE_LSB 16 |
| 932 #define WLAN_DERIVED_RTC_CLK_FORCE_MASK 0x00030000 |
| 933 #define WLAN_DERIVED_RTC_CLK_FORCE_GET(x) (((x) & WLAN_DERIVED_RTC_CLK_FO
RCE_MASK) >> WLAN_DERIVED_RTC_CLK_FORCE_LSB) |
| 934 #define WLAN_DERIVED_RTC_CLK_FORCE_SET(x) (((x) << WLAN_DERIVED_RTC_CLK_F
ORCE_LSB) & WLAN_DERIVED_RTC_CLK_FORCE_MASK) |
| 935 #define WLAN_DERIVED_RTC_CLK_PERIOD_MSB 15 |
| 936 #define WLAN_DERIVED_RTC_CLK_PERIOD_LSB 1 |
| 937 #define WLAN_DERIVED_RTC_CLK_PERIOD_MASK 0x0000fffe |
| 938 #define WLAN_DERIVED_RTC_CLK_PERIOD_GET(x) (((x) & WLAN_DERIVED_RTC_CLK_PE
RIOD_MASK) >> WLAN_DERIVED_RTC_CLK_PERIOD_LSB) |
| 939 #define WLAN_DERIVED_RTC_CLK_PERIOD_SET(x) (((x) << WLAN_DERIVED_RTC_CLK_P
ERIOD_LSB) & WLAN_DERIVED_RTC_CLK_PERIOD_MASK) |
| 940 |
| 941 #define MAC_PCU_SLP32_MODE_ADDRESS 0x000000f4 |
| 942 #define MAC_PCU_SLP32_MODE_OFFSET 0x000000f4 |
| 943 #define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MSB 24 |
| 944 #define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_LSB 24 |
| 945 #define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MASK 0x01000000 |
| 946 #define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_GET(x) (((x) & MAC_PCU_SLP32_MODE_T
SF2_WRITE_STATUS_MASK) >> MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_LSB) |
| 947 #define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_SET(x) (((x) << MAC_PCU_SLP32_MODE_
TSF2_WRITE_STATUS_LSB) & MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MASK) |
| 948 #define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MSB 23 |
| 949 #define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_LSB 23 |
| 950 #define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MASK 0x00800000 |
| 951 #define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_GET(x) (((x) & MAC_PCU_SLP32_MODE
_FORCE_BIAS_BLOCK_ON_MASK) >> MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_LSB) |
| 952 #define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_SET(x) (((x) << MAC_PCU_SLP32_MOD
E_FORCE_BIAS_BLOCK_ON_LSB) & MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MASK) |
| 953 #define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MSB 22 |
| 954 #define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_LSB 22 |
| 955 #define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MASK 0x00400000 |
| 956 #define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_GET(x) (((x) & MAC_PCU_SLP32_MODE_DISA
BLE_32KHZ_MASK) >> MAC_PCU_SLP32_MODE_DISABLE_32KHZ_LSB) |
| 957 #define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_SET(x) (((x) << MAC_PCU_SLP32_MODE_DIS
ABLE_32KHZ_LSB) & MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MASK) |
| 958 #define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MSB 21 |
| 959 #define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_LSB 21 |
| 960 #define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MASK 0x00200000 |
| 961 #define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_GET(x) (((x) & MAC_PCU_SLP32_MODE_TS
F_WRITE_STATUS_MASK) >> MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_LSB) |
| 962 #define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_SET(x) (((x) << MAC_PCU_SLP32_MODE_T
SF_WRITE_STATUS_LSB) & MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MASK) |
| 963 #define MAC_PCU_SLP32_MODE_ENABLE_MSB 20 |
| 964 #define MAC_PCU_SLP32_MODE_ENABLE_LSB 20 |
| 965 #define MAC_PCU_SLP32_MODE_ENABLE_MASK 0x00100000 |
| 966 #define MAC_PCU_SLP32_MODE_ENABLE_GET(x) (((x) & MAC_PCU_SLP32_MODE_ENAB
LE_MASK) >> MAC_PCU_SLP32_MODE_ENABLE_LSB) |
| 967 #define MAC_PCU_SLP32_MODE_ENABLE_SET(x) (((x) << MAC_PCU_SLP32_MODE_ENA
BLE_LSB) & MAC_PCU_SLP32_MODE_ENABLE_MASK) |
| 968 #define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MSB 19 |
| 969 #define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_LSB 0 |
| 970 #define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MASK 0x000fffff |
| 971 #define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_GET(x) (((x) & MAC_PCU_SLP32_MODE_HA
LF_CLK_LATENCY_MASK) >> MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_LSB) |
| 972 #define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_SET(x) (((x) << MAC_PCU_SLP32_MODE_H
ALF_CLK_LATENCY_LSB) & MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MASK) |
| 973 |
| 974 #define MAC_PCU_SLP32_WAKE_ADDRESS 0x000000f8 |
| 975 #define MAC_PCU_SLP32_WAKE_OFFSET 0x000000f8 |
| 976 #define MAC_PCU_SLP32_WAKE_XTL_TIME_MSB 15 |
| 977 #define MAC_PCU_SLP32_WAKE_XTL_TIME_LSB 0 |
| 978 #define MAC_PCU_SLP32_WAKE_XTL_TIME_MASK 0x0000ffff |
| 979 #define MAC_PCU_SLP32_WAKE_XTL_TIME_GET(x) (((x) & MAC_PCU_SLP32_WAKE_XTL_
TIME_MASK) >> MAC_PCU_SLP32_WAKE_XTL_TIME_LSB) |
| 980 #define MAC_PCU_SLP32_WAKE_XTL_TIME_SET(x) (((x) << MAC_PCU_SLP32_WAKE_XTL
_TIME_LSB) & MAC_PCU_SLP32_WAKE_XTL_TIME_MASK) |
| 981 |
| 982 #define MAC_PCU_SLP32_INC_ADDRESS 0x000000fc |
| 983 #define MAC_PCU_SLP32_INC_OFFSET 0x000000fc |
| 984 #define MAC_PCU_SLP32_INC_TSF_INC_MSB 19 |
| 985 #define MAC_PCU_SLP32_INC_TSF_INC_LSB 0 |
| 986 #define MAC_PCU_SLP32_INC_TSF_INC_MASK 0x000fffff |
| 987 #define MAC_PCU_SLP32_INC_TSF_INC_GET(x) (((x) & MAC_PCU_SLP32_INC_TSF_I
NC_MASK) >> MAC_PCU_SLP32_INC_TSF_INC_LSB) |
| 988 #define MAC_PCU_SLP32_INC_TSF_INC_SET(x) (((x) << MAC_PCU_SLP32_INC_TSF_
INC_LSB) & MAC_PCU_SLP32_INC_TSF_INC_MASK) |
| 989 |
| 990 #define MAC_PCU_SLP_MIB1_ADDRESS 0x00000100 |
| 991 #define MAC_PCU_SLP_MIB1_OFFSET 0x00000100 |
| 992 #define MAC_PCU_SLP_MIB1_SLEEP_CNT_MSB 31 |
| 993 #define MAC_PCU_SLP_MIB1_SLEEP_CNT_LSB 0 |
| 994 #define MAC_PCU_SLP_MIB1_SLEEP_CNT_MASK 0xffffffff |
| 995 #define MAC_PCU_SLP_MIB1_SLEEP_CNT_GET(x) (((x) & MAC_PCU_SLP_MIB1_SLEEP_
CNT_MASK) >> MAC_PCU_SLP_MIB1_SLEEP_CNT_LSB) |
| 996 #define MAC_PCU_SLP_MIB1_SLEEP_CNT_SET(x) (((x) << MAC_PCU_SLP_MIB1_SLEEP
_CNT_LSB) & MAC_PCU_SLP_MIB1_SLEEP_CNT_MASK) |
| 997 |
| 998 #define MAC_PCU_SLP_MIB2_ADDRESS 0x00000104 |
| 999 #define MAC_PCU_SLP_MIB2_OFFSET 0x00000104 |
| 1000 #define MAC_PCU_SLP_MIB2_CYCLE_CNT_MSB 31 |
| 1001 #define MAC_PCU_SLP_MIB2_CYCLE_CNT_LSB 0 |
| 1002 #define MAC_PCU_SLP_MIB2_CYCLE_CNT_MASK 0xffffffff |
| 1003 #define MAC_PCU_SLP_MIB2_CYCLE_CNT_GET(x) (((x) & MAC_PCU_SLP_MIB2_CYCLE_
CNT_MASK) >> MAC_PCU_SLP_MIB2_CYCLE_CNT_LSB) |
| 1004 #define MAC_PCU_SLP_MIB2_CYCLE_CNT_SET(x) (((x) << MAC_PCU_SLP_MIB2_CYCLE
_CNT_LSB) & MAC_PCU_SLP_MIB2_CYCLE_CNT_MASK) |
| 1005 |
| 1006 #define MAC_PCU_SLP_MIB3_ADDRESS 0x00000108 |
| 1007 #define MAC_PCU_SLP_MIB3_OFFSET 0x00000108 |
| 1008 #define MAC_PCU_SLP_MIB3_PENDING_MSB 1 |
| 1009 #define MAC_PCU_SLP_MIB3_PENDING_LSB 1 |
| 1010 #define MAC_PCU_SLP_MIB3_PENDING_MASK 0x00000002 |
| 1011 #define MAC_PCU_SLP_MIB3_PENDING_GET(x) (((x) & MAC_PCU_SLP_MIB3_PENDIN
G_MASK) >> MAC_PCU_SLP_MIB3_PENDING_LSB) |
| 1012 #define MAC_PCU_SLP_MIB3_PENDING_SET(x) (((x) << MAC_PCU_SLP_MIB3_PENDI
NG_LSB) & MAC_PCU_SLP_MIB3_PENDING_MASK) |
| 1013 #define MAC_PCU_SLP_MIB3_CLR_CNT_MSB 0 |
| 1014 #define MAC_PCU_SLP_MIB3_CLR_CNT_LSB 0 |
| 1015 #define MAC_PCU_SLP_MIB3_CLR_CNT_MASK 0x00000001 |
| 1016 #define MAC_PCU_SLP_MIB3_CLR_CNT_GET(x) (((x) & MAC_PCU_SLP_MIB3_CLR_CN
T_MASK) >> MAC_PCU_SLP_MIB3_CLR_CNT_LSB) |
| 1017 #define MAC_PCU_SLP_MIB3_CLR_CNT_SET(x) (((x) << MAC_PCU_SLP_MIB3_CLR_C
NT_LSB) & MAC_PCU_SLP_MIB3_CLR_CNT_MASK) |
| 1018 |
| 1019 #define WLAN_POWER_REG_ADDRESS 0x0000010c |
| 1020 #define WLAN_POWER_REG_OFFSET 0x0000010c |
| 1021 #define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MSB 15 |
| 1022 #define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_LSB 15 |
| 1023 #define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MASK 0x00008000 |
| 1024 #define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_GET(x) (((x) & WLAN_POWER_REG_SLEEP
_MAKE_N_BREAK_EN_MASK) >> WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_LSB) |
| 1025 #define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_SET(x) (((x) << WLAN_POWER_REG_SLEE
P_MAKE_N_BREAK_EN_LSB) & WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MASK) |
| 1026 #define WLAN_POWER_REG_DEBUG_EN_MSB 14 |
| 1027 #define WLAN_POWER_REG_DEBUG_EN_LSB 14 |
| 1028 #define WLAN_POWER_REG_DEBUG_EN_MASK 0x00004000 |
| 1029 #define WLAN_POWER_REG_DEBUG_EN_GET(x) (((x) & WLAN_POWER_REG_DEBUG_EN
_MASK) >> WLAN_POWER_REG_DEBUG_EN_LSB) |
| 1030 #define WLAN_POWER_REG_DEBUG_EN_SET(x) (((x) << WLAN_POWER_REG_DEBUG_E
N_LSB) & WLAN_POWER_REG_DEBUG_EN_MASK) |
| 1031 #define WLAN_POWER_REG_WLAN_BB_PWD_EN_MSB 13 |
| 1032 #define WLAN_POWER_REG_WLAN_BB_PWD_EN_LSB 13 |
| 1033 #define WLAN_POWER_REG_WLAN_BB_PWD_EN_MASK 0x00002000 |
| 1034 #define WLAN_POWER_REG_WLAN_BB_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_BB_
PWD_EN_MASK) >> WLAN_POWER_REG_WLAN_BB_PWD_EN_LSB) |
| 1035 #define WLAN_POWER_REG_WLAN_BB_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_BB
_PWD_EN_LSB) & WLAN_POWER_REG_WLAN_BB_PWD_EN_MASK) |
| 1036 #define WLAN_POWER_REG_WLAN_MAC_PWD_EN_MSB 12 |
| 1037 #define WLAN_POWER_REG_WLAN_MAC_PWD_EN_LSB 12 |
| 1038 #define WLAN_POWER_REG_WLAN_MAC_PWD_EN_MASK 0x00001000 |
| 1039 #define WLAN_POWER_REG_WLAN_MAC_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_MAC
_PWD_EN_MASK) >> WLAN_POWER_REG_WLAN_MAC_PWD_EN_LSB) |
| 1040 #define WLAN_POWER_REG_WLAN_MAC_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_MA
C_PWD_EN_LSB) & WLAN_POWER_REG_WLAN_MAC_PWD_EN_MASK) |
| 1041 #define WLAN_POWER_REG_VLVL_MSB 11 |
| 1042 #define WLAN_POWER_REG_VLVL_LSB 8 |
| 1043 #define WLAN_POWER_REG_VLVL_MASK 0x00000f00 |
| 1044 #define WLAN_POWER_REG_VLVL_GET(x) (((x) & WLAN_POWER_REG_VLVL_MAS
K) >> WLAN_POWER_REG_VLVL_LSB) |
| 1045 #define WLAN_POWER_REG_VLVL_SET(x) (((x) << WLAN_POWER_REG_VLVL_LS
B) & WLAN_POWER_REG_VLVL_MASK) |
| 1046 #define WLAN_POWER_REG_CPU_INT_ENABLE_MSB 7 |
| 1047 #define WLAN_POWER_REG_CPU_INT_ENABLE_LSB 7 |
| 1048 #define WLAN_POWER_REG_CPU_INT_ENABLE_MASK 0x00000080 |
| 1049 #define WLAN_POWER_REG_CPU_INT_ENABLE_GET(x) (((x) & WLAN_POWER_REG_CPU_INT_
ENABLE_MASK) >> WLAN_POWER_REG_CPU_INT_ENABLE_LSB) |
| 1050 #define WLAN_POWER_REG_CPU_INT_ENABLE_SET(x) (((x) << WLAN_POWER_REG_CPU_INT
_ENABLE_LSB) & WLAN_POWER_REG_CPU_INT_ENABLE_MASK) |
| 1051 #define WLAN_POWER_REG_WLAN_ISO_DIS_MSB 6 |
| 1052 #define WLAN_POWER_REG_WLAN_ISO_DIS_LSB 6 |
| 1053 #define WLAN_POWER_REG_WLAN_ISO_DIS_MASK 0x00000040 |
| 1054 #define WLAN_POWER_REG_WLAN_ISO_DIS_GET(x) (((x) & WLAN_POWER_REG_WLAN_ISO
_DIS_MASK) >> WLAN_POWER_REG_WLAN_ISO_DIS_LSB) |
| 1055 #define WLAN_POWER_REG_WLAN_ISO_DIS_SET(x) (((x) << WLAN_POWER_REG_WLAN_IS
O_DIS_LSB) & WLAN_POWER_REG_WLAN_ISO_DIS_MASK) |
| 1056 #define WLAN_POWER_REG_WLAN_ISO_CNTL_MSB 5 |
| 1057 #define WLAN_POWER_REG_WLAN_ISO_CNTL_LSB 5 |
| 1058 #define WLAN_POWER_REG_WLAN_ISO_CNTL_MASK 0x00000020 |
| 1059 #define WLAN_POWER_REG_WLAN_ISO_CNTL_GET(x) (((x) & WLAN_POWER_REG_WLAN_ISO
_CNTL_MASK) >> WLAN_POWER_REG_WLAN_ISO_CNTL_LSB) |
| 1060 #define WLAN_POWER_REG_WLAN_ISO_CNTL_SET(x) (((x) << WLAN_POWER_REG_WLAN_IS
O_CNTL_LSB) & WLAN_POWER_REG_WLAN_ISO_CNTL_MASK) |
| 1061 #define WLAN_POWER_REG_RADIO_PWD_EN_MSB 4 |
| 1062 #define WLAN_POWER_REG_RADIO_PWD_EN_LSB 4 |
| 1063 #define WLAN_POWER_REG_RADIO_PWD_EN_MASK 0x00000010 |
| 1064 #define WLAN_POWER_REG_RADIO_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_RADIO_PW
D_EN_MASK) >> WLAN_POWER_REG_RADIO_PWD_EN_LSB) |
| 1065 #define WLAN_POWER_REG_RADIO_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_RADIO_P
WD_EN_LSB) & WLAN_POWER_REG_RADIO_PWD_EN_MASK) |
| 1066 #define WLAN_POWER_REG_SOC_ISO_EN_MSB 3 |
| 1067 #define WLAN_POWER_REG_SOC_ISO_EN_LSB 3 |
| 1068 #define WLAN_POWER_REG_SOC_ISO_EN_MASK 0x00000008 |
| 1069 #define WLAN_POWER_REG_SOC_ISO_EN_GET(x) (((x) & WLAN_POWER_REG_SOC_ISO_
EN_MASK) >> WLAN_POWER_REG_SOC_ISO_EN_LSB) |
| 1070 #define WLAN_POWER_REG_SOC_ISO_EN_SET(x) (((x) << WLAN_POWER_REG_SOC_ISO
_EN_LSB) & WLAN_POWER_REG_SOC_ISO_EN_MASK) |
| 1071 #define WLAN_POWER_REG_WLAN_ISO_EN_MSB 2 |
| 1072 #define WLAN_POWER_REG_WLAN_ISO_EN_LSB 2 |
| 1073 #define WLAN_POWER_REG_WLAN_ISO_EN_MASK 0x00000004 |
| 1074 #define WLAN_POWER_REG_WLAN_ISO_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_ISO
_EN_MASK) >> WLAN_POWER_REG_WLAN_ISO_EN_LSB) |
| 1075 #define WLAN_POWER_REG_WLAN_ISO_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_IS
O_EN_LSB) & WLAN_POWER_REG_WLAN_ISO_EN_MASK) |
| 1076 #define WLAN_POWER_REG_WLAN_PWD_EN_MSB 1 |
| 1077 #define WLAN_POWER_REG_WLAN_PWD_EN_LSB 1 |
| 1078 #define WLAN_POWER_REG_WLAN_PWD_EN_MASK 0x00000002 |
| 1079 #define WLAN_POWER_REG_WLAN_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_PWD
_EN_MASK) >> WLAN_POWER_REG_WLAN_PWD_EN_LSB) |
| 1080 #define WLAN_POWER_REG_WLAN_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_PW
D_EN_LSB) & WLAN_POWER_REG_WLAN_PWD_EN_MASK) |
| 1081 #define WLAN_POWER_REG_POWER_EN_MSB 0 |
| 1082 #define WLAN_POWER_REG_POWER_EN_LSB 0 |
| 1083 #define WLAN_POWER_REG_POWER_EN_MASK 0x00000001 |
| 1084 #define WLAN_POWER_REG_POWER_EN_GET(x) (((x) & WLAN_POWER_REG_POWER_EN
_MASK) >> WLAN_POWER_REG_POWER_EN_LSB) |
| 1085 #define WLAN_POWER_REG_POWER_EN_SET(x) (((x) << WLAN_POWER_REG_POWER_E
N_LSB) & WLAN_POWER_REG_POWER_EN_MASK) |
| 1086 |
| 1087 #define WLAN_CORE_CLK_CTRL_ADDRESS 0x00000110 |
| 1088 #define WLAN_CORE_CLK_CTRL_OFFSET 0x00000110 |
| 1089 #define WLAN_CORE_CLK_CTRL_DIV_MSB 2 |
| 1090 #define WLAN_CORE_CLK_CTRL_DIV_LSB 0 |
| 1091 #define WLAN_CORE_CLK_CTRL_DIV_MASK 0x00000007 |
| 1092 #define WLAN_CORE_CLK_CTRL_DIV_GET(x) (((x) & WLAN_CORE_CLK_CTRL_DIV_
MASK) >> WLAN_CORE_CLK_CTRL_DIV_LSB) |
| 1093 #define WLAN_CORE_CLK_CTRL_DIV_SET(x) (((x) << WLAN_CORE_CLK_CTRL_DIV
_LSB) & WLAN_CORE_CLK_CTRL_DIV_MASK) |
| 1094 |
| 1095 #define WLAN_GPIO_WAKEUP_CONTROL_ADDRESS 0x00000114 |
| 1096 #define WLAN_GPIO_WAKEUP_CONTROL_OFFSET 0x00000114 |
| 1097 #define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MSB 0 |
| 1098 #define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_LSB 0 |
| 1099 #define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MASK 0x00000001 |
| 1100 #define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_GET(x) (((x) & WLAN_GPIO_WAKEUP_CONTRO
L_ENABLE_MASK) >> WLAN_GPIO_WAKEUP_CONTROL_ENABLE_LSB) |
| 1101 #define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_SET(x) (((x) << WLAN_GPIO_WAKEUP_CONTR
OL_ENABLE_LSB) & WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MASK) |
| 1102 |
| 1103 #define HT_ADDRESS 0x00000118 |
| 1104 #define HT_OFFSET 0x00000118 |
| 1105 #define HT_MODE_MSB 0 |
| 1106 #define HT_MODE_LSB 0 |
| 1107 #define HT_MODE_MASK 0x00000001 |
| 1108 #define HT_MODE_GET(x) (((x) & HT_MODE_MASK) >> HT_MOD
E_LSB) |
| 1109 #define HT_MODE_SET(x) (((x) << HT_MODE_LSB) & HT_MODE
_MASK) |
| 1110 |
| 1111 #define MAC_PCU_TSF_L32_ADDRESS 0x0000011c |
| 1112 #define MAC_PCU_TSF_L32_OFFSET 0x0000011c |
| 1113 #define MAC_PCU_TSF_L32_VALUE_MSB 31 |
| 1114 #define MAC_PCU_TSF_L32_VALUE_LSB 0 |
| 1115 #define MAC_PCU_TSF_L32_VALUE_MASK 0xffffffff |
| 1116 #define MAC_PCU_TSF_L32_VALUE_GET(x) (((x) & MAC_PCU_TSF_L32_VALUE_M
ASK) >> MAC_PCU_TSF_L32_VALUE_LSB) |
| 1117 #define MAC_PCU_TSF_L32_VALUE_SET(x) (((x) << MAC_PCU_TSF_L32_VALUE_
LSB) & MAC_PCU_TSF_L32_VALUE_MASK) |
| 1118 |
| 1119 #define MAC_PCU_TSF_U32_ADDRESS 0x00000120 |
| 1120 #define MAC_PCU_TSF_U32_OFFSET 0x00000120 |
| 1121 #define MAC_PCU_TSF_U32_VALUE_MSB 31 |
| 1122 #define MAC_PCU_TSF_U32_VALUE_LSB 0 |
| 1123 #define MAC_PCU_TSF_U32_VALUE_MASK 0xffffffff |
| 1124 #define MAC_PCU_TSF_U32_VALUE_GET(x) (((x) & MAC_PCU_TSF_U32_VALUE_M
ASK) >> MAC_PCU_TSF_U32_VALUE_LSB) |
| 1125 #define MAC_PCU_TSF_U32_VALUE_SET(x) (((x) << MAC_PCU_TSF_U32_VALUE_
LSB) & MAC_PCU_TSF_U32_VALUE_MASK) |
| 1126 |
| 1127 #define MAC_PCU_WBTIMER_ADDRESS 0x00000124 |
| 1128 #define MAC_PCU_WBTIMER_OFFSET 0x00000124 |
| 1129 #define MAC_PCU_WBTIMER_VALUE_MSB 31 |
| 1130 #define MAC_PCU_WBTIMER_VALUE_LSB 0 |
| 1131 #define MAC_PCU_WBTIMER_VALUE_MASK 0xffffffff |
| 1132 #define MAC_PCU_WBTIMER_VALUE_GET(x) (((x) & MAC_PCU_WBTIMER_VALUE_M
ASK) >> MAC_PCU_WBTIMER_VALUE_LSB) |
| 1133 #define MAC_PCU_WBTIMER_VALUE_SET(x) (((x) << MAC_PCU_WBTIMER_VALUE_
LSB) & MAC_PCU_WBTIMER_VALUE_MASK) |
| 1134 |
| 1135 #define MAC_PCU_GENERIC_TIMERS_ADDRESS 0x00000140 |
| 1136 #define MAC_PCU_GENERIC_TIMERS_OFFSET 0x00000140 |
| 1137 #define MAC_PCU_GENERIC_TIMERS_DATA_MSB 31 |
| 1138 #define MAC_PCU_GENERIC_TIMERS_DATA_LSB 0 |
| 1139 #define MAC_PCU_GENERIC_TIMERS_DATA_MASK 0xffffffff |
| 1140 #define MAC_PCU_GENERIC_TIMERS_DATA_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS_
DATA_MASK) >> MAC_PCU_GENERIC_TIMERS_DATA_LSB) |
| 1141 #define MAC_PCU_GENERIC_TIMERS_DATA_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS
_DATA_LSB) & MAC_PCU_GENERIC_TIMERS_DATA_MASK) |
| 1142 |
| 1143 #define MAC_PCU_GENERIC_TIMERS_MODE_ADDRESS 0x00000180 |
| 1144 #define MAC_PCU_GENERIC_TIMERS_MODE_OFFSET 0x00000180 |
| 1145 #define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MSB 15 |
| 1146 #define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_LSB 0 |
| 1147 #define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MASK 0x0000ffff |
| 1148 #define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS
_MODE_ENABLE_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_LSB) |
| 1149 #define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_SET(x) (((x) << MAC_PCU_GENERIC_TIMER
S_MODE_ENABLE_LSB) & MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MASK) |
| 1150 |
| 1151 #define MAC_PCU_GENERIC_TIMERS2_ADDRESS 0x000001c0 |
| 1152 #define MAC_PCU_GENERIC_TIMERS2_OFFSET 0x000001c0 |
| 1153 #define MAC_PCU_GENERIC_TIMERS2_DATA_MSB 31 |
| 1154 #define MAC_PCU_GENERIC_TIMERS2_DATA_LSB 0 |
| 1155 #define MAC_PCU_GENERIC_TIMERS2_DATA_MASK 0xffffffff |
| 1156 #define MAC_PCU_GENERIC_TIMERS2_DATA_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS2
_DATA_MASK) >> MAC_PCU_GENERIC_TIMERS2_DATA_LSB) |
| 1157 #define MAC_PCU_GENERIC_TIMERS2_DATA_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS
2_DATA_LSB) & MAC_PCU_GENERIC_TIMERS2_DATA_MASK) |
| 1158 |
| 1159 #define MAC_PCU_GENERIC_TIMERS_MODE2_ADDRESS 0x00000200 |
| 1160 #define MAC_PCU_GENERIC_TIMERS_MODE2_OFFSET 0x00000200 |
| 1161 #define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MSB 15 |
| 1162 #define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_LSB 0 |
| 1163 #define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MASK 0x0000ffff |
| 1164 #define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_GET(x) (((x) & MAC_PCU_GENERIC_TIMER
S_MODE2_ENABLE_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_LSB) |
| 1165 #define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_SET(x) (((x) << MAC_PCU_GENERIC_TIME
RS_MODE2_ENABLE_LSB) & MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MASK) |
| 1166 |
| 1167 #define MAC_PCU_SLP1_ADDRESS 0x00000204 |
| 1168 #define MAC_PCU_SLP1_OFFSET 0x00000204 |
| 1169 #define MAC_PCU_SLP1_ASSUME_DTIM_MSB 19 |
| 1170 #define MAC_PCU_SLP1_ASSUME_DTIM_LSB 19 |
| 1171 #define MAC_PCU_SLP1_ASSUME_DTIM_MASK 0x00080000 |
| 1172 #define MAC_PCU_SLP1_ASSUME_DTIM_GET(x) (((x) & MAC_PCU_SLP1_ASSUME_DTI
M_MASK) >> MAC_PCU_SLP1_ASSUME_DTIM_LSB) |
| 1173 #define MAC_PCU_SLP1_ASSUME_DTIM_SET(x) (((x) << MAC_PCU_SLP1_ASSUME_DT
IM_LSB) & MAC_PCU_SLP1_ASSUME_DTIM_MASK) |
| 1174 #define MAC_PCU_SLP1_CAB_TIMEOUT_MSB 15 |
| 1175 #define MAC_PCU_SLP1_CAB_TIMEOUT_LSB 0 |
| 1176 #define MAC_PCU_SLP1_CAB_TIMEOUT_MASK 0x0000ffff |
| 1177 #define MAC_PCU_SLP1_CAB_TIMEOUT_GET(x) (((x) & MAC_PCU_SLP1_CAB_TIMEOU
T_MASK) >> MAC_PCU_SLP1_CAB_TIMEOUT_LSB) |
| 1178 #define MAC_PCU_SLP1_CAB_TIMEOUT_SET(x) (((x) << MAC_PCU_SLP1_CAB_TIMEO
UT_LSB) & MAC_PCU_SLP1_CAB_TIMEOUT_MASK) |
| 1179 |
| 1180 #define MAC_PCU_SLP2_ADDRESS 0x00000208 |
| 1181 #define MAC_PCU_SLP2_OFFSET 0x00000208 |
| 1182 #define MAC_PCU_SLP2_BEACON_TIMEOUT_MSB 15 |
| 1183 #define MAC_PCU_SLP2_BEACON_TIMEOUT_LSB 0 |
| 1184 #define MAC_PCU_SLP2_BEACON_TIMEOUT_MASK 0x0000ffff |
| 1185 #define MAC_PCU_SLP2_BEACON_TIMEOUT_GET(x) (((x) & MAC_PCU_SLP2_BEACON_TIM
EOUT_MASK) >> MAC_PCU_SLP2_BEACON_TIMEOUT_LSB) |
| 1186 #define MAC_PCU_SLP2_BEACON_TIMEOUT_SET(x) (((x) << MAC_PCU_SLP2_BEACON_TI
MEOUT_LSB) & MAC_PCU_SLP2_BEACON_TIMEOUT_MASK) |
| 1187 |
| 1188 #define MAC_PCU_RESET_TSF_ADDRESS 0x0000020c |
| 1189 #define MAC_PCU_RESET_TSF_OFFSET 0x0000020c |
| 1190 #define MAC_PCU_RESET_TSF_ONE_SHOT2_MSB 25 |
| 1191 #define MAC_PCU_RESET_TSF_ONE_SHOT2_LSB 25 |
| 1192 #define MAC_PCU_RESET_TSF_ONE_SHOT2_MASK 0x02000000 |
| 1193 #define MAC_PCU_RESET_TSF_ONE_SHOT2_GET(x) (((x) & MAC_PCU_RESET_TSF_ONE_S
HOT2_MASK) >> MAC_PCU_RESET_TSF_ONE_SHOT2_LSB) |
| 1194 #define MAC_PCU_RESET_TSF_ONE_SHOT2_SET(x) (((x) << MAC_PCU_RESET_TSF_ONE_
SHOT2_LSB) & MAC_PCU_RESET_TSF_ONE_SHOT2_MASK) |
| 1195 #define MAC_PCU_RESET_TSF_ONE_SHOT_MSB 24 |
| 1196 #define MAC_PCU_RESET_TSF_ONE_SHOT_LSB 24 |
| 1197 #define MAC_PCU_RESET_TSF_ONE_SHOT_MASK 0x01000000 |
| 1198 #define MAC_PCU_RESET_TSF_ONE_SHOT_GET(x) (((x) & MAC_PCU_RESET_TSF_ONE_S
HOT_MASK) >> MAC_PCU_RESET_TSF_ONE_SHOT_LSB) |
| 1199 #define MAC_PCU_RESET_TSF_ONE_SHOT_SET(x) (((x) << MAC_PCU_RESET_TSF_ONE_
SHOT_LSB) & MAC_PCU_RESET_TSF_ONE_SHOT_MASK) |
| 1200 |
| 1201 #define MAC_PCU_TSF_ADD_PLL_ADDRESS 0x00000210 |
| 1202 #define MAC_PCU_TSF_ADD_PLL_OFFSET 0x00000210 |
| 1203 #define MAC_PCU_TSF_ADD_PLL_VALUE_MSB 7 |
| 1204 #define MAC_PCU_TSF_ADD_PLL_VALUE_LSB 0 |
| 1205 #define MAC_PCU_TSF_ADD_PLL_VALUE_MASK 0x000000ff |
| 1206 #define MAC_PCU_TSF_ADD_PLL_VALUE_GET(x) (((x) & MAC_PCU_TSF_ADD_PLL_VAL
UE_MASK) >> MAC_PCU_TSF_ADD_PLL_VALUE_LSB) |
| 1207 #define MAC_PCU_TSF_ADD_PLL_VALUE_SET(x) (((x) << MAC_PCU_TSF_ADD_PLL_VA
LUE_LSB) & MAC_PCU_TSF_ADD_PLL_VALUE_MASK) |
| 1208 |
| 1209 #define SLEEP_RETENTION_ADDRESS 0x00000214 |
| 1210 #define SLEEP_RETENTION_OFFSET 0x00000214 |
| 1211 #define SLEEP_RETENTION_TIME_MSB 9 |
| 1212 #define SLEEP_RETENTION_TIME_LSB 2 |
| 1213 #define SLEEP_RETENTION_TIME_MASK 0x000003fc |
| 1214 #define SLEEP_RETENTION_TIME_GET(x) (((x) & SLEEP_RETENTION_TIME_MA
SK) >> SLEEP_RETENTION_TIME_LSB) |
| 1215 #define SLEEP_RETENTION_TIME_SET(x) (((x) << SLEEP_RETENTION_TIME_L
SB) & SLEEP_RETENTION_TIME_MASK) |
| 1216 #define SLEEP_RETENTION_MODE_MSB 1 |
| 1217 #define SLEEP_RETENTION_MODE_LSB 1 |
| 1218 #define SLEEP_RETENTION_MODE_MASK 0x00000002 |
| 1219 #define SLEEP_RETENTION_MODE_GET(x) (((x) & SLEEP_RETENTION_MODE_MA
SK) >> SLEEP_RETENTION_MODE_LSB) |
| 1220 #define SLEEP_RETENTION_MODE_SET(x) (((x) << SLEEP_RETENTION_MODE_L
SB) & SLEEP_RETENTION_MODE_MASK) |
| 1221 #define SLEEP_RETENTION_ENABLE_MSB 0 |
| 1222 #define SLEEP_RETENTION_ENABLE_LSB 0 |
| 1223 #define SLEEP_RETENTION_ENABLE_MASK 0x00000001 |
| 1224 #define SLEEP_RETENTION_ENABLE_GET(x) (((x) & SLEEP_RETENTION_ENABLE_
MASK) >> SLEEP_RETENTION_ENABLE_LSB) |
| 1225 #define SLEEP_RETENTION_ENABLE_SET(x) (((x) << SLEEP_RETENTION_ENABLE
_LSB) & SLEEP_RETENTION_ENABLE_MASK) |
| 1226 |
| 1227 #define BTCOEXCTRL_ADDRESS 0x00000218 |
| 1228 #define BTCOEXCTRL_OFFSET 0x00000218 |
| 1229 #define BTCOEXCTRL_WBTIMER_ENABLE_MSB 26 |
| 1230 #define BTCOEXCTRL_WBTIMER_ENABLE_LSB 26 |
| 1231 #define BTCOEXCTRL_WBTIMER_ENABLE_MASK 0x04000000 |
| 1232 #define BTCOEXCTRL_WBTIMER_ENABLE_GET(x) (((x) & BTCOEXCTRL_WBTIMER_ENAB
LE_MASK) >> BTCOEXCTRL_WBTIMER_ENABLE_LSB) |
| 1233 #define BTCOEXCTRL_WBTIMER_ENABLE_SET(x) (((x) << BTCOEXCTRL_WBTIMER_ENA
BLE_LSB) & BTCOEXCTRL_WBTIMER_ENABLE_MASK) |
| 1234 #define BTCOEXCTRL_WBSYNC_ON_BEACON_MSB 25 |
| 1235 #define BTCOEXCTRL_WBSYNC_ON_BEACON_LSB 25 |
| 1236 #define BTCOEXCTRL_WBSYNC_ON_BEACON_MASK 0x02000000 |
| 1237 #define BTCOEXCTRL_WBSYNC_ON_BEACON_GET(x) (((x) & BTCOEXCTRL_WBSYNC_ON_BE
ACON_MASK) >> BTCOEXCTRL_WBSYNC_ON_BEACON_LSB) |
| 1238 #define BTCOEXCTRL_WBSYNC_ON_BEACON_SET(x) (((x) << BTCOEXCTRL_WBSYNC_ON_B
EACON_LSB) & BTCOEXCTRL_WBSYNC_ON_BEACON_MASK) |
| 1239 #define BTCOEXCTRL_PTA_MODE_MSB 24 |
| 1240 #define BTCOEXCTRL_PTA_MODE_LSB 23 |
| 1241 #define BTCOEXCTRL_PTA_MODE_MASK 0x01800000 |
| 1242 #define BTCOEXCTRL_PTA_MODE_GET(x) (((x) & BTCOEXCTRL_PTA_MODE_MAS
K) >> BTCOEXCTRL_PTA_MODE_LSB) |
| 1243 #define BTCOEXCTRL_PTA_MODE_SET(x) (((x) << BTCOEXCTRL_PTA_MODE_LS
B) & BTCOEXCTRL_PTA_MODE_MASK) |
| 1244 #define BTCOEXCTRL_FREQ_TIME_MSB 22 |
| 1245 #define BTCOEXCTRL_FREQ_TIME_LSB 18 |
| 1246 #define BTCOEXCTRL_FREQ_TIME_MASK 0x007c0000 |
| 1247 #define BTCOEXCTRL_FREQ_TIME_GET(x) (((x) & BTCOEXCTRL_FREQ_TIME_MA
SK) >> BTCOEXCTRL_FREQ_TIME_LSB) |
| 1248 #define BTCOEXCTRL_FREQ_TIME_SET(x) (((x) << BTCOEXCTRL_FREQ_TIME_L
SB) & BTCOEXCTRL_FREQ_TIME_MASK) |
| 1249 #define BTCOEXCTRL_PRIORITY_TIME_MSB 17 |
| 1250 #define BTCOEXCTRL_PRIORITY_TIME_LSB 12 |
| 1251 #define BTCOEXCTRL_PRIORITY_TIME_MASK 0x0003f000 |
| 1252 #define BTCOEXCTRL_PRIORITY_TIME_GET(x) (((x) & BTCOEXCTRL_PRIORITY_TIM
E_MASK) >> BTCOEXCTRL_PRIORITY_TIME_LSB) |
| 1253 #define BTCOEXCTRL_PRIORITY_TIME_SET(x) (((x) << BTCOEXCTRL_PRIORITY_TI
ME_LSB) & BTCOEXCTRL_PRIORITY_TIME_MASK) |
| 1254 #define BTCOEXCTRL_SYNC_DET_EN_MSB 11 |
| 1255 #define BTCOEXCTRL_SYNC_DET_EN_LSB 11 |
| 1256 #define BTCOEXCTRL_SYNC_DET_EN_MASK 0x00000800 |
| 1257 #define BTCOEXCTRL_SYNC_DET_EN_GET(x) (((x) & BTCOEXCTRL_SYNC_DET_EN_
MASK) >> BTCOEXCTRL_SYNC_DET_EN_LSB) |
| 1258 #define BTCOEXCTRL_SYNC_DET_EN_SET(x) (((x) << BTCOEXCTRL_SYNC_DET_EN
_LSB) & BTCOEXCTRL_SYNC_DET_EN_MASK) |
| 1259 #define BTCOEXCTRL_IDLE_CNT_EN_MSB 10 |
| 1260 #define BTCOEXCTRL_IDLE_CNT_EN_LSB 10 |
| 1261 #define BTCOEXCTRL_IDLE_CNT_EN_MASK 0x00000400 |
| 1262 #define BTCOEXCTRL_IDLE_CNT_EN_GET(x) (((x) & BTCOEXCTRL_IDLE_CNT_EN_
MASK) >> BTCOEXCTRL_IDLE_CNT_EN_LSB) |
| 1263 #define BTCOEXCTRL_IDLE_CNT_EN_SET(x) (((x) << BTCOEXCTRL_IDLE_CNT_EN
_LSB) & BTCOEXCTRL_IDLE_CNT_EN_MASK) |
| 1264 #define BTCOEXCTRL_FRAME_CNT_EN_MSB 9 |
| 1265 #define BTCOEXCTRL_FRAME_CNT_EN_LSB 9 |
| 1266 #define BTCOEXCTRL_FRAME_CNT_EN_MASK 0x00000200 |
| 1267 #define BTCOEXCTRL_FRAME_CNT_EN_GET(x) (((x) & BTCOEXCTRL_FRAME_CNT_EN
_MASK) >> BTCOEXCTRL_FRAME_CNT_EN_LSB) |
| 1268 #define BTCOEXCTRL_FRAME_CNT_EN_SET(x) (((x) << BTCOEXCTRL_FRAME_CNT_E
N_LSB) & BTCOEXCTRL_FRAME_CNT_EN_MASK) |
| 1269 #define BTCOEXCTRL_CLK_CNT_EN_MSB 8 |
| 1270 #define BTCOEXCTRL_CLK_CNT_EN_LSB 8 |
| 1271 #define BTCOEXCTRL_CLK_CNT_EN_MASK 0x00000100 |
| 1272 #define BTCOEXCTRL_CLK_CNT_EN_GET(x) (((x) & BTCOEXCTRL_CLK_CNT_EN_M
ASK) >> BTCOEXCTRL_CLK_CNT_EN_LSB) |
| 1273 #define BTCOEXCTRL_CLK_CNT_EN_SET(x) (((x) << BTCOEXCTRL_CLK_CNT_EN_
LSB) & BTCOEXCTRL_CLK_CNT_EN_MASK) |
| 1274 #define BTCOEXCTRL_GAP_MSB 7 |
| 1275 #define BTCOEXCTRL_GAP_LSB 0 |
| 1276 #define BTCOEXCTRL_GAP_MASK 0x000000ff |
| 1277 #define BTCOEXCTRL_GAP_GET(x) (((x) & BTCOEXCTRL_GAP_MASK) >>
BTCOEXCTRL_GAP_LSB) |
| 1278 #define BTCOEXCTRL_GAP_SET(x) (((x) << BTCOEXCTRL_GAP_LSB) &
BTCOEXCTRL_GAP_MASK) |
| 1279 |
| 1280 #define WBSYNC_PRIORITY1_ADDRESS 0x0000021c |
| 1281 #define WBSYNC_PRIORITY1_OFFSET 0x0000021c |
| 1282 #define WBSYNC_PRIORITY1_BITMAP_MSB 31 |
| 1283 #define WBSYNC_PRIORITY1_BITMAP_LSB 0 |
| 1284 #define WBSYNC_PRIORITY1_BITMAP_MASK 0xffffffff |
| 1285 #define WBSYNC_PRIORITY1_BITMAP_GET(x) (((x) & WBSYNC_PRIORITY1_BITMAP
_MASK) >> WBSYNC_PRIORITY1_BITMAP_LSB) |
| 1286 #define WBSYNC_PRIORITY1_BITMAP_SET(x) (((x) << WBSYNC_PRIORITY1_BITMA
P_LSB) & WBSYNC_PRIORITY1_BITMAP_MASK) |
| 1287 |
| 1288 #define WBSYNC_PRIORITY2_ADDRESS 0x00000220 |
| 1289 #define WBSYNC_PRIORITY2_OFFSET 0x00000220 |
| 1290 #define WBSYNC_PRIORITY2_BITMAP_MSB 31 |
| 1291 #define WBSYNC_PRIORITY2_BITMAP_LSB 0 |
| 1292 #define WBSYNC_PRIORITY2_BITMAP_MASK 0xffffffff |
| 1293 #define WBSYNC_PRIORITY2_BITMAP_GET(x) (((x) & WBSYNC_PRIORITY2_BITMAP
_MASK) >> WBSYNC_PRIORITY2_BITMAP_LSB) |
| 1294 #define WBSYNC_PRIORITY2_BITMAP_SET(x) (((x) << WBSYNC_PRIORITY2_BITMA
P_LSB) & WBSYNC_PRIORITY2_BITMAP_MASK) |
| 1295 |
| 1296 #define WBSYNC_PRIORITY3_ADDRESS 0x00000224 |
| 1297 #define WBSYNC_PRIORITY3_OFFSET 0x00000224 |
| 1298 #define WBSYNC_PRIORITY3_BITMAP_MSB 31 |
| 1299 #define WBSYNC_PRIORITY3_BITMAP_LSB 0 |
| 1300 #define WBSYNC_PRIORITY3_BITMAP_MASK 0xffffffff |
| 1301 #define WBSYNC_PRIORITY3_BITMAP_GET(x) (((x) & WBSYNC_PRIORITY3_BITMAP
_MASK) >> WBSYNC_PRIORITY3_BITMAP_LSB) |
| 1302 #define WBSYNC_PRIORITY3_BITMAP_SET(x) (((x) << WBSYNC_PRIORITY3_BITMA
P_LSB) & WBSYNC_PRIORITY3_BITMAP_MASK) |
| 1303 |
| 1304 #define BTCOEX0_ADDRESS 0x00000228 |
| 1305 #define BTCOEX0_OFFSET 0x00000228 |
| 1306 #define BTCOEX0_SYNC_DUR_MSB 7 |
| 1307 #define BTCOEX0_SYNC_DUR_LSB 0 |
| 1308 #define BTCOEX0_SYNC_DUR_MASK 0x000000ff |
| 1309 #define BTCOEX0_SYNC_DUR_GET(x) (((x) & BTCOEX0_SYNC_DUR_MASK)
>> BTCOEX0_SYNC_DUR_LSB) |
| 1310 #define BTCOEX0_SYNC_DUR_SET(x) (((x) << BTCOEX0_SYNC_DUR_LSB)
& BTCOEX0_SYNC_DUR_MASK) |
| 1311 |
| 1312 #define BTCOEX1_ADDRESS 0x0000022c |
| 1313 #define BTCOEX1_OFFSET 0x0000022c |
| 1314 #define BTCOEX1_CLK_THRES_MSB 20 |
| 1315 #define BTCOEX1_CLK_THRES_LSB 0 |
| 1316 #define BTCOEX1_CLK_THRES_MASK 0x001fffff |
| 1317 #define BTCOEX1_CLK_THRES_GET(x) (((x) & BTCOEX1_CLK_THRES_MASK)
>> BTCOEX1_CLK_THRES_LSB) |
| 1318 #define BTCOEX1_CLK_THRES_SET(x) (((x) << BTCOEX1_CLK_THRES_LSB)
& BTCOEX1_CLK_THRES_MASK) |
| 1319 |
| 1320 #define BTCOEX2_ADDRESS 0x00000230 |
| 1321 #define BTCOEX2_OFFSET 0x00000230 |
| 1322 #define BTCOEX2_FRAME_THRES_MSB 7 |
| 1323 #define BTCOEX2_FRAME_THRES_LSB 0 |
| 1324 #define BTCOEX2_FRAME_THRES_MASK 0x000000ff |
| 1325 #define BTCOEX2_FRAME_THRES_GET(x) (((x) & BTCOEX2_FRAME_THRES_MAS
K) >> BTCOEX2_FRAME_THRES_LSB) |
| 1326 #define BTCOEX2_FRAME_THRES_SET(x) (((x) << BTCOEX2_FRAME_THRES_LS
B) & BTCOEX2_FRAME_THRES_MASK) |
| 1327 |
| 1328 #define BTCOEX3_ADDRESS 0x00000234 |
| 1329 #define BTCOEX3_OFFSET 0x00000234 |
| 1330 #define BTCOEX3_CLK_CNT_MSB 20 |
| 1331 #define BTCOEX3_CLK_CNT_LSB 0 |
| 1332 #define BTCOEX3_CLK_CNT_MASK 0x001fffff |
| 1333 #define BTCOEX3_CLK_CNT_GET(x) (((x) & BTCOEX3_CLK_CNT_MASK) >
> BTCOEX3_CLK_CNT_LSB) |
| 1334 #define BTCOEX3_CLK_CNT_SET(x) (((x) << BTCOEX3_CLK_CNT_LSB) &
BTCOEX3_CLK_CNT_MASK) |
| 1335 |
| 1336 #define BTCOEX4_ADDRESS 0x00000238 |
| 1337 #define BTCOEX4_OFFSET 0x00000238 |
| 1338 #define BTCOEX4_FRAME_CNT_MSB 7 |
| 1339 #define BTCOEX4_FRAME_CNT_LSB 0 |
| 1340 #define BTCOEX4_FRAME_CNT_MASK 0x000000ff |
| 1341 #define BTCOEX4_FRAME_CNT_GET(x) (((x) & BTCOEX4_FRAME_CNT_MASK)
>> BTCOEX4_FRAME_CNT_LSB) |
| 1342 #define BTCOEX4_FRAME_CNT_SET(x) (((x) << BTCOEX4_FRAME_CNT_LSB)
& BTCOEX4_FRAME_CNT_MASK) |
| 1343 |
| 1344 #define BTCOEX5_ADDRESS 0x0000023c |
| 1345 #define BTCOEX5_OFFSET 0x0000023c |
| 1346 #define BTCOEX5_IDLE_CNT_MSB 15 |
| 1347 #define BTCOEX5_IDLE_CNT_LSB 0 |
| 1348 #define BTCOEX5_IDLE_CNT_MASK 0x0000ffff |
| 1349 #define BTCOEX5_IDLE_CNT_GET(x) (((x) & BTCOEX5_IDLE_CNT_MASK)
>> BTCOEX5_IDLE_CNT_LSB) |
| 1350 #define BTCOEX5_IDLE_CNT_SET(x) (((x) << BTCOEX5_IDLE_CNT_LSB)
& BTCOEX5_IDLE_CNT_MASK) |
| 1351 |
| 1352 #define BTCOEX6_ADDRESS 0x00000240 |
| 1353 #define BTCOEX6_OFFSET 0x00000240 |
| 1354 #define BTCOEX6_IDLE_RESET_LVL_BITMAP_MSB 31 |
| 1355 #define BTCOEX6_IDLE_RESET_LVL_BITMAP_LSB 0 |
| 1356 #define BTCOEX6_IDLE_RESET_LVL_BITMAP_MASK 0xffffffff |
| 1357 #define BTCOEX6_IDLE_RESET_LVL_BITMAP_GET(x) (((x) & BTCOEX6_IDLE_RESET_LVL_
BITMAP_MASK) >> BTCOEX6_IDLE_RESET_LVL_BITMAP_LSB) |
| 1358 #define BTCOEX6_IDLE_RESET_LVL_BITMAP_SET(x) (((x) << BTCOEX6_IDLE_RESET_LVL
_BITMAP_LSB) & BTCOEX6_IDLE_RESET_LVL_BITMAP_MASK) |
| 1359 |
| 1360 #define LOCK_ADDRESS 0x00000244 |
| 1361 #define LOCK_OFFSET 0x00000244 |
| 1362 #define LOCK_TLOCK_SLAVE_MSB 31 |
| 1363 #define LOCK_TLOCK_SLAVE_LSB 24 |
| 1364 #define LOCK_TLOCK_SLAVE_MASK 0xff000000 |
| 1365 #define LOCK_TLOCK_SLAVE_GET(x) (((x) & LOCK_TLOCK_SLAVE_MASK)
>> LOCK_TLOCK_SLAVE_LSB) |
| 1366 #define LOCK_TLOCK_SLAVE_SET(x) (((x) << LOCK_TLOCK_SLAVE_LSB)
& LOCK_TLOCK_SLAVE_MASK) |
| 1367 #define LOCK_TUNLOCK_SLAVE_MSB 23 |
| 1368 #define LOCK_TUNLOCK_SLAVE_LSB 16 |
| 1369 #define LOCK_TUNLOCK_SLAVE_MASK 0x00ff0000 |
| 1370 #define LOCK_TUNLOCK_SLAVE_GET(x) (((x) & LOCK_TUNLOCK_SLAVE_MASK
) >> LOCK_TUNLOCK_SLAVE_LSB) |
| 1371 #define LOCK_TUNLOCK_SLAVE_SET(x) (((x) << LOCK_TUNLOCK_SLAVE_LSB
) & LOCK_TUNLOCK_SLAVE_MASK) |
| 1372 #define LOCK_TLOCK_MASTER_MSB 15 |
| 1373 #define LOCK_TLOCK_MASTER_LSB 8 |
| 1374 #define LOCK_TLOCK_MASTER_MASK 0x0000ff00 |
| 1375 #define LOCK_TLOCK_MASTER_GET(x) (((x) & LOCK_TLOCK_MASTER_MASK)
>> LOCK_TLOCK_MASTER_LSB) |
| 1376 #define LOCK_TLOCK_MASTER_SET(x) (((x) << LOCK_TLOCK_MASTER_LSB)
& LOCK_TLOCK_MASTER_MASK) |
| 1377 #define LOCK_TUNLOCK_MASTER_MSB 7 |
| 1378 #define LOCK_TUNLOCK_MASTER_LSB 0 |
| 1379 #define LOCK_TUNLOCK_MASTER_MASK 0x000000ff |
| 1380 #define LOCK_TUNLOCK_MASTER_GET(x) (((x) & LOCK_TUNLOCK_MASTER_MAS
K) >> LOCK_TUNLOCK_MASTER_LSB) |
| 1381 #define LOCK_TUNLOCK_MASTER_SET(x) (((x) << LOCK_TUNLOCK_MASTER_LS
B) & LOCK_TUNLOCK_MASTER_MASK) |
| 1382 |
| 1383 #define NOLOCK_PRIORITY_ADDRESS 0x00000248 |
| 1384 #define NOLOCK_PRIORITY_OFFSET 0x00000248 |
| 1385 #define NOLOCK_PRIORITY_BITMAP_MSB 31 |
| 1386 #define NOLOCK_PRIORITY_BITMAP_LSB 0 |
| 1387 #define NOLOCK_PRIORITY_BITMAP_MASK 0xffffffff |
| 1388 #define NOLOCK_PRIORITY_BITMAP_GET(x) (((x) & NOLOCK_PRIORITY_BITMAP_
MASK) >> NOLOCK_PRIORITY_BITMAP_LSB) |
| 1389 #define NOLOCK_PRIORITY_BITMAP_SET(x) (((x) << NOLOCK_PRIORITY_BITMAP
_LSB) & NOLOCK_PRIORITY_BITMAP_MASK) |
| 1390 |
| 1391 #define WBSYNC_ADDRESS 0x0000024c |
| 1392 #define WBSYNC_OFFSET 0x0000024c |
| 1393 #define WBSYNC_BTCLOCK_MSB 31 |
| 1394 #define WBSYNC_BTCLOCK_LSB 0 |
| 1395 #define WBSYNC_BTCLOCK_MASK 0xffffffff |
| 1396 #define WBSYNC_BTCLOCK_GET(x) (((x) & WBSYNC_BTCLOCK_MASK) >>
WBSYNC_BTCLOCK_LSB) |
| 1397 #define WBSYNC_BTCLOCK_SET(x) (((x) << WBSYNC_BTCLOCK_LSB) &
WBSYNC_BTCLOCK_MASK) |
| 1398 |
| 1399 #define WBSYNC1_ADDRESS 0x00000250 |
| 1400 #define WBSYNC1_OFFSET 0x00000250 |
| 1401 #define WBSYNC1_BTCLOCK_MSB 31 |
| 1402 #define WBSYNC1_BTCLOCK_LSB 0 |
| 1403 #define WBSYNC1_BTCLOCK_MASK 0xffffffff |
| 1404 #define WBSYNC1_BTCLOCK_GET(x) (((x) & WBSYNC1_BTCLOCK_MASK) >
> WBSYNC1_BTCLOCK_LSB) |
| 1405 #define WBSYNC1_BTCLOCK_SET(x) (((x) << WBSYNC1_BTCLOCK_LSB) &
WBSYNC1_BTCLOCK_MASK) |
| 1406 |
| 1407 #define WBSYNC2_ADDRESS 0x00000254 |
| 1408 #define WBSYNC2_OFFSET 0x00000254 |
| 1409 #define WBSYNC2_BTCLOCK_MSB 31 |
| 1410 #define WBSYNC2_BTCLOCK_LSB 0 |
| 1411 #define WBSYNC2_BTCLOCK_MASK 0xffffffff |
| 1412 #define WBSYNC2_BTCLOCK_GET(x) (((x) & WBSYNC2_BTCLOCK_MASK) >
> WBSYNC2_BTCLOCK_LSB) |
| 1413 #define WBSYNC2_BTCLOCK_SET(x) (((x) << WBSYNC2_BTCLOCK_LSB) &
WBSYNC2_BTCLOCK_MASK) |
| 1414 |
| 1415 #define WBSYNC3_ADDRESS 0x00000258 |
| 1416 #define WBSYNC3_OFFSET 0x00000258 |
| 1417 #define WBSYNC3_BTCLOCK_MSB 31 |
| 1418 #define WBSYNC3_BTCLOCK_LSB 0 |
| 1419 #define WBSYNC3_BTCLOCK_MASK 0xffffffff |
| 1420 #define WBSYNC3_BTCLOCK_GET(x) (((x) & WBSYNC3_BTCLOCK_MASK) >
> WBSYNC3_BTCLOCK_LSB) |
| 1421 #define WBSYNC3_BTCLOCK_SET(x) (((x) << WBSYNC3_BTCLOCK_LSB) &
WBSYNC3_BTCLOCK_MASK) |
| 1422 |
| 1423 #define WB_TIMER_TARGET_ADDRESS 0x0000025c |
| 1424 #define WB_TIMER_TARGET_OFFSET 0x0000025c |
| 1425 #define WB_TIMER_TARGET_VALUE_MSB 31 |
| 1426 #define WB_TIMER_TARGET_VALUE_LSB 0 |
| 1427 #define WB_TIMER_TARGET_VALUE_MASK 0xffffffff |
| 1428 #define WB_TIMER_TARGET_VALUE_GET(x) (((x) & WB_TIMER_TARGET_VALUE_M
ASK) >> WB_TIMER_TARGET_VALUE_LSB) |
| 1429 #define WB_TIMER_TARGET_VALUE_SET(x) (((x) << WB_TIMER_TARGET_VALUE_
LSB) & WB_TIMER_TARGET_VALUE_MASK) |
| 1430 |
| 1431 #define WB_TIMER_SLOP_ADDRESS 0x00000260 |
| 1432 #define WB_TIMER_SLOP_OFFSET 0x00000260 |
| 1433 #define WB_TIMER_SLOP_VALUE_MSB 9 |
| 1434 #define WB_TIMER_SLOP_VALUE_LSB 0 |
| 1435 #define WB_TIMER_SLOP_VALUE_MASK 0x000003ff |
| 1436 #define WB_TIMER_SLOP_VALUE_GET(x) (((x) & WB_TIMER_SLOP_VALUE_MAS
K) >> WB_TIMER_SLOP_VALUE_LSB) |
| 1437 #define WB_TIMER_SLOP_VALUE_SET(x) (((x) << WB_TIMER_SLOP_VALUE_LS
B) & WB_TIMER_SLOP_VALUE_MASK) |
| 1438 |
| 1439 #define BTCOEX_INT_EN_ADDRESS 0x00000264 |
| 1440 #define BTCOEX_INT_EN_OFFSET 0x00000264 |
| 1441 #define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MSB 11 |
| 1442 #define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_LSB 11 |
| 1443 #define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MASK 0x00000800 |
| 1444 #define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_GET(x) (((x) & BTCOEX_INT_EN_I2C_RECV_
OVERFLOW_MASK) >> BTCOEX_INT_EN_I2C_RECV_OVERFLOW_LSB) |
| 1445 #define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_SET(x) (((x) << BTCOEX_INT_EN_I2C_RECV
_OVERFLOW_LSB) & BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MASK) |
| 1446 #define BTCOEX_INT_EN_I2C_TX_FAILED_MSB 10 |
| 1447 #define BTCOEX_INT_EN_I2C_TX_FAILED_LSB 10 |
| 1448 #define BTCOEX_INT_EN_I2C_TX_FAILED_MASK 0x00000400 |
| 1449 #define BTCOEX_INT_EN_I2C_TX_FAILED_GET(x) (((x) & BTCOEX_INT_EN_I2C_TX_FA
ILED_MASK) >> BTCOEX_INT_EN_I2C_TX_FAILED_LSB) |
| 1450 #define BTCOEX_INT_EN_I2C_TX_FAILED_SET(x) (((x) << BTCOEX_INT_EN_I2C_TX_F
AILED_LSB) & BTCOEX_INT_EN_I2C_TX_FAILED_MASK) |
| 1451 #define BTCOEX_INT_EN_I2C_MESG_SENT_MSB 9 |
| 1452 #define BTCOEX_INT_EN_I2C_MESG_SENT_LSB 9 |
| 1453 #define BTCOEX_INT_EN_I2C_MESG_SENT_MASK 0x00000200 |
| 1454 #define BTCOEX_INT_EN_I2C_MESG_SENT_GET(x) (((x) & BTCOEX_INT_EN_I2C_MESG_
SENT_MASK) >> BTCOEX_INT_EN_I2C_MESG_SENT_LSB) |
| 1455 #define BTCOEX_INT_EN_I2C_MESG_SENT_SET(x) (((x) << BTCOEX_INT_EN_I2C_MESG
_SENT_LSB) & BTCOEX_INT_EN_I2C_MESG_SENT_MASK) |
| 1456 #define BTCOEX_INT_EN_ST_MESG_RECV_MSB 8 |
| 1457 #define BTCOEX_INT_EN_ST_MESG_RECV_LSB 8 |
| 1458 #define BTCOEX_INT_EN_ST_MESG_RECV_MASK 0x00000100 |
| 1459 #define BTCOEX_INT_EN_ST_MESG_RECV_GET(x) (((x) & BTCOEX_INT_EN_ST_MESG_R
ECV_MASK) >> BTCOEX_INT_EN_ST_MESG_RECV_LSB) |
| 1460 #define BTCOEX_INT_EN_ST_MESG_RECV_SET(x) (((x) << BTCOEX_INT_EN_ST_MESG_
RECV_LSB) & BTCOEX_INT_EN_ST_MESG_RECV_MASK) |
| 1461 #define BTCOEX_INT_EN_WB_TIMER_MSB 7 |
| 1462 #define BTCOEX_INT_EN_WB_TIMER_LSB 7 |
| 1463 #define BTCOEX_INT_EN_WB_TIMER_MASK 0x00000080 |
| 1464 #define BTCOEX_INT_EN_WB_TIMER_GET(x) (((x) & BTCOEX_INT_EN_WB_TIMER_
MASK) >> BTCOEX_INT_EN_WB_TIMER_LSB) |
| 1465 #define BTCOEX_INT_EN_WB_TIMER_SET(x) (((x) << BTCOEX_INT_EN_WB_TIMER
_LSB) & BTCOEX_INT_EN_WB_TIMER_MASK) |
| 1466 #define BTCOEX_INT_EN_NOSYNC_MSB 4 |
| 1467 #define BTCOEX_INT_EN_NOSYNC_LSB 4 |
| 1468 #define BTCOEX_INT_EN_NOSYNC_MASK 0x00000010 |
| 1469 #define BTCOEX_INT_EN_NOSYNC_GET(x) (((x) & BTCOEX_INT_EN_NOSYNC_MA
SK) >> BTCOEX_INT_EN_NOSYNC_LSB) |
| 1470 #define BTCOEX_INT_EN_NOSYNC_SET(x) (((x) << BTCOEX_INT_EN_NOSYNC_L
SB) & BTCOEX_INT_EN_NOSYNC_MASK) |
| 1471 #define BTCOEX_INT_EN_SYNC_MSB 3 |
| 1472 #define BTCOEX_INT_EN_SYNC_LSB 3 |
| 1473 #define BTCOEX_INT_EN_SYNC_MASK 0x00000008 |
| 1474 #define BTCOEX_INT_EN_SYNC_GET(x) (((x) & BTCOEX_INT_EN_SYNC_MASK
) >> BTCOEX_INT_EN_SYNC_LSB) |
| 1475 #define BTCOEX_INT_EN_SYNC_SET(x) (((x) << BTCOEX_INT_EN_SYNC_LSB
) & BTCOEX_INT_EN_SYNC_MASK) |
| 1476 #define BTCOEX_INT_EN_END_MSB 2 |
| 1477 #define BTCOEX_INT_EN_END_LSB 2 |
| 1478 #define BTCOEX_INT_EN_END_MASK 0x00000004 |
| 1479 #define BTCOEX_INT_EN_END_GET(x) (((x) & BTCOEX_INT_EN_END_MASK)
>> BTCOEX_INT_EN_END_LSB) |
| 1480 #define BTCOEX_INT_EN_END_SET(x) (((x) << BTCOEX_INT_EN_END_LSB)
& BTCOEX_INT_EN_END_MASK) |
| 1481 #define BTCOEX_INT_EN_FRAME_CNT_MSB 1 |
| 1482 #define BTCOEX_INT_EN_FRAME_CNT_LSB 1 |
| 1483 #define BTCOEX_INT_EN_FRAME_CNT_MASK 0x00000002 |
| 1484 #define BTCOEX_INT_EN_FRAME_CNT_GET(x) (((x) & BTCOEX_INT_EN_FRAME_CNT
_MASK) >> BTCOEX_INT_EN_FRAME_CNT_LSB) |
| 1485 #define BTCOEX_INT_EN_FRAME_CNT_SET(x) (((x) << BTCOEX_INT_EN_FRAME_CN
T_LSB) & BTCOEX_INT_EN_FRAME_CNT_MASK) |
| 1486 #define BTCOEX_INT_EN_CLK_CNT_MSB 0 |
| 1487 #define BTCOEX_INT_EN_CLK_CNT_LSB 0 |
| 1488 #define BTCOEX_INT_EN_CLK_CNT_MASK 0x00000001 |
| 1489 #define BTCOEX_INT_EN_CLK_CNT_GET(x) (((x) & BTCOEX_INT_EN_CLK_CNT_M
ASK) >> BTCOEX_INT_EN_CLK_CNT_LSB) |
| 1490 #define BTCOEX_INT_EN_CLK_CNT_SET(x) (((x) << BTCOEX_INT_EN_CLK_CNT_
LSB) & BTCOEX_INT_EN_CLK_CNT_MASK) |
| 1491 |
| 1492 #define BTCOEX_INT_STAT_ADDRESS 0x00000268 |
| 1493 #define BTCOEX_INT_STAT_OFFSET 0x00000268 |
| 1494 #define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MSB 11 |
| 1495 #define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_LSB 11 |
| 1496 #define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MASK 0x00000800 |
| 1497 #define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_GET(x) (((x) & BTCOEX_INT_STAT_I2C_REC
V_OVERFLOW_MASK) >> BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_LSB) |
| 1498 #define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_SET(x) (((x) << BTCOEX_INT_STAT_I2C_RE
CV_OVERFLOW_LSB) & BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MASK) |
| 1499 #define BTCOEX_INT_STAT_I2C_TX_FAILED_MSB 10 |
| 1500 #define BTCOEX_INT_STAT_I2C_TX_FAILED_LSB 10 |
| 1501 #define BTCOEX_INT_STAT_I2C_TX_FAILED_MASK 0x00000400 |
| 1502 #define BTCOEX_INT_STAT_I2C_TX_FAILED_GET(x) (((x) & BTCOEX_INT_STAT_I2C_TX_
FAILED_MASK) >> BTCOEX_INT_STAT_I2C_TX_FAILED_LSB) |
| 1503 #define BTCOEX_INT_STAT_I2C_TX_FAILED_SET(x) (((x) << BTCOEX_INT_STAT_I2C_TX
_FAILED_LSB) & BTCOEX_INT_STAT_I2C_TX_FAILED_MASK) |
| 1504 #define BTCOEX_INT_STAT_I2C_MESG_SENT_MSB 9 |
| 1505 #define BTCOEX_INT_STAT_I2C_MESG_SENT_LSB 9 |
| 1506 #define BTCOEX_INT_STAT_I2C_MESG_SENT_MASK 0x00000200 |
| 1507 #define BTCOEX_INT_STAT_I2C_MESG_SENT_GET(x) (((x) & BTCOEX_INT_STAT_I2C_MES
G_SENT_MASK) >> BTCOEX_INT_STAT_I2C_MESG_SENT_LSB) |
| 1508 #define BTCOEX_INT_STAT_I2C_MESG_SENT_SET(x) (((x) << BTCOEX_INT_STAT_I2C_ME
SG_SENT_LSB) & BTCOEX_INT_STAT_I2C_MESG_SENT_MASK) |
| 1509 #define BTCOEX_INT_STAT_I2C_MESG_RECV_MSB 8 |
| 1510 #define BTCOEX_INT_STAT_I2C_MESG_RECV_LSB 8 |
| 1511 #define BTCOEX_INT_STAT_I2C_MESG_RECV_MASK 0x00000100 |
| 1512 #define BTCOEX_INT_STAT_I2C_MESG_RECV_GET(x) (((x) & BTCOEX_INT_STAT_I2C_MES
G_RECV_MASK) >> BTCOEX_INT_STAT_I2C_MESG_RECV_LSB) |
| 1513 #define BTCOEX_INT_STAT_I2C_MESG_RECV_SET(x) (((x) << BTCOEX_INT_STAT_I2C_ME
SG_RECV_LSB) & BTCOEX_INT_STAT_I2C_MESG_RECV_MASK) |
| 1514 #define BTCOEX_INT_STAT_WB_TIMER_MSB 7 |
| 1515 #define BTCOEX_INT_STAT_WB_TIMER_LSB 7 |
| 1516 #define BTCOEX_INT_STAT_WB_TIMER_MASK 0x00000080 |
| 1517 #define BTCOEX_INT_STAT_WB_TIMER_GET(x) (((x) & BTCOEX_INT_STAT_WB_TIME
R_MASK) >> BTCOEX_INT_STAT_WB_TIMER_LSB) |
| 1518 #define BTCOEX_INT_STAT_WB_TIMER_SET(x) (((x) << BTCOEX_INT_STAT_WB_TIM
ER_LSB) & BTCOEX_INT_STAT_WB_TIMER_MASK) |
| 1519 #define BTCOEX_INT_STAT_BTPRIORITY_STOMP_MSB 6 |
| 1520 #define BTCOEX_INT_STAT_BTPRIORITY_STOMP_LSB 6 |
| 1521 #define BTCOEX_INT_STAT_BTPRIORITY_STOMP_MASK 0x00000040 |
| 1522 #define BTCOEX_INT_STAT_BTPRIORITY_STOMP_GET(x) (((x) & BTCOEX_INT_STAT_BTPRIOR
ITY_STOMP_MASK) >> BTCOEX_INT_STAT_BTPRIORITY_STOMP_LSB) |
| 1523 #define BTCOEX_INT_STAT_BTPRIORITY_STOMP_SET(x) (((x) << BTCOEX_INT_STAT_BTPRIO
RITY_STOMP_LSB) & BTCOEX_INT_STAT_BTPRIORITY_STOMP_MASK) |
| 1524 #define BTCOEX_INT_STAT_BTPRIORITY_MSB 5 |
| 1525 #define BTCOEX_INT_STAT_BTPRIORITY_LSB 5 |
| 1526 #define BTCOEX_INT_STAT_BTPRIORITY_MASK 0x00000020 |
| 1527 #define BTCOEX_INT_STAT_BTPRIORITY_GET(x) (((x) & BTCOEX_INT_STAT_BTPRIOR
ITY_MASK) >> BTCOEX_INT_STAT_BTPRIORITY_LSB) |
| 1528 #define BTCOEX_INT_STAT_BTPRIORITY_SET(x) (((x) << BTCOEX_INT_STAT_BTPRIO
RITY_LSB) & BTCOEX_INT_STAT_BTPRIORITY_MASK) |
| 1529 #define BTCOEX_INT_STAT_NOSYNC_MSB 4 |
| 1530 #define BTCOEX_INT_STAT_NOSYNC_LSB 4 |
| 1531 #define BTCOEX_INT_STAT_NOSYNC_MASK 0x00000010 |
| 1532 #define BTCOEX_INT_STAT_NOSYNC_GET(x) (((x) & BTCOEX_INT_STAT_NOSYNC_
MASK) >> BTCOEX_INT_STAT_NOSYNC_LSB) |
| 1533 #define BTCOEX_INT_STAT_NOSYNC_SET(x) (((x) << BTCOEX_INT_STAT_NOSYNC
_LSB) & BTCOEX_INT_STAT_NOSYNC_MASK) |
| 1534 #define BTCOEX_INT_STAT_SYNC_MSB 3 |
| 1535 #define BTCOEX_INT_STAT_SYNC_LSB 3 |
| 1536 #define BTCOEX_INT_STAT_SYNC_MASK 0x00000008 |
| 1537 #define BTCOEX_INT_STAT_SYNC_GET(x) (((x) & BTCOEX_INT_STAT_SYNC_MA
SK) >> BTCOEX_INT_STAT_SYNC_LSB) |
| 1538 #define BTCOEX_INT_STAT_SYNC_SET(x) (((x) << BTCOEX_INT_STAT_SYNC_L
SB) & BTCOEX_INT_STAT_SYNC_MASK) |
| 1539 #define BTCOEX_INT_STAT_END_MSB 2 |
| 1540 #define BTCOEX_INT_STAT_END_LSB 2 |
| 1541 #define BTCOEX_INT_STAT_END_MASK 0x00000004 |
| 1542 #define BTCOEX_INT_STAT_END_GET(x) (((x) & BTCOEX_INT_STAT_END_MAS
K) >> BTCOEX_INT_STAT_END_LSB) |
| 1543 #define BTCOEX_INT_STAT_END_SET(x) (((x) << BTCOEX_INT_STAT_END_LS
B) & BTCOEX_INT_STAT_END_MASK) |
| 1544 #define BTCOEX_INT_STAT_FRAME_CNT_MSB 1 |
| 1545 #define BTCOEX_INT_STAT_FRAME_CNT_LSB 1 |
| 1546 #define BTCOEX_INT_STAT_FRAME_CNT_MASK 0x00000002 |
| 1547 #define BTCOEX_INT_STAT_FRAME_CNT_GET(x) (((x) & BTCOEX_INT_STAT_FRAME_C
NT_MASK) >> BTCOEX_INT_STAT_FRAME_CNT_LSB) |
| 1548 #define BTCOEX_INT_STAT_FRAME_CNT_SET(x) (((x) << BTCOEX_INT_STAT_FRAME_
CNT_LSB) & BTCOEX_INT_STAT_FRAME_CNT_MASK) |
| 1549 #define BTCOEX_INT_STAT_CLK_CNT_MSB 0 |
| 1550 #define BTCOEX_INT_STAT_CLK_CNT_LSB 0 |
| 1551 #define BTCOEX_INT_STAT_CLK_CNT_MASK 0x00000001 |
| 1552 #define BTCOEX_INT_STAT_CLK_CNT_GET(x) (((x) & BTCOEX_INT_STAT_CLK_CNT
_MASK) >> BTCOEX_INT_STAT_CLK_CNT_LSB) |
| 1553 #define BTCOEX_INT_STAT_CLK_CNT_SET(x) (((x) << BTCOEX_INT_STAT_CLK_CN
T_LSB) & BTCOEX_INT_STAT_CLK_CNT_MASK) |
| 1554 |
| 1555 #define BTPRIORITY_INT_EN_ADDRESS 0x0000026c |
| 1556 #define BTPRIORITY_INT_EN_OFFSET 0x0000026c |
| 1557 #define BTPRIORITY_INT_EN_BITMAP_MSB 31 |
| 1558 #define BTPRIORITY_INT_EN_BITMAP_LSB 0 |
| 1559 #define BTPRIORITY_INT_EN_BITMAP_MASK 0xffffffff |
| 1560 #define BTPRIORITY_INT_EN_BITMAP_GET(x) (((x) & BTPRIORITY_INT_EN_BITMA
P_MASK) >> BTPRIORITY_INT_EN_BITMAP_LSB) |
| 1561 #define BTPRIORITY_INT_EN_BITMAP_SET(x) (((x) << BTPRIORITY_INT_EN_BITM
AP_LSB) & BTPRIORITY_INT_EN_BITMAP_MASK) |
| 1562 |
| 1563 #define BTPRIORITY_INT_STAT_ADDRESS 0x00000270 |
| 1564 #define BTPRIORITY_INT_STAT_OFFSET 0x00000270 |
| 1565 #define BTPRIORITY_INT_STAT_BITMAP_MSB 31 |
| 1566 #define BTPRIORITY_INT_STAT_BITMAP_LSB 0 |
| 1567 #define BTPRIORITY_INT_STAT_BITMAP_MASK 0xffffffff |
| 1568 #define BTPRIORITY_INT_STAT_BITMAP_GET(x) (((x) & BTPRIORITY_INT_STAT_BIT
MAP_MASK) >> BTPRIORITY_INT_STAT_BITMAP_LSB) |
| 1569 #define BTPRIORITY_INT_STAT_BITMAP_SET(x) (((x) << BTPRIORITY_INT_STAT_BI
TMAP_LSB) & BTPRIORITY_INT_STAT_BITMAP_MASK) |
| 1570 |
| 1571 #define BTPRIORITY_STOMP_INT_EN_ADDRESS 0x00000274 |
| 1572 #define BTPRIORITY_STOMP_INT_EN_OFFSET 0x00000274 |
| 1573 #define BTPRIORITY_STOMP_INT_EN_BITMAP_MSB 31 |
| 1574 #define BTPRIORITY_STOMP_INT_EN_BITMAP_LSB 0 |
| 1575 #define BTPRIORITY_STOMP_INT_EN_BITMAP_MASK 0xffffffff |
| 1576 #define BTPRIORITY_STOMP_INT_EN_BITMAP_GET(x) (((x) & BTPRIORITY_STOMP_INT_EN
_BITMAP_MASK) >> BTPRIORITY_STOMP_INT_EN_BITMAP_LSB) |
| 1577 #define BTPRIORITY_STOMP_INT_EN_BITMAP_SET(x) (((x) << BTPRIORITY_STOMP_INT_E
N_BITMAP_LSB) & BTPRIORITY_STOMP_INT_EN_BITMAP_MASK) |
| 1578 |
| 1579 #define BTPRIORITY_STOMP_INT_STAT_ADDRESS 0x00000278 |
| 1580 #define BTPRIORITY_STOMP_INT_STAT_OFFSET 0x00000278 |
| 1581 #define BTPRIORITY_STOMP_INT_STAT_BITMAP_MSB 31 |
| 1582 #define BTPRIORITY_STOMP_INT_STAT_BITMAP_LSB 0 |
| 1583 #define BTPRIORITY_STOMP_INT_STAT_BITMAP_MASK 0xffffffff |
| 1584 #define BTPRIORITY_STOMP_INT_STAT_BITMAP_GET(x) (((x) & BTPRIORITY_STOMP_INT_ST
AT_BITMAP_MASK) >> BTPRIORITY_STOMP_INT_STAT_BITMAP_LSB) |
| 1585 #define BTPRIORITY_STOMP_INT_STAT_BITMAP_SET(x) (((x) << BTPRIORITY_STOMP_INT_S
TAT_BITMAP_LSB) & BTPRIORITY_STOMP_INT_STAT_BITMAP_MASK) |
| 1586 |
| 1587 #define MAC_PCU_BMISS_TIMEOUT_ADDRESS 0x0000027c |
| 1588 #define MAC_PCU_BMISS_TIMEOUT_OFFSET 0x0000027c |
| 1589 #define MAC_PCU_BMISS_TIMEOUT_ENABLE_MSB 24 |
| 1590 #define MAC_PCU_BMISS_TIMEOUT_ENABLE_LSB 24 |
| 1591 #define MAC_PCU_BMISS_TIMEOUT_ENABLE_MASK 0x01000000 |
| 1592 #define MAC_PCU_BMISS_TIMEOUT_ENABLE_GET(x) (((x) & MAC_PCU_BMISS_TIMEOUT_E
NABLE_MASK) >> MAC_PCU_BMISS_TIMEOUT_ENABLE_LSB) |
| 1593 #define MAC_PCU_BMISS_TIMEOUT_ENABLE_SET(x) (((x) << MAC_PCU_BMISS_TIMEOUT_
ENABLE_LSB) & MAC_PCU_BMISS_TIMEOUT_ENABLE_MASK) |
| 1594 #define MAC_PCU_BMISS_TIMEOUT_VALUE_MSB 23 |
| 1595 #define MAC_PCU_BMISS_TIMEOUT_VALUE_LSB 0 |
| 1596 #define MAC_PCU_BMISS_TIMEOUT_VALUE_MASK 0x00ffffff |
| 1597 #define MAC_PCU_BMISS_TIMEOUT_VALUE_GET(x) (((x) & MAC_PCU_BMISS_TIMEOUT_V
ALUE_MASK) >> MAC_PCU_BMISS_TIMEOUT_VALUE_LSB) |
| 1598 #define MAC_PCU_BMISS_TIMEOUT_VALUE_SET(x) (((x) << MAC_PCU_BMISS_TIMEOUT_
VALUE_LSB) & MAC_PCU_BMISS_TIMEOUT_VALUE_MASK) |
| 1599 |
| 1600 #define MAC_PCU_CAB_AWAKE_ADDRESS 0x00000280 |
| 1601 #define MAC_PCU_CAB_AWAKE_OFFSET 0x00000280 |
| 1602 #define MAC_PCU_CAB_AWAKE_ENABLE_MSB 16 |
| 1603 #define MAC_PCU_CAB_AWAKE_ENABLE_LSB 16 |
| 1604 #define MAC_PCU_CAB_AWAKE_ENABLE_MASK 0x00010000 |
| 1605 #define MAC_PCU_CAB_AWAKE_ENABLE_GET(x) (((x) & MAC_PCU_CAB_AWAKE_ENABL
E_MASK) >> MAC_PCU_CAB_AWAKE_ENABLE_LSB) |
| 1606 #define MAC_PCU_CAB_AWAKE_ENABLE_SET(x) (((x) << MAC_PCU_CAB_AWAKE_ENAB
LE_LSB) & MAC_PCU_CAB_AWAKE_ENABLE_MASK) |
| 1607 #define MAC_PCU_CAB_AWAKE_DURATION_MSB 15 |
| 1608 #define MAC_PCU_CAB_AWAKE_DURATION_LSB 0 |
| 1609 #define MAC_PCU_CAB_AWAKE_DURATION_MASK 0x0000ffff |
| 1610 #define MAC_PCU_CAB_AWAKE_DURATION_GET(x) (((x) & MAC_PCU_CAB_AWAKE_DURAT
ION_MASK) >> MAC_PCU_CAB_AWAKE_DURATION_LSB) |
| 1611 #define MAC_PCU_CAB_AWAKE_DURATION_SET(x) (((x) << MAC_PCU_CAB_AWAKE_DURA
TION_LSB) & MAC_PCU_CAB_AWAKE_DURATION_MASK) |
| 1612 |
| 1613 #define LP_PERF_COUNTER_ADDRESS 0x00000284 |
| 1614 #define LP_PERF_COUNTER_OFFSET 0x00000284 |
| 1615 #define LP_PERF_COUNTER_EN_MSB 0 |
| 1616 #define LP_PERF_COUNTER_EN_LSB 0 |
| 1617 #define LP_PERF_COUNTER_EN_MASK 0x00000001 |
| 1618 #define LP_PERF_COUNTER_EN_GET(x) (((x) & LP_PERF_COUNTER_EN_MASK
) >> LP_PERF_COUNTER_EN_LSB) |
| 1619 #define LP_PERF_COUNTER_EN_SET(x) (((x) << LP_PERF_COUNTER_EN_LSB
) & LP_PERF_COUNTER_EN_MASK) |
| 1620 |
| 1621 #define LP_PERF_LIGHT_SLEEP_ADDRESS 0x00000288 |
| 1622 #define LP_PERF_LIGHT_SLEEP_OFFSET 0x00000288 |
| 1623 #define LP_PERF_LIGHT_SLEEP_CNT_MSB 31 |
| 1624 #define LP_PERF_LIGHT_SLEEP_CNT_LSB 0 |
| 1625 #define LP_PERF_LIGHT_SLEEP_CNT_MASK 0xffffffff |
| 1626 #define LP_PERF_LIGHT_SLEEP_CNT_GET(x) (((x) & LP_PERF_LIGHT_SLEEP_CNT
_MASK) >> LP_PERF_LIGHT_SLEEP_CNT_LSB) |
| 1627 #define LP_PERF_LIGHT_SLEEP_CNT_SET(x) (((x) << LP_PERF_LIGHT_SLEEP_CN
T_LSB) & LP_PERF_LIGHT_SLEEP_CNT_MASK) |
| 1628 |
| 1629 #define LP_PERF_DEEP_SLEEP_ADDRESS 0x0000028c |
| 1630 #define LP_PERF_DEEP_SLEEP_OFFSET 0x0000028c |
| 1631 #define LP_PERF_DEEP_SLEEP_CNT_MSB 31 |
| 1632 #define LP_PERF_DEEP_SLEEP_CNT_LSB 0 |
| 1633 #define LP_PERF_DEEP_SLEEP_CNT_MASK 0xffffffff |
| 1634 #define LP_PERF_DEEP_SLEEP_CNT_GET(x) (((x) & LP_PERF_DEEP_SLEEP_CNT_
MASK) >> LP_PERF_DEEP_SLEEP_CNT_LSB) |
| 1635 #define LP_PERF_DEEP_SLEEP_CNT_SET(x) (((x) << LP_PERF_DEEP_SLEEP_CNT
_LSB) & LP_PERF_DEEP_SLEEP_CNT_MASK) |
| 1636 |
| 1637 #define LP_PERF_ON_ADDRESS 0x00000290 |
| 1638 #define LP_PERF_ON_OFFSET 0x00000290 |
| 1639 #define LP_PERF_ON_CNT_MSB 31 |
| 1640 #define LP_PERF_ON_CNT_LSB 0 |
| 1641 #define LP_PERF_ON_CNT_MASK 0xffffffff |
| 1642 #define LP_PERF_ON_CNT_GET(x) (((x) & LP_PERF_ON_CNT_MASK) >>
LP_PERF_ON_CNT_LSB) |
| 1643 #define LP_PERF_ON_CNT_SET(x) (((x) << LP_PERF_ON_CNT_LSB) &
LP_PERF_ON_CNT_MASK) |
| 1644 |
| 1645 #define ST_64_BIT_ADDRESS 0x00000294 |
| 1646 #define ST_64_BIT_OFFSET 0x00000294 |
| 1647 #define ST_64_BIT_TIMEOUT_MSB 26 |
| 1648 #define ST_64_BIT_TIMEOUT_LSB 9 |
| 1649 #define ST_64_BIT_TIMEOUT_MASK 0x07fffe00 |
| 1650 #define ST_64_BIT_TIMEOUT_GET(x) (((x) & ST_64_BIT_TIMEOUT_MASK)
>> ST_64_BIT_TIMEOUT_LSB) |
| 1651 #define ST_64_BIT_TIMEOUT_SET(x) (((x) << ST_64_BIT_TIMEOUT_LSB)
& ST_64_BIT_TIMEOUT_MASK) |
| 1652 #define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MSB 8 |
| 1653 #define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_LSB 8 |
| 1654 #define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MASK 0x00000100 |
| 1655 #define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_GET(x) (((x) & ST_64_BIT_REQ_ACK_NOT_P
ULLED_DOWN_MASK) >> ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_LSB) |
| 1656 #define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_SET(x) (((x) << ST_64_BIT_REQ_ACK_NOT_
PULLED_DOWN_LSB) & ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MASK) |
| 1657 #define ST_64_BIT_DRIVE_MODE_MSB 7 |
| 1658 #define ST_64_BIT_DRIVE_MODE_LSB 7 |
| 1659 #define ST_64_BIT_DRIVE_MODE_MASK 0x00000080 |
| 1660 #define ST_64_BIT_DRIVE_MODE_GET(x) (((x) & ST_64_BIT_DRIVE_MODE_MA
SK) >> ST_64_BIT_DRIVE_MODE_LSB) |
| 1661 #define ST_64_BIT_DRIVE_MODE_SET(x) (((x) << ST_64_BIT_DRIVE_MODE_L
SB) & ST_64_BIT_DRIVE_MODE_MASK) |
| 1662 #define ST_64_BIT_CLOCK_GATE_MSB 6 |
| 1663 #define ST_64_BIT_CLOCK_GATE_LSB 6 |
| 1664 #define ST_64_BIT_CLOCK_GATE_MASK 0x00000040 |
| 1665 #define ST_64_BIT_CLOCK_GATE_GET(x) (((x) & ST_64_BIT_CLOCK_GATE_MA
SK) >> ST_64_BIT_CLOCK_GATE_LSB) |
| 1666 #define ST_64_BIT_CLOCK_GATE_SET(x) (((x) << ST_64_BIT_CLOCK_GATE_L
SB) & ST_64_BIT_CLOCK_GATE_MASK) |
| 1667 #define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MSB 5 |
| 1668 #define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_LSB 1 |
| 1669 #define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MASK 0x0000003e |
| 1670 #define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_GET(x) (((x) & ST_64_BIT_SOC_CLK_DIVID
E_RATIO_MASK) >> ST_64_BIT_SOC_CLK_DIVIDE_RATIO_LSB) |
| 1671 #define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_SET(x) (((x) << ST_64_BIT_SOC_CLK_DIVI
DE_RATIO_LSB) & ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MASK) |
| 1672 #define ST_64_BIT_MODE_MSB 0 |
| 1673 #define ST_64_BIT_MODE_LSB 0 |
| 1674 #define ST_64_BIT_MODE_MASK 0x00000001 |
| 1675 #define ST_64_BIT_MODE_GET(x) (((x) & ST_64_BIT_MODE_MASK) >>
ST_64_BIT_MODE_LSB) |
| 1676 #define ST_64_BIT_MODE_SET(x) (((x) << ST_64_BIT_MODE_LSB) &
ST_64_BIT_MODE_MASK) |
| 1677 |
| 1678 #define MESSAGE_WR_ADDRESS 0x00000298 |
| 1679 #define MESSAGE_WR_OFFSET 0x00000298 |
| 1680 #define MESSAGE_WR_TYPE_MSB 31 |
| 1681 #define MESSAGE_WR_TYPE_LSB 0 |
| 1682 #define MESSAGE_WR_TYPE_MASK 0xffffffff |
| 1683 #define MESSAGE_WR_TYPE_GET(x) (((x) & MESSAGE_WR_TYPE_MASK) >
> MESSAGE_WR_TYPE_LSB) |
| 1684 #define MESSAGE_WR_TYPE_SET(x) (((x) << MESSAGE_WR_TYPE_LSB) &
MESSAGE_WR_TYPE_MASK) |
| 1685 |
| 1686 #define MESSAGE_WR_P_ADDRESS 0x0000029c |
| 1687 #define MESSAGE_WR_P_OFFSET 0x0000029c |
| 1688 #define MESSAGE_WR_P_PARAMETER_MSB 31 |
| 1689 #define MESSAGE_WR_P_PARAMETER_LSB 0 |
| 1690 #define MESSAGE_WR_P_PARAMETER_MASK 0xffffffff |
| 1691 #define MESSAGE_WR_P_PARAMETER_GET(x) (((x) & MESSAGE_WR_P_PARAMETER_
MASK) >> MESSAGE_WR_P_PARAMETER_LSB) |
| 1692 #define MESSAGE_WR_P_PARAMETER_SET(x) (((x) << MESSAGE_WR_P_PARAMETER
_LSB) & MESSAGE_WR_P_PARAMETER_MASK) |
| 1693 |
| 1694 #define MESSAGE_RD_ADDRESS 0x000002a0 |
| 1695 #define MESSAGE_RD_OFFSET 0x000002a0 |
| 1696 #define MESSAGE_RD_TYPE_MSB 31 |
| 1697 #define MESSAGE_RD_TYPE_LSB 0 |
| 1698 #define MESSAGE_RD_TYPE_MASK 0xffffffff |
| 1699 #define MESSAGE_RD_TYPE_GET(x) (((x) & MESSAGE_RD_TYPE_MASK) >
> MESSAGE_RD_TYPE_LSB) |
| 1700 #define MESSAGE_RD_TYPE_SET(x) (((x) << MESSAGE_RD_TYPE_LSB) &
MESSAGE_RD_TYPE_MASK) |
| 1701 |
| 1702 #define MESSAGE_RD_P_ADDRESS 0x000002a4 |
| 1703 #define MESSAGE_RD_P_OFFSET 0x000002a4 |
| 1704 #define MESSAGE_RD_P_PARAMETER_MSB 31 |
| 1705 #define MESSAGE_RD_P_PARAMETER_LSB 0 |
| 1706 #define MESSAGE_RD_P_PARAMETER_MASK 0xffffffff |
| 1707 #define MESSAGE_RD_P_PARAMETER_GET(x) (((x) & MESSAGE_RD_P_PARAMETER_
MASK) >> MESSAGE_RD_P_PARAMETER_LSB) |
| 1708 #define MESSAGE_RD_P_PARAMETER_SET(x) (((x) << MESSAGE_RD_P_PARAMETER
_LSB) & MESSAGE_RD_P_PARAMETER_MASK) |
| 1709 |
| 1710 #define CHIP_MODE_ADDRESS 0x000002a8 |
| 1711 #define CHIP_MODE_OFFSET 0x000002a8 |
| 1712 #define CHIP_MODE_BIT_MSB 1 |
| 1713 #define CHIP_MODE_BIT_LSB 0 |
| 1714 #define CHIP_MODE_BIT_MASK 0x00000003 |
| 1715 #define CHIP_MODE_BIT_GET(x) (((x) & CHIP_MODE_BIT_MASK) >>
CHIP_MODE_BIT_LSB) |
| 1716 #define CHIP_MODE_BIT_SET(x) (((x) << CHIP_MODE_BIT_LSB) & C
HIP_MODE_BIT_MASK) |
| 1717 |
| 1718 #define CLK_REQ_FALL_EDGE_ADDRESS 0x000002ac |
| 1719 #define CLK_REQ_FALL_EDGE_OFFSET 0x000002ac |
| 1720 #define CLK_REQ_FALL_EDGE_EN_MSB 31 |
| 1721 #define CLK_REQ_FALL_EDGE_EN_LSB 31 |
| 1722 #define CLK_REQ_FALL_EDGE_EN_MASK 0x80000000 |
| 1723 #define CLK_REQ_FALL_EDGE_EN_GET(x) (((x) & CLK_REQ_FALL_EDGE_EN_MA
SK) >> CLK_REQ_FALL_EDGE_EN_LSB) |
| 1724 #define CLK_REQ_FALL_EDGE_EN_SET(x) (((x) << CLK_REQ_FALL_EDGE_EN_L
SB) & CLK_REQ_FALL_EDGE_EN_MASK) |
| 1725 #define CLK_REQ_FALL_EDGE_DELAY_MSB 7 |
| 1726 #define CLK_REQ_FALL_EDGE_DELAY_LSB 0 |
| 1727 #define CLK_REQ_FALL_EDGE_DELAY_MASK 0x000000ff |
| 1728 #define CLK_REQ_FALL_EDGE_DELAY_GET(x) (((x) & CLK_REQ_FALL_EDGE_DELAY
_MASK) >> CLK_REQ_FALL_EDGE_DELAY_LSB) |
| 1729 #define CLK_REQ_FALL_EDGE_DELAY_SET(x) (((x) << CLK_REQ_FALL_EDGE_DELA
Y_LSB) & CLK_REQ_FALL_EDGE_DELAY_MASK) |
| 1730 |
| 1731 #define OTP_ADDRESS 0x000002b0 |
| 1732 #define OTP_OFFSET 0x000002b0 |
| 1733 #define OTP_LDO25_EN_MSB 1 |
| 1734 #define OTP_LDO25_EN_LSB 1 |
| 1735 #define OTP_LDO25_EN_MASK 0x00000002 |
| 1736 #define OTP_LDO25_EN_GET(x) (((x) & OTP_LDO25_EN_MASK) >> O
TP_LDO25_EN_LSB) |
| 1737 #define OTP_LDO25_EN_SET(x) (((x) << OTP_LDO25_EN_LSB) & OT
P_LDO25_EN_MASK) |
| 1738 #define OTP_VDD12_EN_MSB 0 |
| 1739 #define OTP_VDD12_EN_LSB 0 |
| 1740 #define OTP_VDD12_EN_MASK 0x00000001 |
| 1741 #define OTP_VDD12_EN_GET(x) (((x) & OTP_VDD12_EN_MASK) >> O
TP_VDD12_EN_LSB) |
| 1742 #define OTP_VDD12_EN_SET(x) (((x) << OTP_VDD12_EN_LSB) & OT
P_VDD12_EN_MASK) |
| 1743 |
| 1744 #define OTP_STATUS_ADDRESS 0x000002b4 |
| 1745 #define OTP_STATUS_OFFSET 0x000002b4 |
| 1746 #define OTP_STATUS_LDO25_EN_READY_MSB 1 |
| 1747 #define OTP_STATUS_LDO25_EN_READY_LSB 1 |
| 1748 #define OTP_STATUS_LDO25_EN_READY_MASK 0x00000002 |
| 1749 #define OTP_STATUS_LDO25_EN_READY_GET(x) (((x) & OTP_STATUS_LDO25_EN_REA
DY_MASK) >> OTP_STATUS_LDO25_EN_READY_LSB) |
| 1750 #define OTP_STATUS_LDO25_EN_READY_SET(x) (((x) << OTP_STATUS_LDO25_EN_RE
ADY_LSB) & OTP_STATUS_LDO25_EN_READY_MASK) |
| 1751 #define OTP_STATUS_VDD12_EN_READY_MSB 0 |
| 1752 #define OTP_STATUS_VDD12_EN_READY_LSB 0 |
| 1753 #define OTP_STATUS_VDD12_EN_READY_MASK 0x00000001 |
| 1754 #define OTP_STATUS_VDD12_EN_READY_GET(x) (((x) & OTP_STATUS_VDD12_EN_REA
DY_MASK) >> OTP_STATUS_VDD12_EN_READY_LSB) |
| 1755 #define OTP_STATUS_VDD12_EN_READY_SET(x) (((x) << OTP_STATUS_VDD12_EN_RE
ADY_LSB) & OTP_STATUS_VDD12_EN_READY_MASK) |
| 1756 |
| 1757 #define PMU_ADDRESS 0x000002b8 |
| 1758 #define PMU_OFFSET 0x000002b8 |
| 1759 #define PMU_REG_WAKEUP_TIME_SEL_MSB 1 |
| 1760 #define PMU_REG_WAKEUP_TIME_SEL_LSB 0 |
| 1761 #define PMU_REG_WAKEUP_TIME_SEL_MASK 0x00000003 |
| 1762 #define PMU_REG_WAKEUP_TIME_SEL_GET(x) (((x) & PMU_REG_WAKEUP_TIME_SEL
_MASK) >> PMU_REG_WAKEUP_TIME_SEL_LSB) |
| 1763 #define PMU_REG_WAKEUP_TIME_SEL_SET(x) (((x) << PMU_REG_WAKEUP_TIME_SE
L_LSB) & PMU_REG_WAKEUP_TIME_SEL_MASK) |
| 1764 |
| 1765 #define PMU_CONFIG_ADDRESS 0x000002c0 |
| 1766 #define PMU_CONFIG_OFFSET 0x000002c0 |
| 1767 #define PMU_CONFIG_VALUE_MSB 15 |
| 1768 #define PMU_CONFIG_VALUE_LSB 0 |
| 1769 #define PMU_CONFIG_VALUE_MASK 0x0000ffff |
| 1770 #define PMU_CONFIG_VALUE_GET(x) (((x) & PMU_CONFIG_VALUE_MASK)
>> PMU_CONFIG_VALUE_LSB) |
| 1771 #define PMU_CONFIG_VALUE_SET(x) (((x) << PMU_CONFIG_VALUE_LSB)
& PMU_CONFIG_VALUE_MASK) |
| 1772 |
| 1773 #define PMU_BYPASS_ADDRESS 0x000002c8 |
| 1774 #define PMU_BYPASS_OFFSET 0x000002c8 |
| 1775 #define PMU_BYPASS_SWREG_MSB 2 |
| 1776 #define PMU_BYPASS_SWREG_LSB 2 |
| 1777 #define PMU_BYPASS_SWREG_MASK 0x00000004 |
| 1778 #define PMU_BYPASS_SWREG_GET(x) (((x) & PMU_BYPASS_SWREG_MASK)
>> PMU_BYPASS_SWREG_LSB) |
| 1779 #define PMU_BYPASS_SWREG_SET(x) (((x) << PMU_BYPASS_SWREG_LSB)
& PMU_BYPASS_SWREG_MASK) |
| 1780 #define PMU_BYPASS_DREG_MSB 1 |
| 1781 #define PMU_BYPASS_DREG_LSB 1 |
| 1782 #define PMU_BYPASS_DREG_MASK 0x00000002 |
| 1783 #define PMU_BYPASS_DREG_GET(x) (((x) & PMU_BYPASS_DREG_MASK) >
> PMU_BYPASS_DREG_LSB) |
| 1784 #define PMU_BYPASS_DREG_SET(x) (((x) << PMU_BYPASS_DREG_LSB) &
PMU_BYPASS_DREG_MASK) |
| 1785 #define PMU_BYPASS_PAREG_MSB 0 |
| 1786 #define PMU_BYPASS_PAREG_LSB 0 |
| 1787 #define PMU_BYPASS_PAREG_MASK 0x00000001 |
| 1788 #define PMU_BYPASS_PAREG_GET(x) (((x) & PMU_BYPASS_PAREG_MASK)
>> PMU_BYPASS_PAREG_LSB) |
| 1789 #define PMU_BYPASS_PAREG_SET(x) (((x) << PMU_BYPASS_PAREG_LSB)
& PMU_BYPASS_PAREG_MASK) |
| 1790 |
| 1791 #define MAC_PCU_TSF2_L32_ADDRESS 0x000002cc |
| 1792 #define MAC_PCU_TSF2_L32_OFFSET 0x000002cc |
| 1793 #define MAC_PCU_TSF2_L32_VALUE_MSB 31 |
| 1794 #define MAC_PCU_TSF2_L32_VALUE_LSB 0 |
| 1795 #define MAC_PCU_TSF2_L32_VALUE_MASK 0xffffffff |
| 1796 #define MAC_PCU_TSF2_L32_VALUE_GET(x) (((x) & MAC_PCU_TSF2_L32_VALUE_
MASK) >> MAC_PCU_TSF2_L32_VALUE_LSB) |
| 1797 #define MAC_PCU_TSF2_L32_VALUE_SET(x) (((x) << MAC_PCU_TSF2_L32_VALUE
_LSB) & MAC_PCU_TSF2_L32_VALUE_MASK) |
| 1798 |
| 1799 #define MAC_PCU_TSF2_U32_ADDRESS 0x000002d0 |
| 1800 #define MAC_PCU_TSF2_U32_OFFSET 0x000002d0 |
| 1801 #define MAC_PCU_TSF2_U32_VALUE_MSB 31 |
| 1802 #define MAC_PCU_TSF2_U32_VALUE_LSB 0 |
| 1803 #define MAC_PCU_TSF2_U32_VALUE_MASK 0xffffffff |
| 1804 #define MAC_PCU_TSF2_U32_VALUE_GET(x) (((x) & MAC_PCU_TSF2_U32_VALUE_
MASK) >> MAC_PCU_TSF2_U32_VALUE_LSB) |
| 1805 #define MAC_PCU_TSF2_U32_VALUE_SET(x) (((x) << MAC_PCU_TSF2_U32_VALUE
_LSB) & MAC_PCU_TSF2_U32_VALUE_MASK) |
| 1806 |
| 1807 #define MAC_PCU_GENERIC_TIMERS_MODE3_ADDRESS 0x000002d4 |
| 1808 #define MAC_PCU_GENERIC_TIMERS_MODE3_OFFSET 0x000002d4 |
| 1809 #define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_MSB 27 |
| 1810 #define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_LSB 24 |
| 1811 #define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_MASK 0x0f000000 |
| 1812 #define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_GET(x) (((x) & MAC_PCU_GENER
IC_TIMERS_MODE3_OVERFLOW_INDEX_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_IN
DEX_LSB) |
| 1813 #define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_SET(x) (((x) << MAC_PCU_GENE
RIC_TIMERS_MODE3_OVERFLOW_INDEX_LSB) & MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_IND
EX_MASK) |
| 1814 #define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MSB 19 |
| 1815 #define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_LSB 0 |
| 1816 #define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MASK 0x000fffff |
| 1817 #define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_GET(x) (((x) & MAC_PCU_GENERIC_TIMER
S_MODE3_THRESH_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_LSB) |
| 1818 #define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_SET(x) (((x) << MAC_PCU_GENERIC_TIME
RS_MODE3_THRESH_LSB) & MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MASK) |
| 1819 |
| 1820 #define MAC_PCU_DIRECT_CONNECT_ADDRESS 0x000002d8 |
| 1821 #define MAC_PCU_DIRECT_CONNECT_OFFSET 0x000002d8 |
| 1822 #define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MSB 2 |
| 1823 #define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_LSB 2 |
| 1824 #define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MASK 0x00000004 |
| 1825 #define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_GET(x) (((x) & MAC_PCU_DIRECT_CON
NECT_STA_TSF_1_2_SEL_MASK) >> MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_LSB) |
| 1826 #define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_SET(x) (((x) << MAC_PCU_DIRECT_CO
NNECT_STA_TSF_1_2_SEL_LSB) & MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MASK) |
| 1827 #define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MSB 1 |
| 1828 #define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_LSB 1 |
| 1829 #define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MASK 0x00000002 |
| 1830 #define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_GET(x) (((x) & MAC_PCU_DIRECT_CONN
ECT_AP_TSF_1_2_SEL_MASK) >> MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_LSB) |
| 1831 #define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_SET(x) (((x) << MAC_PCU_DIRECT_CON
NECT_AP_TSF_1_2_SEL_LSB) & MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MASK) |
| 1832 #define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MSB 0 |
| 1833 #define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_LSB 0 |
| 1834 #define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MASK 0x00000001 |
| 1835 #define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_GET(x) (((x) & MAC_PCU_DIRECT_CONNE
CT_AP_STA_ENABLE_MASK) >> MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_LSB) |
| 1836 #define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_SET(x) (((x) << MAC_PCU_DIRECT_CONN
ECT_AP_STA_ENABLE_LSB) & MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MASK) |
| 1837 |
| 1838 #define THERM_CTRL1_ADDRESS 0x000002dc |
| 1839 #define THERM_CTRL1_OFFSET 0x000002dc |
| 1840 #define THERM_CTRL1_BYPASS_MSB 16 |
| 1841 #define THERM_CTRL1_BYPASS_LSB 16 |
| 1842 #define THERM_CTRL1_BYPASS_MASK 0x00010000 |
| 1843 #define THERM_CTRL1_BYPASS_GET(x) (((x) & THERM_CTRL1_BYPASS_MASK
) >> THERM_CTRL1_BYPASS_LSB) |
| 1844 #define THERM_CTRL1_BYPASS_SET(x) (((x) << THERM_CTRL1_BYPASS_LSB
) & THERM_CTRL1_BYPASS_MASK) |
| 1845 #define THERM_CTRL1_WIDTH_ARBITOR_MSB 15 |
| 1846 #define THERM_CTRL1_WIDTH_ARBITOR_LSB 12 |
| 1847 #define THERM_CTRL1_WIDTH_ARBITOR_MASK 0x0000f000 |
| 1848 #define THERM_CTRL1_WIDTH_ARBITOR_GET(x) (((x) & THERM_CTRL1_WIDTH_ARBIT
OR_MASK) >> THERM_CTRL1_WIDTH_ARBITOR_LSB) |
| 1849 #define THERM_CTRL1_WIDTH_ARBITOR_SET(x) (((x) << THERM_CTRL1_WIDTH_ARBI
TOR_LSB) & THERM_CTRL1_WIDTH_ARBITOR_MASK) |
| 1850 #define THERM_CTRL1_WIDTH_MSB 11 |
| 1851 #define THERM_CTRL1_WIDTH_LSB 5 |
| 1852 #define THERM_CTRL1_WIDTH_MASK 0x00000fe0 |
| 1853 #define THERM_CTRL1_WIDTH_GET(x) (((x) & THERM_CTRL1_WIDTH_MASK)
>> THERM_CTRL1_WIDTH_LSB) |
| 1854 #define THERM_CTRL1_WIDTH_SET(x) (((x) << THERM_CTRL1_WIDTH_LSB)
& THERM_CTRL1_WIDTH_MASK) |
| 1855 #define THERM_CTRL1_TYPE_MSB 4 |
| 1856 #define THERM_CTRL1_TYPE_LSB 3 |
| 1857 #define THERM_CTRL1_TYPE_MASK 0x00000018 |
| 1858 #define THERM_CTRL1_TYPE_GET(x) (((x) & THERM_CTRL1_TYPE_MASK)
>> THERM_CTRL1_TYPE_LSB) |
| 1859 #define THERM_CTRL1_TYPE_SET(x) (((x) << THERM_CTRL1_TYPE_LSB)
& THERM_CTRL1_TYPE_MASK) |
| 1860 #define THERM_CTRL1_MEASURE_MSB 2 |
| 1861 #define THERM_CTRL1_MEASURE_LSB 2 |
| 1862 #define THERM_CTRL1_MEASURE_MASK 0x00000004 |
| 1863 #define THERM_CTRL1_MEASURE_GET(x) (((x) & THERM_CTRL1_MEASURE_MAS
K) >> THERM_CTRL1_MEASURE_LSB) |
| 1864 #define THERM_CTRL1_MEASURE_SET(x) (((x) << THERM_CTRL1_MEASURE_LS
B) & THERM_CTRL1_MEASURE_MASK) |
| 1865 #define THERM_CTRL1_INT_EN_MSB 1 |
| 1866 #define THERM_CTRL1_INT_EN_LSB 1 |
| 1867 #define THERM_CTRL1_INT_EN_MASK 0x00000002 |
| 1868 #define THERM_CTRL1_INT_EN_GET(x) (((x) & THERM_CTRL1_INT_EN_MASK
) >> THERM_CTRL1_INT_EN_LSB) |
| 1869 #define THERM_CTRL1_INT_EN_SET(x) (((x) << THERM_CTRL1_INT_EN_LSB
) & THERM_CTRL1_INT_EN_MASK) |
| 1870 #define THERM_CTRL1_INT_STATUS_MSB 0 |
| 1871 #define THERM_CTRL1_INT_STATUS_LSB 0 |
| 1872 #define THERM_CTRL1_INT_STATUS_MASK 0x00000001 |
| 1873 #define THERM_CTRL1_INT_STATUS_GET(x) (((x) & THERM_CTRL1_INT_STATUS_
MASK) >> THERM_CTRL1_INT_STATUS_LSB) |
| 1874 #define THERM_CTRL1_INT_STATUS_SET(x) (((x) << THERM_CTRL1_INT_STATUS
_LSB) & THERM_CTRL1_INT_STATUS_MASK) |
| 1875 |
| 1876 #define THERM_CTRL2_ADDRESS 0x000002e0 |
| 1877 #define THERM_CTRL2_OFFSET 0x000002e0 |
| 1878 #define THERM_CTRL2_ADC_OFF_MSB 25 |
| 1879 #define THERM_CTRL2_ADC_OFF_LSB 25 |
| 1880 #define THERM_CTRL2_ADC_OFF_MASK 0x02000000 |
| 1881 #define THERM_CTRL2_ADC_OFF_GET(x) (((x) & THERM_CTRL2_ADC_OFF_MAS
K) >> THERM_CTRL2_ADC_OFF_LSB) |
| 1882 #define THERM_CTRL2_ADC_OFF_SET(x) (((x) << THERM_CTRL2_ADC_OFF_LS
B) & THERM_CTRL2_ADC_OFF_MASK) |
| 1883 #define THERM_CTRL2_ADC_ON_MSB 24 |
| 1884 #define THERM_CTRL2_ADC_ON_LSB 24 |
| 1885 #define THERM_CTRL2_ADC_ON_MASK 0x01000000 |
| 1886 #define THERM_CTRL2_ADC_ON_GET(x) (((x) & THERM_CTRL2_ADC_ON_MASK
) >> THERM_CTRL2_ADC_ON_LSB) |
| 1887 #define THERM_CTRL2_ADC_ON_SET(x) (((x) << THERM_CTRL2_ADC_ON_LSB
) & THERM_CTRL2_ADC_ON_MASK) |
| 1888 #define THERM_CTRL2_SAMPLE_MSB 23 |
| 1889 #define THERM_CTRL2_SAMPLE_LSB 16 |
| 1890 #define THERM_CTRL2_SAMPLE_MASK 0x00ff0000 |
| 1891 #define THERM_CTRL2_SAMPLE_GET(x) (((x) & THERM_CTRL2_SAMPLE_MASK
) >> THERM_CTRL2_SAMPLE_LSB) |
| 1892 #define THERM_CTRL2_SAMPLE_SET(x) (((x) << THERM_CTRL2_SAMPLE_LSB
) & THERM_CTRL2_SAMPLE_MASK) |
| 1893 #define THERM_CTRL2_HIGH_MSB 15 |
| 1894 #define THERM_CTRL2_HIGH_LSB 8 |
| 1895 #define THERM_CTRL2_HIGH_MASK 0x0000ff00 |
| 1896 #define THERM_CTRL2_HIGH_GET(x) (((x) & THERM_CTRL2_HIGH_MASK)
>> THERM_CTRL2_HIGH_LSB) |
| 1897 #define THERM_CTRL2_HIGH_SET(x) (((x) << THERM_CTRL2_HIGH_LSB)
& THERM_CTRL2_HIGH_MASK) |
| 1898 #define THERM_CTRL2_LOW_MSB 7 |
| 1899 #define THERM_CTRL2_LOW_LSB 0 |
| 1900 #define THERM_CTRL2_LOW_MASK 0x000000ff |
| 1901 #define THERM_CTRL2_LOW_GET(x) (((x) & THERM_CTRL2_LOW_MASK) >
> THERM_CTRL2_LOW_LSB) |
| 1902 #define THERM_CTRL2_LOW_SET(x) (((x) << THERM_CTRL2_LOW_LSB) &
THERM_CTRL2_LOW_MASK) |
| 1903 |
| 1904 #define THERM_CTRL3_ADDRESS 0x000002e4 |
| 1905 #define THERM_CTRL3_OFFSET 0x000002e4 |
| 1906 #define THERM_CTRL3_ADC_GAIN_MSB 16 |
| 1907 #define THERM_CTRL3_ADC_GAIN_LSB 8 |
| 1908 #define THERM_CTRL3_ADC_GAIN_MASK 0x0001ff00 |
| 1909 #define THERM_CTRL3_ADC_GAIN_GET(x) (((x) & THERM_CTRL3_ADC_GAIN_MA
SK) >> THERM_CTRL3_ADC_GAIN_LSB) |
| 1910 #define THERM_CTRL3_ADC_GAIN_SET(x) (((x) << THERM_CTRL3_ADC_GAIN_L
SB) & THERM_CTRL3_ADC_GAIN_MASK) |
| 1911 #define THERM_CTRL3_ADC_OFFSET_MSB 7 |
| 1912 #define THERM_CTRL3_ADC_OFFSET_LSB 0 |
| 1913 #define THERM_CTRL3_ADC_OFFSET_MASK 0x000000ff |
| 1914 #define THERM_CTRL3_ADC_OFFSET_GET(x) (((x) & THERM_CTRL3_ADC_OFFSET_
MASK) >> THERM_CTRL3_ADC_OFFSET_LSB) |
| 1915 #define THERM_CTRL3_ADC_OFFSET_SET(x) (((x) << THERM_CTRL3_ADC_OFFSET
_LSB) & THERM_CTRL3_ADC_OFFSET_MASK) |
| 1916 |
| 1917 |
| 1918 #ifndef __ASSEMBLER__ |
| 1919 |
| 1920 typedef struct rtc_wlan_reg_reg_s { |
| 1921 volatile unsigned int wlan_reset_control; |
| 1922 volatile unsigned int wlan_xtal_control; |
| 1923 volatile unsigned int wlan_tcxo_detect; |
| 1924 volatile unsigned int wlan_xtal_test; |
| 1925 volatile unsigned int wlan_quadrature; |
| 1926 volatile unsigned int wlan_pll_control; |
| 1927 volatile unsigned int wlan_pll_settle; |
| 1928 volatile unsigned int wlan_xtal_settle; |
| 1929 volatile unsigned int wlan_cpu_clock; |
| 1930 volatile unsigned int wlan_clock_out; |
| 1931 volatile unsigned int wlan_clock_control; |
| 1932 volatile unsigned int wlan_bias_override; |
| 1933 volatile unsigned int wlan_wdt_control; |
| 1934 volatile unsigned int wlan_wdt_status; |
| 1935 volatile unsigned int wlan_wdt; |
| 1936 volatile unsigned int wlan_wdt_count; |
| 1937 volatile unsigned int wlan_wdt_reset; |
| 1938 volatile unsigned int wlan_int_status; |
| 1939 volatile unsigned int wlan_lf_timer0; |
| 1940 volatile unsigned int wlan_lf_timer_count0; |
| 1941 volatile unsigned int wlan_lf_timer_control0; |
| 1942 volatile unsigned int wlan_lf_timer_status0; |
| 1943 volatile unsigned int wlan_lf_timer1; |
| 1944 volatile unsigned int wlan_lf_timer_count1; |
| 1945 volatile unsigned int wlan_lf_timer_control1; |
| 1946 volatile unsigned int wlan_lf_timer_status1; |
| 1947 volatile unsigned int wlan_lf_timer2; |
| 1948 volatile unsigned int wlan_lf_timer_count2; |
| 1949 volatile unsigned int wlan_lf_timer_control2; |
| 1950 volatile unsigned int wlan_lf_timer_status2; |
| 1951 volatile unsigned int wlan_lf_timer3; |
| 1952 volatile unsigned int wlan_lf_timer_count3; |
| 1953 volatile unsigned int wlan_lf_timer_control3; |
| 1954 volatile unsigned int wlan_lf_timer_status3; |
| 1955 volatile unsigned int wlan_hf_timer; |
| 1956 volatile unsigned int wlan_hf_timer_count; |
| 1957 volatile unsigned int wlan_hf_lf_count; |
| 1958 volatile unsigned int wlan_hf_timer_control; |
| 1959 volatile unsigned int wlan_hf_timer_status; |
| 1960 volatile unsigned int wlan_rtc_control; |
| 1961 volatile unsigned int wlan_rtc_time; |
| 1962 volatile unsigned int wlan_rtc_date; |
| 1963 volatile unsigned int wlan_rtc_set_time; |
| 1964 volatile unsigned int wlan_rtc_set_date; |
| 1965 volatile unsigned int wlan_rtc_set_alarm; |
| 1966 volatile unsigned int wlan_rtc_config; |
| 1967 volatile unsigned int wlan_rtc_alarm_status; |
| 1968 volatile unsigned int wlan_uart_wakeup; |
| 1969 volatile unsigned int wlan_reset_cause; |
| 1970 volatile unsigned int wlan_system_sleep; |
| 1971 volatile unsigned int wlan_sdio_wrapper; |
| 1972 volatile unsigned int wlan_mac_sleep_control; |
| 1973 volatile unsigned int wlan_keep_awake; |
| 1974 volatile unsigned int wlan_lpo_cal_time; |
| 1975 volatile unsigned int wlan_lpo_init_dividend_int; |
| 1976 volatile unsigned int wlan_lpo_init_dividend_fraction; |
| 1977 volatile unsigned int wlan_lpo_cal; |
| 1978 volatile unsigned int wlan_lpo_cal_test_control; |
| 1979 volatile unsigned int wlan_lpo_cal_test_status; |
| 1980 volatile unsigned int wlan_chip_id; |
| 1981 volatile unsigned int wlan_derived_rtc_clk; |
| 1982 volatile unsigned int mac_pcu_slp32_mode; |
| 1983 volatile unsigned int mac_pcu_slp32_wake; |
| 1984 volatile unsigned int mac_pcu_slp32_inc; |
| 1985 volatile unsigned int mac_pcu_slp_mib1; |
| 1986 volatile unsigned int mac_pcu_slp_mib2; |
| 1987 volatile unsigned int mac_pcu_slp_mib3; |
| 1988 volatile unsigned int wlan_power_reg; |
| 1989 volatile unsigned int wlan_core_clk_ctrl; |
| 1990 volatile unsigned int wlan_gpio_wakeup_control; |
| 1991 volatile unsigned int ht; |
| 1992 volatile unsigned int mac_pcu_tsf_l32; |
| 1993 volatile unsigned int mac_pcu_tsf_u32; |
| 1994 volatile unsigned int mac_pcu_wbtimer; |
| 1995 unsigned char pad0[24]; /* pad to 0x140 */ |
| 1996 volatile unsigned int mac_pcu_generic_timers[16]; |
| 1997 volatile unsigned int mac_pcu_generic_timers_mode; |
| 1998 unsigned char pad1[60]; /* pad to 0x1c0 */ |
| 1999 volatile unsigned int mac_pcu_generic_timers2[16]; |
| 2000 volatile unsigned int mac_pcu_generic_timers_mode2; |
| 2001 volatile unsigned int mac_pcu_slp1; |
| 2002 volatile unsigned int mac_pcu_slp2; |
| 2003 volatile unsigned int mac_pcu_reset_tsf; |
| 2004 volatile unsigned int mac_pcu_tsf_add_pll; |
| 2005 volatile unsigned int sleep_retention; |
| 2006 volatile unsigned int btcoexctrl; |
| 2007 volatile unsigned int wbsync_priority1; |
| 2008 volatile unsigned int wbsync_priority2; |
| 2009 volatile unsigned int wbsync_priority3; |
| 2010 volatile unsigned int btcoex0; |
| 2011 volatile unsigned int btcoex1; |
| 2012 volatile unsigned int btcoex2; |
| 2013 volatile unsigned int btcoex3; |
| 2014 volatile unsigned int btcoex4; |
| 2015 volatile unsigned int btcoex5; |
| 2016 volatile unsigned int btcoex6; |
| 2017 volatile unsigned int lock; |
| 2018 volatile unsigned int nolock_priority; |
| 2019 volatile unsigned int wbsync; |
| 2020 volatile unsigned int wbsync1; |
| 2021 volatile unsigned int wbsync2; |
| 2022 volatile unsigned int wbsync3; |
| 2023 volatile unsigned int wb_timer_target; |
| 2024 volatile unsigned int wb_timer_slop; |
| 2025 volatile unsigned int btcoex_int_en; |
| 2026 volatile unsigned int btcoex_int_stat; |
| 2027 volatile unsigned int btpriority_int_en; |
| 2028 volatile unsigned int btpriority_int_stat; |
| 2029 volatile unsigned int btpriority_stomp_int_en; |
| 2030 volatile unsigned int btpriority_stomp_int_stat; |
| 2031 volatile unsigned int mac_pcu_bmiss_timeout; |
| 2032 volatile unsigned int mac_pcu_cab_awake; |
| 2033 volatile unsigned int lp_perf_counter; |
| 2034 volatile unsigned int lp_perf_light_sleep; |
| 2035 volatile unsigned int lp_perf_deep_sleep; |
| 2036 volatile unsigned int lp_perf_on; |
| 2037 volatile unsigned int st_64_bit; |
| 2038 volatile unsigned int message_wr; |
| 2039 volatile unsigned int message_wr_p; |
| 2040 volatile unsigned int message_rd; |
| 2041 volatile unsigned int message_rd_p; |
| 2042 volatile unsigned int chip_mode; |
| 2043 volatile unsigned int clk_req_fall_edge; |
| 2044 volatile unsigned int otp; |
| 2045 volatile unsigned int otp_status; |
| 2046 volatile unsigned int pmu; |
| 2047 unsigned char pad2[4]; /* pad to 0x2c0 */ |
| 2048 volatile unsigned int pmu_config[2]; |
| 2049 volatile unsigned int pmu_bypass; |
| 2050 volatile unsigned int mac_pcu_tsf2_l32; |
| 2051 volatile unsigned int mac_pcu_tsf2_u32; |
| 2052 volatile unsigned int mac_pcu_generic_timers_mode3; |
| 2053 volatile unsigned int mac_pcu_direct_connect; |
| 2054 volatile unsigned int therm_ctrl1; |
| 2055 volatile unsigned int therm_ctrl2; |
| 2056 volatile unsigned int therm_ctrl3; |
| 2057 } rtc_wlan_reg_reg_t; |
| 2058 |
| 2059 #endif /* __ASSEMBLER__ */ |
| 2060 |
| 2061 #endif /* _RTC_WLAN_REG_H_ */ |
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