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| 1 // ------------------------------------------------------------------ |
| 2 // Copyright (c) 2004-2007 Atheros Corporation. All rights reserved. |
| 3 // |
| 4 // This program is free software; you can redistribute it and/or modify |
| 5 // it under the terms of the GNU General Public License version 2 as |
| 6 // published by the Free Software Foundation; |
| 7 // |
| 8 // Software distributed under the License is distributed on an "AS |
| 9 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
| 10 // implied. See the License for the specific language governing |
| 11 // rights and limitations under the License. |
| 12 // |
| 13 // |
| 14 // ------------------------------------------------------------------ |
| 15 //=================================================================== |
| 16 // Author(s): ="Atheros" |
| 17 //=================================================================== |
| 18 |
| 19 |
| 20 #ifndef _RDMA_REG_REG_H_ |
| 21 #define _RDMA_REG_REG_H_ |
| 22 |
| 23 #define DMA_CONFIG_ADDRESS 0x00000000 |
| 24 #define DMA_CONFIG_OFFSET 0x00000000 |
| 25 #define DMA_CONFIG_WLBB_PWD_EN_MSB 4 |
| 26 #define DMA_CONFIG_WLBB_PWD_EN_LSB 4 |
| 27 #define DMA_CONFIG_WLBB_PWD_EN_MASK 0x00000010 |
| 28 #define DMA_CONFIG_WLBB_PWD_EN_GET(x) (((x) & DMA_CONFIG_WLBB_PWD_EN_
MASK) >> DMA_CONFIG_WLBB_PWD_EN_LSB) |
| 29 #define DMA_CONFIG_WLBB_PWD_EN_SET(x) (((x) << DMA_CONFIG_WLBB_PWD_EN
_LSB) & DMA_CONFIG_WLBB_PWD_EN_MASK) |
| 30 #define DMA_CONFIG_WLMAC_PWD_EN_MSB 3 |
| 31 #define DMA_CONFIG_WLMAC_PWD_EN_LSB 3 |
| 32 #define DMA_CONFIG_WLMAC_PWD_EN_MASK 0x00000008 |
| 33 #define DMA_CONFIG_WLMAC_PWD_EN_GET(x) (((x) & DMA_CONFIG_WLMAC_PWD_EN
_MASK) >> DMA_CONFIG_WLMAC_PWD_EN_LSB) |
| 34 #define DMA_CONFIG_WLMAC_PWD_EN_SET(x) (((x) << DMA_CONFIG_WLMAC_PWD_E
N_LSB) & DMA_CONFIG_WLMAC_PWD_EN_MASK) |
| 35 #define DMA_CONFIG_ENABLE_RETENTION_MSB 2 |
| 36 #define DMA_CONFIG_ENABLE_RETENTION_LSB 2 |
| 37 #define DMA_CONFIG_ENABLE_RETENTION_MASK 0x00000004 |
| 38 #define DMA_CONFIG_ENABLE_RETENTION_GET(x) (((x) & DMA_CONFIG_ENABLE_RETEN
TION_MASK) >> DMA_CONFIG_ENABLE_RETENTION_LSB) |
| 39 #define DMA_CONFIG_ENABLE_RETENTION_SET(x) (((x) << DMA_CONFIG_ENABLE_RETE
NTION_LSB) & DMA_CONFIG_ENABLE_RETENTION_MASK) |
| 40 #define DMA_CONFIG_RTC_PRIORITY_MSB 1 |
| 41 #define DMA_CONFIG_RTC_PRIORITY_LSB 1 |
| 42 #define DMA_CONFIG_RTC_PRIORITY_MASK 0x00000002 |
| 43 #define DMA_CONFIG_RTC_PRIORITY_GET(x) (((x) & DMA_CONFIG_RTC_PRIORITY
_MASK) >> DMA_CONFIG_RTC_PRIORITY_LSB) |
| 44 #define DMA_CONFIG_RTC_PRIORITY_SET(x) (((x) << DMA_CONFIG_RTC_PRIORIT
Y_LSB) & DMA_CONFIG_RTC_PRIORITY_MASK) |
| 45 #define DMA_CONFIG_DMA_TYPE_MSB 0 |
| 46 #define DMA_CONFIG_DMA_TYPE_LSB 0 |
| 47 #define DMA_CONFIG_DMA_TYPE_MASK 0x00000001 |
| 48 #define DMA_CONFIG_DMA_TYPE_GET(x) (((x) & DMA_CONFIG_DMA_TYPE_MAS
K) >> DMA_CONFIG_DMA_TYPE_LSB) |
| 49 #define DMA_CONFIG_DMA_TYPE_SET(x) (((x) << DMA_CONFIG_DMA_TYPE_LS
B) & DMA_CONFIG_DMA_TYPE_MASK) |
| 50 |
| 51 #define DMA_CONTROL_ADDRESS 0x00000004 |
| 52 #define DMA_CONTROL_OFFSET 0x00000004 |
| 53 #define DMA_CONTROL_START_MSB 1 |
| 54 #define DMA_CONTROL_START_LSB 1 |
| 55 #define DMA_CONTROL_START_MASK 0x00000002 |
| 56 #define DMA_CONTROL_START_GET(x) (((x) & DMA_CONTROL_START_MASK)
>> DMA_CONTROL_START_LSB) |
| 57 #define DMA_CONTROL_START_SET(x) (((x) << DMA_CONTROL_START_LSB)
& DMA_CONTROL_START_MASK) |
| 58 #define DMA_CONTROL_STOP_MSB 0 |
| 59 #define DMA_CONTROL_STOP_LSB 0 |
| 60 #define DMA_CONTROL_STOP_MASK 0x00000001 |
| 61 #define DMA_CONTROL_STOP_GET(x) (((x) & DMA_CONTROL_STOP_MASK)
>> DMA_CONTROL_STOP_LSB) |
| 62 #define DMA_CONTROL_STOP_SET(x) (((x) << DMA_CONTROL_STOP_LSB)
& DMA_CONTROL_STOP_MASK) |
| 63 |
| 64 #define DMA_SRC_ADDRESS 0x00000008 |
| 65 #define DMA_SRC_OFFSET 0x00000008 |
| 66 #define DMA_SRC_ADDR_MSB 31 |
| 67 #define DMA_SRC_ADDR_LSB 2 |
| 68 #define DMA_SRC_ADDR_MASK 0xfffffffc |
| 69 #define DMA_SRC_ADDR_GET(x) (((x) & DMA_SRC_ADDR_MASK) >> D
MA_SRC_ADDR_LSB) |
| 70 #define DMA_SRC_ADDR_SET(x) (((x) << DMA_SRC_ADDR_LSB) & DM
A_SRC_ADDR_MASK) |
| 71 |
| 72 #define DMA_DEST_ADDRESS 0x0000000c |
| 73 #define DMA_DEST_OFFSET 0x0000000c |
| 74 #define DMA_DEST_ADDR_MSB 31 |
| 75 #define DMA_DEST_ADDR_LSB 2 |
| 76 #define DMA_DEST_ADDR_MASK 0xfffffffc |
| 77 #define DMA_DEST_ADDR_GET(x) (((x) & DMA_DEST_ADDR_MASK) >>
DMA_DEST_ADDR_LSB) |
| 78 #define DMA_DEST_ADDR_SET(x) (((x) << DMA_DEST_ADDR_LSB) & D
MA_DEST_ADDR_MASK) |
| 79 |
| 80 #define DMA_LENGTH_ADDRESS 0x00000010 |
| 81 #define DMA_LENGTH_OFFSET 0x00000010 |
| 82 #define DMA_LENGTH_WORDS_MSB 11 |
| 83 #define DMA_LENGTH_WORDS_LSB 0 |
| 84 #define DMA_LENGTH_WORDS_MASK 0x00000fff |
| 85 #define DMA_LENGTH_WORDS_GET(x) (((x) & DMA_LENGTH_WORDS_MASK)
>> DMA_LENGTH_WORDS_LSB) |
| 86 #define DMA_LENGTH_WORDS_SET(x) (((x) << DMA_LENGTH_WORDS_LSB)
& DMA_LENGTH_WORDS_MASK) |
| 87 |
| 88 #define VMC_BASE_ADDRESS 0x00000014 |
| 89 #define VMC_BASE_OFFSET 0x00000014 |
| 90 #define VMC_BASE_ADDR_MSB 31 |
| 91 #define VMC_BASE_ADDR_LSB 2 |
| 92 #define VMC_BASE_ADDR_MASK 0xfffffffc |
| 93 #define VMC_BASE_ADDR_GET(x) (((x) & VMC_BASE_ADDR_MASK) >>
VMC_BASE_ADDR_LSB) |
| 94 #define VMC_BASE_ADDR_SET(x) (((x) << VMC_BASE_ADDR_LSB) & V
MC_BASE_ADDR_MASK) |
| 95 |
| 96 #define INDIRECT_REG_ADDRESS 0x00000018 |
| 97 #define INDIRECT_REG_OFFSET 0x00000018 |
| 98 #define INDIRECT_REG_ID_MSB 31 |
| 99 #define INDIRECT_REG_ID_LSB 2 |
| 100 #define INDIRECT_REG_ID_MASK 0xfffffffc |
| 101 #define INDIRECT_REG_ID_GET(x) (((x) & INDIRECT_REG_ID_MASK) >
> INDIRECT_REG_ID_LSB) |
| 102 #define INDIRECT_REG_ID_SET(x) (((x) << INDIRECT_REG_ID_LSB) &
INDIRECT_REG_ID_MASK) |
| 103 |
| 104 #define INDIRECT_RETURN_ADDRESS 0x0000001c |
| 105 #define INDIRECT_RETURN_OFFSET 0x0000001c |
| 106 #define INDIRECT_RETURN_ADDR_MSB 31 |
| 107 #define INDIRECT_RETURN_ADDR_LSB 2 |
| 108 #define INDIRECT_RETURN_ADDR_MASK 0xfffffffc |
| 109 #define INDIRECT_RETURN_ADDR_GET(x) (((x) & INDIRECT_RETURN_ADDR_MA
SK) >> INDIRECT_RETURN_ADDR_LSB) |
| 110 #define INDIRECT_RETURN_ADDR_SET(x) (((x) << INDIRECT_RETURN_ADDR_L
SB) & INDIRECT_RETURN_ADDR_MASK) |
| 111 |
| 112 #define RDMA_REGION_0__ADDRESS 0x00000020 |
| 113 #define RDMA_REGION_0__OFFSET 0x00000020 |
| 114 #define RDMA_REGION_0__ADDR_MSB 31 |
| 115 #define RDMA_REGION_0__ADDR_LSB 13 |
| 116 #define RDMA_REGION_0__ADDR_MASK 0xffffe000 |
| 117 #define RDMA_REGION_0__ADDR_GET(x) (((x) & RDMA_REGION_0__ADDR_MAS
K) >> RDMA_REGION_0__ADDR_LSB) |
| 118 #define RDMA_REGION_0__ADDR_SET(x) (((x) << RDMA_REGION_0__ADDR_LS
B) & RDMA_REGION_0__ADDR_MASK) |
| 119 #define RDMA_REGION_0__LENGTH_MSB 12 |
| 120 #define RDMA_REGION_0__LENGTH_LSB 2 |
| 121 #define RDMA_REGION_0__LENGTH_MASK 0x00001ffc |
| 122 #define RDMA_REGION_0__LENGTH_GET(x) (((x) & RDMA_REGION_0__LENGTH_M
ASK) >> RDMA_REGION_0__LENGTH_LSB) |
| 123 #define RDMA_REGION_0__LENGTH_SET(x) (((x) << RDMA_REGION_0__LENGTH_
LSB) & RDMA_REGION_0__LENGTH_MASK) |
| 124 #define RDMA_REGION_0__INDI_MSB 1 |
| 125 #define RDMA_REGION_0__INDI_LSB 1 |
| 126 #define RDMA_REGION_0__INDI_MASK 0x00000002 |
| 127 #define RDMA_REGION_0__INDI_GET(x) (((x) & RDMA_REGION_0__INDI_MAS
K) >> RDMA_REGION_0__INDI_LSB) |
| 128 #define RDMA_REGION_0__INDI_SET(x) (((x) << RDMA_REGION_0__INDI_LS
B) & RDMA_REGION_0__INDI_MASK) |
| 129 #define RDMA_REGION_0__NEXT_MSB 0 |
| 130 #define RDMA_REGION_0__NEXT_LSB 0 |
| 131 #define RDMA_REGION_0__NEXT_MASK 0x00000001 |
| 132 #define RDMA_REGION_0__NEXT_GET(x) (((x) & RDMA_REGION_0__NEXT_MAS
K) >> RDMA_REGION_0__NEXT_LSB) |
| 133 #define RDMA_REGION_0__NEXT_SET(x) (((x) << RDMA_REGION_0__NEXT_LS
B) & RDMA_REGION_0__NEXT_MASK) |
| 134 |
| 135 #define RDMA_REGION_1__ADDRESS 0x00000024 |
| 136 #define RDMA_REGION_1__OFFSET 0x00000024 |
| 137 #define RDMA_REGION_1__ADDR_MSB 31 |
| 138 #define RDMA_REGION_1__ADDR_LSB 13 |
| 139 #define RDMA_REGION_1__ADDR_MASK 0xffffe000 |
| 140 #define RDMA_REGION_1__ADDR_GET(x) (((x) & RDMA_REGION_1__ADDR_MAS
K) >> RDMA_REGION_1__ADDR_LSB) |
| 141 #define RDMA_REGION_1__ADDR_SET(x) (((x) << RDMA_REGION_1__ADDR_LS
B) & RDMA_REGION_1__ADDR_MASK) |
| 142 #define RDMA_REGION_1__LENGTH_MSB 12 |
| 143 #define RDMA_REGION_1__LENGTH_LSB 2 |
| 144 #define RDMA_REGION_1__LENGTH_MASK 0x00001ffc |
| 145 #define RDMA_REGION_1__LENGTH_GET(x) (((x) & RDMA_REGION_1__LENGTH_M
ASK) >> RDMA_REGION_1__LENGTH_LSB) |
| 146 #define RDMA_REGION_1__LENGTH_SET(x) (((x) << RDMA_REGION_1__LENGTH_
LSB) & RDMA_REGION_1__LENGTH_MASK) |
| 147 #define RDMA_REGION_1__INDI_MSB 1 |
| 148 #define RDMA_REGION_1__INDI_LSB 1 |
| 149 #define RDMA_REGION_1__INDI_MASK 0x00000002 |
| 150 #define RDMA_REGION_1__INDI_GET(x) (((x) & RDMA_REGION_1__INDI_MAS
K) >> RDMA_REGION_1__INDI_LSB) |
| 151 #define RDMA_REGION_1__INDI_SET(x) (((x) << RDMA_REGION_1__INDI_LS
B) & RDMA_REGION_1__INDI_MASK) |
| 152 #define RDMA_REGION_1__NEXT_MSB 0 |
| 153 #define RDMA_REGION_1__NEXT_LSB 0 |
| 154 #define RDMA_REGION_1__NEXT_MASK 0x00000001 |
| 155 #define RDMA_REGION_1__NEXT_GET(x) (((x) & RDMA_REGION_1__NEXT_MAS
K) >> RDMA_REGION_1__NEXT_LSB) |
| 156 #define RDMA_REGION_1__NEXT_SET(x) (((x) << RDMA_REGION_1__NEXT_LS
B) & RDMA_REGION_1__NEXT_MASK) |
| 157 |
| 158 #define RDMA_REGION_2__ADDRESS 0x00000028 |
| 159 #define RDMA_REGION_2__OFFSET 0x00000028 |
| 160 #define RDMA_REGION_2__ADDR_MSB 31 |
| 161 #define RDMA_REGION_2__ADDR_LSB 13 |
| 162 #define RDMA_REGION_2__ADDR_MASK 0xffffe000 |
| 163 #define RDMA_REGION_2__ADDR_GET(x) (((x) & RDMA_REGION_2__ADDR_MAS
K) >> RDMA_REGION_2__ADDR_LSB) |
| 164 #define RDMA_REGION_2__ADDR_SET(x) (((x) << RDMA_REGION_2__ADDR_LS
B) & RDMA_REGION_2__ADDR_MASK) |
| 165 #define RDMA_REGION_2__LENGTH_MSB 12 |
| 166 #define RDMA_REGION_2__LENGTH_LSB 2 |
| 167 #define RDMA_REGION_2__LENGTH_MASK 0x00001ffc |
| 168 #define RDMA_REGION_2__LENGTH_GET(x) (((x) & RDMA_REGION_2__LENGTH_M
ASK) >> RDMA_REGION_2__LENGTH_LSB) |
| 169 #define RDMA_REGION_2__LENGTH_SET(x) (((x) << RDMA_REGION_2__LENGTH_
LSB) & RDMA_REGION_2__LENGTH_MASK) |
| 170 #define RDMA_REGION_2__INDI_MSB 1 |
| 171 #define RDMA_REGION_2__INDI_LSB 1 |
| 172 #define RDMA_REGION_2__INDI_MASK 0x00000002 |
| 173 #define RDMA_REGION_2__INDI_GET(x) (((x) & RDMA_REGION_2__INDI_MAS
K) >> RDMA_REGION_2__INDI_LSB) |
| 174 #define RDMA_REGION_2__INDI_SET(x) (((x) << RDMA_REGION_2__INDI_LS
B) & RDMA_REGION_2__INDI_MASK) |
| 175 #define RDMA_REGION_2__NEXT_MSB 0 |
| 176 #define RDMA_REGION_2__NEXT_LSB 0 |
| 177 #define RDMA_REGION_2__NEXT_MASK 0x00000001 |
| 178 #define RDMA_REGION_2__NEXT_GET(x) (((x) & RDMA_REGION_2__NEXT_MAS
K) >> RDMA_REGION_2__NEXT_LSB) |
| 179 #define RDMA_REGION_2__NEXT_SET(x) (((x) << RDMA_REGION_2__NEXT_LS
B) & RDMA_REGION_2__NEXT_MASK) |
| 180 |
| 181 #define RDMA_REGION_3__ADDRESS 0x0000002c |
| 182 #define RDMA_REGION_3__OFFSET 0x0000002c |
| 183 #define RDMA_REGION_3__ADDR_MSB 31 |
| 184 #define RDMA_REGION_3__ADDR_LSB 13 |
| 185 #define RDMA_REGION_3__ADDR_MASK 0xffffe000 |
| 186 #define RDMA_REGION_3__ADDR_GET(x) (((x) & RDMA_REGION_3__ADDR_MAS
K) >> RDMA_REGION_3__ADDR_LSB) |
| 187 #define RDMA_REGION_3__ADDR_SET(x) (((x) << RDMA_REGION_3__ADDR_LS
B) & RDMA_REGION_3__ADDR_MASK) |
| 188 #define RDMA_REGION_3__LENGTH_MSB 12 |
| 189 #define RDMA_REGION_3__LENGTH_LSB 2 |
| 190 #define RDMA_REGION_3__LENGTH_MASK 0x00001ffc |
| 191 #define RDMA_REGION_3__LENGTH_GET(x) (((x) & RDMA_REGION_3__LENGTH_M
ASK) >> RDMA_REGION_3__LENGTH_LSB) |
| 192 #define RDMA_REGION_3__LENGTH_SET(x) (((x) << RDMA_REGION_3__LENGTH_
LSB) & RDMA_REGION_3__LENGTH_MASK) |
| 193 #define RDMA_REGION_3__INDI_MSB 1 |
| 194 #define RDMA_REGION_3__INDI_LSB 1 |
| 195 #define RDMA_REGION_3__INDI_MASK 0x00000002 |
| 196 #define RDMA_REGION_3__INDI_GET(x) (((x) & RDMA_REGION_3__INDI_MAS
K) >> RDMA_REGION_3__INDI_LSB) |
| 197 #define RDMA_REGION_3__INDI_SET(x) (((x) << RDMA_REGION_3__INDI_LS
B) & RDMA_REGION_3__INDI_MASK) |
| 198 #define RDMA_REGION_3__NEXT_MSB 0 |
| 199 #define RDMA_REGION_3__NEXT_LSB 0 |
| 200 #define RDMA_REGION_3__NEXT_MASK 0x00000001 |
| 201 #define RDMA_REGION_3__NEXT_GET(x) (((x) & RDMA_REGION_3__NEXT_MAS
K) >> RDMA_REGION_3__NEXT_LSB) |
| 202 #define RDMA_REGION_3__NEXT_SET(x) (((x) << RDMA_REGION_3__NEXT_LS
B) & RDMA_REGION_3__NEXT_MASK) |
| 203 |
| 204 #define RDMA_REGION_4__ADDRESS 0x00000030 |
| 205 #define RDMA_REGION_4__OFFSET 0x00000030 |
| 206 #define RDMA_REGION_4__ADDR_MSB 31 |
| 207 #define RDMA_REGION_4__ADDR_LSB 13 |
| 208 #define RDMA_REGION_4__ADDR_MASK 0xffffe000 |
| 209 #define RDMA_REGION_4__ADDR_GET(x) (((x) & RDMA_REGION_4__ADDR_MAS
K) >> RDMA_REGION_4__ADDR_LSB) |
| 210 #define RDMA_REGION_4__ADDR_SET(x) (((x) << RDMA_REGION_4__ADDR_LS
B) & RDMA_REGION_4__ADDR_MASK) |
| 211 #define RDMA_REGION_4__LENGTH_MSB 12 |
| 212 #define RDMA_REGION_4__LENGTH_LSB 2 |
| 213 #define RDMA_REGION_4__LENGTH_MASK 0x00001ffc |
| 214 #define RDMA_REGION_4__LENGTH_GET(x) (((x) & RDMA_REGION_4__LENGTH_M
ASK) >> RDMA_REGION_4__LENGTH_LSB) |
| 215 #define RDMA_REGION_4__LENGTH_SET(x) (((x) << RDMA_REGION_4__LENGTH_
LSB) & RDMA_REGION_4__LENGTH_MASK) |
| 216 #define RDMA_REGION_4__INDI_MSB 1 |
| 217 #define RDMA_REGION_4__INDI_LSB 1 |
| 218 #define RDMA_REGION_4__INDI_MASK 0x00000002 |
| 219 #define RDMA_REGION_4__INDI_GET(x) (((x) & RDMA_REGION_4__INDI_MAS
K) >> RDMA_REGION_4__INDI_LSB) |
| 220 #define RDMA_REGION_4__INDI_SET(x) (((x) << RDMA_REGION_4__INDI_LS
B) & RDMA_REGION_4__INDI_MASK) |
| 221 #define RDMA_REGION_4__NEXT_MSB 0 |
| 222 #define RDMA_REGION_4__NEXT_LSB 0 |
| 223 #define RDMA_REGION_4__NEXT_MASK 0x00000001 |
| 224 #define RDMA_REGION_4__NEXT_GET(x) (((x) & RDMA_REGION_4__NEXT_MAS
K) >> RDMA_REGION_4__NEXT_LSB) |
| 225 #define RDMA_REGION_4__NEXT_SET(x) (((x) << RDMA_REGION_4__NEXT_LS
B) & RDMA_REGION_4__NEXT_MASK) |
| 226 |
| 227 #define RDMA_REGION_5__ADDRESS 0x00000034 |
| 228 #define RDMA_REGION_5__OFFSET 0x00000034 |
| 229 #define RDMA_REGION_5__ADDR_MSB 31 |
| 230 #define RDMA_REGION_5__ADDR_LSB 13 |
| 231 #define RDMA_REGION_5__ADDR_MASK 0xffffe000 |
| 232 #define RDMA_REGION_5__ADDR_GET(x) (((x) & RDMA_REGION_5__ADDR_MAS
K) >> RDMA_REGION_5__ADDR_LSB) |
| 233 #define RDMA_REGION_5__ADDR_SET(x) (((x) << RDMA_REGION_5__ADDR_LS
B) & RDMA_REGION_5__ADDR_MASK) |
| 234 #define RDMA_REGION_5__LENGTH_MSB 12 |
| 235 #define RDMA_REGION_5__LENGTH_LSB 2 |
| 236 #define RDMA_REGION_5__LENGTH_MASK 0x00001ffc |
| 237 #define RDMA_REGION_5__LENGTH_GET(x) (((x) & RDMA_REGION_5__LENGTH_M
ASK) >> RDMA_REGION_5__LENGTH_LSB) |
| 238 #define RDMA_REGION_5__LENGTH_SET(x) (((x) << RDMA_REGION_5__LENGTH_
LSB) & RDMA_REGION_5__LENGTH_MASK) |
| 239 #define RDMA_REGION_5__INDI_MSB 1 |
| 240 #define RDMA_REGION_5__INDI_LSB 1 |
| 241 #define RDMA_REGION_5__INDI_MASK 0x00000002 |
| 242 #define RDMA_REGION_5__INDI_GET(x) (((x) & RDMA_REGION_5__INDI_MAS
K) >> RDMA_REGION_5__INDI_LSB) |
| 243 #define RDMA_REGION_5__INDI_SET(x) (((x) << RDMA_REGION_5__INDI_LS
B) & RDMA_REGION_5__INDI_MASK) |
| 244 #define RDMA_REGION_5__NEXT_MSB 0 |
| 245 #define RDMA_REGION_5__NEXT_LSB 0 |
| 246 #define RDMA_REGION_5__NEXT_MASK 0x00000001 |
| 247 #define RDMA_REGION_5__NEXT_GET(x) (((x) & RDMA_REGION_5__NEXT_MAS
K) >> RDMA_REGION_5__NEXT_LSB) |
| 248 #define RDMA_REGION_5__NEXT_SET(x) (((x) << RDMA_REGION_5__NEXT_LS
B) & RDMA_REGION_5__NEXT_MASK) |
| 249 |
| 250 #define RDMA_REGION_6__ADDRESS 0x00000038 |
| 251 #define RDMA_REGION_6__OFFSET 0x00000038 |
| 252 #define RDMA_REGION_6__ADDR_MSB 31 |
| 253 #define RDMA_REGION_6__ADDR_LSB 13 |
| 254 #define RDMA_REGION_6__ADDR_MASK 0xffffe000 |
| 255 #define RDMA_REGION_6__ADDR_GET(x) (((x) & RDMA_REGION_6__ADDR_MAS
K) >> RDMA_REGION_6__ADDR_LSB) |
| 256 #define RDMA_REGION_6__ADDR_SET(x) (((x) << RDMA_REGION_6__ADDR_LS
B) & RDMA_REGION_6__ADDR_MASK) |
| 257 #define RDMA_REGION_6__LENGTH_MSB 12 |
| 258 #define RDMA_REGION_6__LENGTH_LSB 2 |
| 259 #define RDMA_REGION_6__LENGTH_MASK 0x00001ffc |
| 260 #define RDMA_REGION_6__LENGTH_GET(x) (((x) & RDMA_REGION_6__LENGTH_M
ASK) >> RDMA_REGION_6__LENGTH_LSB) |
| 261 #define RDMA_REGION_6__LENGTH_SET(x) (((x) << RDMA_REGION_6__LENGTH_
LSB) & RDMA_REGION_6__LENGTH_MASK) |
| 262 #define RDMA_REGION_6__INDI_MSB 1 |
| 263 #define RDMA_REGION_6__INDI_LSB 1 |
| 264 #define RDMA_REGION_6__INDI_MASK 0x00000002 |
| 265 #define RDMA_REGION_6__INDI_GET(x) (((x) & RDMA_REGION_6__INDI_MAS
K) >> RDMA_REGION_6__INDI_LSB) |
| 266 #define RDMA_REGION_6__INDI_SET(x) (((x) << RDMA_REGION_6__INDI_LS
B) & RDMA_REGION_6__INDI_MASK) |
| 267 #define RDMA_REGION_6__NEXT_MSB 0 |
| 268 #define RDMA_REGION_6__NEXT_LSB 0 |
| 269 #define RDMA_REGION_6__NEXT_MASK 0x00000001 |
| 270 #define RDMA_REGION_6__NEXT_GET(x) (((x) & RDMA_REGION_6__NEXT_MAS
K) >> RDMA_REGION_6__NEXT_LSB) |
| 271 #define RDMA_REGION_6__NEXT_SET(x) (((x) << RDMA_REGION_6__NEXT_LS
B) & RDMA_REGION_6__NEXT_MASK) |
| 272 |
| 273 #define RDMA_REGION_7__ADDRESS 0x0000003c |
| 274 #define RDMA_REGION_7__OFFSET 0x0000003c |
| 275 #define RDMA_REGION_7__ADDR_MSB 31 |
| 276 #define RDMA_REGION_7__ADDR_LSB 13 |
| 277 #define RDMA_REGION_7__ADDR_MASK 0xffffe000 |
| 278 #define RDMA_REGION_7__ADDR_GET(x) (((x) & RDMA_REGION_7__ADDR_MAS
K) >> RDMA_REGION_7__ADDR_LSB) |
| 279 #define RDMA_REGION_7__ADDR_SET(x) (((x) << RDMA_REGION_7__ADDR_LS
B) & RDMA_REGION_7__ADDR_MASK) |
| 280 #define RDMA_REGION_7__LENGTH_MSB 12 |
| 281 #define RDMA_REGION_7__LENGTH_LSB 2 |
| 282 #define RDMA_REGION_7__LENGTH_MASK 0x00001ffc |
| 283 #define RDMA_REGION_7__LENGTH_GET(x) (((x) & RDMA_REGION_7__LENGTH_M
ASK) >> RDMA_REGION_7__LENGTH_LSB) |
| 284 #define RDMA_REGION_7__LENGTH_SET(x) (((x) << RDMA_REGION_7__LENGTH_
LSB) & RDMA_REGION_7__LENGTH_MASK) |
| 285 #define RDMA_REGION_7__INDI_MSB 1 |
| 286 #define RDMA_REGION_7__INDI_LSB 1 |
| 287 #define RDMA_REGION_7__INDI_MASK 0x00000002 |
| 288 #define RDMA_REGION_7__INDI_GET(x) (((x) & RDMA_REGION_7__INDI_MAS
K) >> RDMA_REGION_7__INDI_LSB) |
| 289 #define RDMA_REGION_7__INDI_SET(x) (((x) << RDMA_REGION_7__INDI_LS
B) & RDMA_REGION_7__INDI_MASK) |
| 290 #define RDMA_REGION_7__NEXT_MSB 0 |
| 291 #define RDMA_REGION_7__NEXT_LSB 0 |
| 292 #define RDMA_REGION_7__NEXT_MASK 0x00000001 |
| 293 #define RDMA_REGION_7__NEXT_GET(x) (((x) & RDMA_REGION_7__NEXT_MAS
K) >> RDMA_REGION_7__NEXT_LSB) |
| 294 #define RDMA_REGION_7__NEXT_SET(x) (((x) << RDMA_REGION_7__NEXT_LS
B) & RDMA_REGION_7__NEXT_MASK) |
| 295 |
| 296 #define RDMA_REGION_8__ADDRESS 0x00000040 |
| 297 #define RDMA_REGION_8__OFFSET 0x00000040 |
| 298 #define RDMA_REGION_8__ADDR_MSB 31 |
| 299 #define RDMA_REGION_8__ADDR_LSB 13 |
| 300 #define RDMA_REGION_8__ADDR_MASK 0xffffe000 |
| 301 #define RDMA_REGION_8__ADDR_GET(x) (((x) & RDMA_REGION_8__ADDR_MAS
K) >> RDMA_REGION_8__ADDR_LSB) |
| 302 #define RDMA_REGION_8__ADDR_SET(x) (((x) << RDMA_REGION_8__ADDR_LS
B) & RDMA_REGION_8__ADDR_MASK) |
| 303 #define RDMA_REGION_8__LENGTH_MSB 12 |
| 304 #define RDMA_REGION_8__LENGTH_LSB 2 |
| 305 #define RDMA_REGION_8__LENGTH_MASK 0x00001ffc |
| 306 #define RDMA_REGION_8__LENGTH_GET(x) (((x) & RDMA_REGION_8__LENGTH_M
ASK) >> RDMA_REGION_8__LENGTH_LSB) |
| 307 #define RDMA_REGION_8__LENGTH_SET(x) (((x) << RDMA_REGION_8__LENGTH_
LSB) & RDMA_REGION_8__LENGTH_MASK) |
| 308 #define RDMA_REGION_8__INDI_MSB 1 |
| 309 #define RDMA_REGION_8__INDI_LSB 1 |
| 310 #define RDMA_REGION_8__INDI_MASK 0x00000002 |
| 311 #define RDMA_REGION_8__INDI_GET(x) (((x) & RDMA_REGION_8__INDI_MAS
K) >> RDMA_REGION_8__INDI_LSB) |
| 312 #define RDMA_REGION_8__INDI_SET(x) (((x) << RDMA_REGION_8__INDI_LS
B) & RDMA_REGION_8__INDI_MASK) |
| 313 #define RDMA_REGION_8__NEXT_MSB 0 |
| 314 #define RDMA_REGION_8__NEXT_LSB 0 |
| 315 #define RDMA_REGION_8__NEXT_MASK 0x00000001 |
| 316 #define RDMA_REGION_8__NEXT_GET(x) (((x) & RDMA_REGION_8__NEXT_MAS
K) >> RDMA_REGION_8__NEXT_LSB) |
| 317 #define RDMA_REGION_8__NEXT_SET(x) (((x) << RDMA_REGION_8__NEXT_LS
B) & RDMA_REGION_8__NEXT_MASK) |
| 318 |
| 319 #define RDMA_REGION_9__ADDRESS 0x00000044 |
| 320 #define RDMA_REGION_9__OFFSET 0x00000044 |
| 321 #define RDMA_REGION_9__ADDR_MSB 31 |
| 322 #define RDMA_REGION_9__ADDR_LSB 13 |
| 323 #define RDMA_REGION_9__ADDR_MASK 0xffffe000 |
| 324 #define RDMA_REGION_9__ADDR_GET(x) (((x) & RDMA_REGION_9__ADDR_MAS
K) >> RDMA_REGION_9__ADDR_LSB) |
| 325 #define RDMA_REGION_9__ADDR_SET(x) (((x) << RDMA_REGION_9__ADDR_LS
B) & RDMA_REGION_9__ADDR_MASK) |
| 326 #define RDMA_REGION_9__LENGTH_MSB 12 |
| 327 #define RDMA_REGION_9__LENGTH_LSB 2 |
| 328 #define RDMA_REGION_9__LENGTH_MASK 0x00001ffc |
| 329 #define RDMA_REGION_9__LENGTH_GET(x) (((x) & RDMA_REGION_9__LENGTH_M
ASK) >> RDMA_REGION_9__LENGTH_LSB) |
| 330 #define RDMA_REGION_9__LENGTH_SET(x) (((x) << RDMA_REGION_9__LENGTH_
LSB) & RDMA_REGION_9__LENGTH_MASK) |
| 331 #define RDMA_REGION_9__INDI_MSB 1 |
| 332 #define RDMA_REGION_9__INDI_LSB 1 |
| 333 #define RDMA_REGION_9__INDI_MASK 0x00000002 |
| 334 #define RDMA_REGION_9__INDI_GET(x) (((x) & RDMA_REGION_9__INDI_MAS
K) >> RDMA_REGION_9__INDI_LSB) |
| 335 #define RDMA_REGION_9__INDI_SET(x) (((x) << RDMA_REGION_9__INDI_LS
B) & RDMA_REGION_9__INDI_MASK) |
| 336 #define RDMA_REGION_9__NEXT_MSB 0 |
| 337 #define RDMA_REGION_9__NEXT_LSB 0 |
| 338 #define RDMA_REGION_9__NEXT_MASK 0x00000001 |
| 339 #define RDMA_REGION_9__NEXT_GET(x) (((x) & RDMA_REGION_9__NEXT_MAS
K) >> RDMA_REGION_9__NEXT_LSB) |
| 340 #define RDMA_REGION_9__NEXT_SET(x) (((x) << RDMA_REGION_9__NEXT_LS
B) & RDMA_REGION_9__NEXT_MASK) |
| 341 |
| 342 #define RDMA_REGION_10__ADDRESS 0x00000048 |
| 343 #define RDMA_REGION_10__OFFSET 0x00000048 |
| 344 #define RDMA_REGION_10__ADDR_MSB 31 |
| 345 #define RDMA_REGION_10__ADDR_LSB 13 |
| 346 #define RDMA_REGION_10__ADDR_MASK 0xffffe000 |
| 347 #define RDMA_REGION_10__ADDR_GET(x) (((x) & RDMA_REGION_10__ADDR_MA
SK) >> RDMA_REGION_10__ADDR_LSB) |
| 348 #define RDMA_REGION_10__ADDR_SET(x) (((x) << RDMA_REGION_10__ADDR_L
SB) & RDMA_REGION_10__ADDR_MASK) |
| 349 #define RDMA_REGION_10__LENGTH_MSB 12 |
| 350 #define RDMA_REGION_10__LENGTH_LSB 2 |
| 351 #define RDMA_REGION_10__LENGTH_MASK 0x00001ffc |
| 352 #define RDMA_REGION_10__LENGTH_GET(x) (((x) & RDMA_REGION_10__LENGTH_
MASK) >> RDMA_REGION_10__LENGTH_LSB) |
| 353 #define RDMA_REGION_10__LENGTH_SET(x) (((x) << RDMA_REGION_10__LENGTH
_LSB) & RDMA_REGION_10__LENGTH_MASK) |
| 354 #define RDMA_REGION_10__INDI_MSB 1 |
| 355 #define RDMA_REGION_10__INDI_LSB 1 |
| 356 #define RDMA_REGION_10__INDI_MASK 0x00000002 |
| 357 #define RDMA_REGION_10__INDI_GET(x) (((x) & RDMA_REGION_10__INDI_MA
SK) >> RDMA_REGION_10__INDI_LSB) |
| 358 #define RDMA_REGION_10__INDI_SET(x) (((x) << RDMA_REGION_10__INDI_L
SB) & RDMA_REGION_10__INDI_MASK) |
| 359 #define RDMA_REGION_10__NEXT_MSB 0 |
| 360 #define RDMA_REGION_10__NEXT_LSB 0 |
| 361 #define RDMA_REGION_10__NEXT_MASK 0x00000001 |
| 362 #define RDMA_REGION_10__NEXT_GET(x) (((x) & RDMA_REGION_10__NEXT_MA
SK) >> RDMA_REGION_10__NEXT_LSB) |
| 363 #define RDMA_REGION_10__NEXT_SET(x) (((x) << RDMA_REGION_10__NEXT_L
SB) & RDMA_REGION_10__NEXT_MASK) |
| 364 |
| 365 #define RDMA_REGION_11__ADDRESS 0x0000004c |
| 366 #define RDMA_REGION_11__OFFSET 0x0000004c |
| 367 #define RDMA_REGION_11__ADDR_MSB 31 |
| 368 #define RDMA_REGION_11__ADDR_LSB 13 |
| 369 #define RDMA_REGION_11__ADDR_MASK 0xffffe000 |
| 370 #define RDMA_REGION_11__ADDR_GET(x) (((x) & RDMA_REGION_11__ADDR_MA
SK) >> RDMA_REGION_11__ADDR_LSB) |
| 371 #define RDMA_REGION_11__ADDR_SET(x) (((x) << RDMA_REGION_11__ADDR_L
SB) & RDMA_REGION_11__ADDR_MASK) |
| 372 #define RDMA_REGION_11__LENGTH_MSB 12 |
| 373 #define RDMA_REGION_11__LENGTH_LSB 2 |
| 374 #define RDMA_REGION_11__LENGTH_MASK 0x00001ffc |
| 375 #define RDMA_REGION_11__LENGTH_GET(x) (((x) & RDMA_REGION_11__LENGTH_
MASK) >> RDMA_REGION_11__LENGTH_LSB) |
| 376 #define RDMA_REGION_11__LENGTH_SET(x) (((x) << RDMA_REGION_11__LENGTH
_LSB) & RDMA_REGION_11__LENGTH_MASK) |
| 377 #define RDMA_REGION_11__INDI_MSB 1 |
| 378 #define RDMA_REGION_11__INDI_LSB 1 |
| 379 #define RDMA_REGION_11__INDI_MASK 0x00000002 |
| 380 #define RDMA_REGION_11__INDI_GET(x) (((x) & RDMA_REGION_11__INDI_MA
SK) >> RDMA_REGION_11__INDI_LSB) |
| 381 #define RDMA_REGION_11__INDI_SET(x) (((x) << RDMA_REGION_11__INDI_L
SB) & RDMA_REGION_11__INDI_MASK) |
| 382 #define RDMA_REGION_11__NEXT_MSB 0 |
| 383 #define RDMA_REGION_11__NEXT_LSB 0 |
| 384 #define RDMA_REGION_11__NEXT_MASK 0x00000001 |
| 385 #define RDMA_REGION_11__NEXT_GET(x) (((x) & RDMA_REGION_11__NEXT_MA
SK) >> RDMA_REGION_11__NEXT_LSB) |
| 386 #define RDMA_REGION_11__NEXT_SET(x) (((x) << RDMA_REGION_11__NEXT_L
SB) & RDMA_REGION_11__NEXT_MASK) |
| 387 |
| 388 #define RDMA_REGION_12__ADDRESS 0x00000050 |
| 389 #define RDMA_REGION_12__OFFSET 0x00000050 |
| 390 #define RDMA_REGION_12__ADDR_MSB 31 |
| 391 #define RDMA_REGION_12__ADDR_LSB 13 |
| 392 #define RDMA_REGION_12__ADDR_MASK 0xffffe000 |
| 393 #define RDMA_REGION_12__ADDR_GET(x) (((x) & RDMA_REGION_12__ADDR_MA
SK) >> RDMA_REGION_12__ADDR_LSB) |
| 394 #define RDMA_REGION_12__ADDR_SET(x) (((x) << RDMA_REGION_12__ADDR_L
SB) & RDMA_REGION_12__ADDR_MASK) |
| 395 #define RDMA_REGION_12__LENGTH_MSB 12 |
| 396 #define RDMA_REGION_12__LENGTH_LSB 2 |
| 397 #define RDMA_REGION_12__LENGTH_MASK 0x00001ffc |
| 398 #define RDMA_REGION_12__LENGTH_GET(x) (((x) & RDMA_REGION_12__LENGTH_
MASK) >> RDMA_REGION_12__LENGTH_LSB) |
| 399 #define RDMA_REGION_12__LENGTH_SET(x) (((x) << RDMA_REGION_12__LENGTH
_LSB) & RDMA_REGION_12__LENGTH_MASK) |
| 400 #define RDMA_REGION_12__INDI_MSB 1 |
| 401 #define RDMA_REGION_12__INDI_LSB 1 |
| 402 #define RDMA_REGION_12__INDI_MASK 0x00000002 |
| 403 #define RDMA_REGION_12__INDI_GET(x) (((x) & RDMA_REGION_12__INDI_MA
SK) >> RDMA_REGION_12__INDI_LSB) |
| 404 #define RDMA_REGION_12__INDI_SET(x) (((x) << RDMA_REGION_12__INDI_L
SB) & RDMA_REGION_12__INDI_MASK) |
| 405 #define RDMA_REGION_12__NEXT_MSB 0 |
| 406 #define RDMA_REGION_12__NEXT_LSB 0 |
| 407 #define RDMA_REGION_12__NEXT_MASK 0x00000001 |
| 408 #define RDMA_REGION_12__NEXT_GET(x) (((x) & RDMA_REGION_12__NEXT_MA
SK) >> RDMA_REGION_12__NEXT_LSB) |
| 409 #define RDMA_REGION_12__NEXT_SET(x) (((x) << RDMA_REGION_12__NEXT_L
SB) & RDMA_REGION_12__NEXT_MASK) |
| 410 |
| 411 #define RDMA_REGION_13__ADDRESS 0x00000054 |
| 412 #define RDMA_REGION_13__OFFSET 0x00000054 |
| 413 #define RDMA_REGION_13__ADDR_MSB 31 |
| 414 #define RDMA_REGION_13__ADDR_LSB 13 |
| 415 #define RDMA_REGION_13__ADDR_MASK 0xffffe000 |
| 416 #define RDMA_REGION_13__ADDR_GET(x) (((x) & RDMA_REGION_13__ADDR_MA
SK) >> RDMA_REGION_13__ADDR_LSB) |
| 417 #define RDMA_REGION_13__ADDR_SET(x) (((x) << RDMA_REGION_13__ADDR_L
SB) & RDMA_REGION_13__ADDR_MASK) |
| 418 #define RDMA_REGION_13__LENGTH_MSB 12 |
| 419 #define RDMA_REGION_13__LENGTH_LSB 2 |
| 420 #define RDMA_REGION_13__LENGTH_MASK 0x00001ffc |
| 421 #define RDMA_REGION_13__LENGTH_GET(x) (((x) & RDMA_REGION_13__LENGTH_
MASK) >> RDMA_REGION_13__LENGTH_LSB) |
| 422 #define RDMA_REGION_13__LENGTH_SET(x) (((x) << RDMA_REGION_13__LENGTH
_LSB) & RDMA_REGION_13__LENGTH_MASK) |
| 423 #define RDMA_REGION_13__INDI_MSB 1 |
| 424 #define RDMA_REGION_13__INDI_LSB 1 |
| 425 #define RDMA_REGION_13__INDI_MASK 0x00000002 |
| 426 #define RDMA_REGION_13__INDI_GET(x) (((x) & RDMA_REGION_13__INDI_MA
SK) >> RDMA_REGION_13__INDI_LSB) |
| 427 #define RDMA_REGION_13__INDI_SET(x) (((x) << RDMA_REGION_13__INDI_L
SB) & RDMA_REGION_13__INDI_MASK) |
| 428 #define RDMA_REGION_13__NEXT_MSB 0 |
| 429 #define RDMA_REGION_13__NEXT_LSB 0 |
| 430 #define RDMA_REGION_13__NEXT_MASK 0x00000001 |
| 431 #define RDMA_REGION_13__NEXT_GET(x) (((x) & RDMA_REGION_13__NEXT_MA
SK) >> RDMA_REGION_13__NEXT_LSB) |
| 432 #define RDMA_REGION_13__NEXT_SET(x) (((x) << RDMA_REGION_13__NEXT_L
SB) & RDMA_REGION_13__NEXT_MASK) |
| 433 |
| 434 #define RDMA_REGION_14__ADDRESS 0x00000058 |
| 435 #define RDMA_REGION_14__OFFSET 0x00000058 |
| 436 #define RDMA_REGION_14__ADDR_MSB 31 |
| 437 #define RDMA_REGION_14__ADDR_LSB 13 |
| 438 #define RDMA_REGION_14__ADDR_MASK 0xffffe000 |
| 439 #define RDMA_REGION_14__ADDR_GET(x) (((x) & RDMA_REGION_14__ADDR_MA
SK) >> RDMA_REGION_14__ADDR_LSB) |
| 440 #define RDMA_REGION_14__ADDR_SET(x) (((x) << RDMA_REGION_14__ADDR_L
SB) & RDMA_REGION_14__ADDR_MASK) |
| 441 #define RDMA_REGION_14__LENGTH_MSB 12 |
| 442 #define RDMA_REGION_14__LENGTH_LSB 2 |
| 443 #define RDMA_REGION_14__LENGTH_MASK 0x00001ffc |
| 444 #define RDMA_REGION_14__LENGTH_GET(x) (((x) & RDMA_REGION_14__LENGTH_
MASK) >> RDMA_REGION_14__LENGTH_LSB) |
| 445 #define RDMA_REGION_14__LENGTH_SET(x) (((x) << RDMA_REGION_14__LENGTH
_LSB) & RDMA_REGION_14__LENGTH_MASK) |
| 446 #define RDMA_REGION_14__INDI_MSB 1 |
| 447 #define RDMA_REGION_14__INDI_LSB 1 |
| 448 #define RDMA_REGION_14__INDI_MASK 0x00000002 |
| 449 #define RDMA_REGION_14__INDI_GET(x) (((x) & RDMA_REGION_14__INDI_MA
SK) >> RDMA_REGION_14__INDI_LSB) |
| 450 #define RDMA_REGION_14__INDI_SET(x) (((x) << RDMA_REGION_14__INDI_L
SB) & RDMA_REGION_14__INDI_MASK) |
| 451 #define RDMA_REGION_14__NEXT_MSB 0 |
| 452 #define RDMA_REGION_14__NEXT_LSB 0 |
| 453 #define RDMA_REGION_14__NEXT_MASK 0x00000001 |
| 454 #define RDMA_REGION_14__NEXT_GET(x) (((x) & RDMA_REGION_14__NEXT_MA
SK) >> RDMA_REGION_14__NEXT_LSB) |
| 455 #define RDMA_REGION_14__NEXT_SET(x) (((x) << RDMA_REGION_14__NEXT_L
SB) & RDMA_REGION_14__NEXT_MASK) |
| 456 |
| 457 #define RDMA_REGION_15__ADDRESS 0x0000005c |
| 458 #define RDMA_REGION_15__OFFSET 0x0000005c |
| 459 #define RDMA_REGION_15__ADDR_MSB 31 |
| 460 #define RDMA_REGION_15__ADDR_LSB 13 |
| 461 #define RDMA_REGION_15__ADDR_MASK 0xffffe000 |
| 462 #define RDMA_REGION_15__ADDR_GET(x) (((x) & RDMA_REGION_15__ADDR_MA
SK) >> RDMA_REGION_15__ADDR_LSB) |
| 463 #define RDMA_REGION_15__ADDR_SET(x) (((x) << RDMA_REGION_15__ADDR_L
SB) & RDMA_REGION_15__ADDR_MASK) |
| 464 #define RDMA_REGION_15__LENGTH_MSB 12 |
| 465 #define RDMA_REGION_15__LENGTH_LSB 2 |
| 466 #define RDMA_REGION_15__LENGTH_MASK 0x00001ffc |
| 467 #define RDMA_REGION_15__LENGTH_GET(x) (((x) & RDMA_REGION_15__LENGTH_
MASK) >> RDMA_REGION_15__LENGTH_LSB) |
| 468 #define RDMA_REGION_15__LENGTH_SET(x) (((x) << RDMA_REGION_15__LENGTH
_LSB) & RDMA_REGION_15__LENGTH_MASK) |
| 469 #define RDMA_REGION_15__INDI_MSB 1 |
| 470 #define RDMA_REGION_15__INDI_LSB 1 |
| 471 #define RDMA_REGION_15__INDI_MASK 0x00000002 |
| 472 #define RDMA_REGION_15__INDI_GET(x) (((x) & RDMA_REGION_15__INDI_MA
SK) >> RDMA_REGION_15__INDI_LSB) |
| 473 #define RDMA_REGION_15__INDI_SET(x) (((x) << RDMA_REGION_15__INDI_L
SB) & RDMA_REGION_15__INDI_MASK) |
| 474 #define RDMA_REGION_15__NEXT_MSB 0 |
| 475 #define RDMA_REGION_15__NEXT_LSB 0 |
| 476 #define RDMA_REGION_15__NEXT_MASK 0x00000001 |
| 477 #define RDMA_REGION_15__NEXT_GET(x) (((x) & RDMA_REGION_15__NEXT_MA
SK) >> RDMA_REGION_15__NEXT_LSB) |
| 478 #define RDMA_REGION_15__NEXT_SET(x) (((x) << RDMA_REGION_15__NEXT_L
SB) & RDMA_REGION_15__NEXT_MASK) |
| 479 |
| 480 #define DMA_STATUS_ADDRESS 0x00000060 |
| 481 #define DMA_STATUS_OFFSET 0x00000060 |
| 482 #define DMA_STATUS_ERROR_CODE_MSB 14 |
| 483 #define DMA_STATUS_ERROR_CODE_LSB 4 |
| 484 #define DMA_STATUS_ERROR_CODE_MASK 0x00007ff0 |
| 485 #define DMA_STATUS_ERROR_CODE_GET(x) (((x) & DMA_STATUS_ERROR_CODE_M
ASK) >> DMA_STATUS_ERROR_CODE_LSB) |
| 486 #define DMA_STATUS_ERROR_CODE_SET(x) (((x) << DMA_STATUS_ERROR_CODE_
LSB) & DMA_STATUS_ERROR_CODE_MASK) |
| 487 #define DMA_STATUS_ERROR_MSB 3 |
| 488 #define DMA_STATUS_ERROR_LSB 3 |
| 489 #define DMA_STATUS_ERROR_MASK 0x00000008 |
| 490 #define DMA_STATUS_ERROR_GET(x) (((x) & DMA_STATUS_ERROR_MASK)
>> DMA_STATUS_ERROR_LSB) |
| 491 #define DMA_STATUS_ERROR_SET(x) (((x) << DMA_STATUS_ERROR_LSB)
& DMA_STATUS_ERROR_MASK) |
| 492 #define DMA_STATUS_DONE_MSB 2 |
| 493 #define DMA_STATUS_DONE_LSB 2 |
| 494 #define DMA_STATUS_DONE_MASK 0x00000004 |
| 495 #define DMA_STATUS_DONE_GET(x) (((x) & DMA_STATUS_DONE_MASK) >
> DMA_STATUS_DONE_LSB) |
| 496 #define DMA_STATUS_DONE_SET(x) (((x) << DMA_STATUS_DONE_LSB) &
DMA_STATUS_DONE_MASK) |
| 497 #define DMA_STATUS_STOPPED_MSB 1 |
| 498 #define DMA_STATUS_STOPPED_LSB 1 |
| 499 #define DMA_STATUS_STOPPED_MASK 0x00000002 |
| 500 #define DMA_STATUS_STOPPED_GET(x) (((x) & DMA_STATUS_STOPPED_MASK
) >> DMA_STATUS_STOPPED_LSB) |
| 501 #define DMA_STATUS_STOPPED_SET(x) (((x) << DMA_STATUS_STOPPED_LSB
) & DMA_STATUS_STOPPED_MASK) |
| 502 #define DMA_STATUS_RUNNING_MSB 0 |
| 503 #define DMA_STATUS_RUNNING_LSB 0 |
| 504 #define DMA_STATUS_RUNNING_MASK 0x00000001 |
| 505 #define DMA_STATUS_RUNNING_GET(x) (((x) & DMA_STATUS_RUNNING_MASK
) >> DMA_STATUS_RUNNING_LSB) |
| 506 #define DMA_STATUS_RUNNING_SET(x) (((x) << DMA_STATUS_RUNNING_LSB
) & DMA_STATUS_RUNNING_MASK) |
| 507 |
| 508 #define DMA_INT_EN_ADDRESS 0x00000064 |
| 509 #define DMA_INT_EN_OFFSET 0x00000064 |
| 510 #define DMA_INT_EN_ERROR_ENA_MSB 3 |
| 511 #define DMA_INT_EN_ERROR_ENA_LSB 3 |
| 512 #define DMA_INT_EN_ERROR_ENA_MASK 0x00000008 |
| 513 #define DMA_INT_EN_ERROR_ENA_GET(x) (((x) & DMA_INT_EN_ERROR_ENA_MA
SK) >> DMA_INT_EN_ERROR_ENA_LSB) |
| 514 #define DMA_INT_EN_ERROR_ENA_SET(x) (((x) << DMA_INT_EN_ERROR_ENA_L
SB) & DMA_INT_EN_ERROR_ENA_MASK) |
| 515 #define DMA_INT_EN_DONE_ENA_MSB 2 |
| 516 #define DMA_INT_EN_DONE_ENA_LSB 2 |
| 517 #define DMA_INT_EN_DONE_ENA_MASK 0x00000004 |
| 518 #define DMA_INT_EN_DONE_ENA_GET(x) (((x) & DMA_INT_EN_DONE_ENA_MAS
K) >> DMA_INT_EN_DONE_ENA_LSB) |
| 519 #define DMA_INT_EN_DONE_ENA_SET(x) (((x) << DMA_INT_EN_DONE_ENA_LS
B) & DMA_INT_EN_DONE_ENA_MASK) |
| 520 #define DMA_INT_EN_STOPPED_ENA_MSB 1 |
| 521 #define DMA_INT_EN_STOPPED_ENA_LSB 1 |
| 522 #define DMA_INT_EN_STOPPED_ENA_MASK 0x00000002 |
| 523 #define DMA_INT_EN_STOPPED_ENA_GET(x) (((x) & DMA_INT_EN_STOPPED_ENA_
MASK) >> DMA_INT_EN_STOPPED_ENA_LSB) |
| 524 #define DMA_INT_EN_STOPPED_ENA_SET(x) (((x) << DMA_INT_EN_STOPPED_ENA
_LSB) & DMA_INT_EN_STOPPED_ENA_MASK) |
| 525 |
| 526 |
| 527 #ifndef __ASSEMBLER__ |
| 528 |
| 529 typedef struct rdma_reg_reg_s { |
| 530 volatile unsigned int dma_config; |
| 531 volatile unsigned int dma_control; |
| 532 volatile unsigned int dma_src; |
| 533 volatile unsigned int dma_dest; |
| 534 volatile unsigned int dma_length; |
| 535 volatile unsigned int vmc_base; |
| 536 volatile unsigned int indirect_reg; |
| 537 volatile unsigned int indirect_return; |
| 538 volatile unsigned int rdma_region_0_; |
| 539 volatile unsigned int rdma_region_1_; |
| 540 volatile unsigned int rdma_region_2_; |
| 541 volatile unsigned int rdma_region_3_; |
| 542 volatile unsigned int rdma_region_4_; |
| 543 volatile unsigned int rdma_region_5_; |
| 544 volatile unsigned int rdma_region_6_; |
| 545 volatile unsigned int rdma_region_7_; |
| 546 volatile unsigned int rdma_region_8_; |
| 547 volatile unsigned int rdma_region_9_; |
| 548 volatile unsigned int rdma_region_10_; |
| 549 volatile unsigned int rdma_region_11_; |
| 550 volatile unsigned int rdma_region_12_; |
| 551 volatile unsigned int rdma_region_13_; |
| 552 volatile unsigned int rdma_region_14_; |
| 553 volatile unsigned int rdma_region_15_; |
| 554 volatile unsigned int dma_status; |
| 555 volatile unsigned int dma_int_en; |
| 556 } rdma_reg_reg_t; |
| 557 |
| 558 #endif /* __ASSEMBLER__ */ |
| 559 |
| 560 #endif /* _RDMA_REG_H_ */ |
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