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| 1 // ------------------------------------------------------------------ |
| 2 // Copyright (c) 2004-2007 Atheros Corporation. All rights reserved. |
| 3 // |
| 4 // This program is free software; you can redistribute it and/or modify |
| 5 // it under the terms of the GNU General Public License version 2 as |
| 6 // published by the Free Software Foundation; |
| 7 // |
| 8 // Software distributed under the License is distributed on an "AS |
| 9 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
| 10 // implied. See the License for the specific language governing |
| 11 // rights and limitations under the License. |
| 12 // |
| 13 // |
| 14 // ------------------------------------------------------------------ |
| 15 //=================================================================== |
| 16 // Author(s): ="Atheros" |
| 17 //=================================================================== |
| 18 |
| 19 |
| 20 #ifndef _MBOX_WLAN_REG_REG_H_ |
| 21 #define _MBOX_WLAN_REG_REG_H_ |
| 22 |
| 23 #define WLAN_MBOX_FIFO_ADDRESS 0x00000000 |
| 24 #define WLAN_MBOX_FIFO_OFFSET 0x00000000 |
| 25 #define WLAN_MBOX_FIFO_DATA_MSB 19 |
| 26 #define WLAN_MBOX_FIFO_DATA_LSB 0 |
| 27 #define WLAN_MBOX_FIFO_DATA_MASK 0x000fffff |
| 28 #define WLAN_MBOX_FIFO_DATA_GET(x) (((x) & WLAN_MBOX_FIFO_DATA_MAS
K) >> WLAN_MBOX_FIFO_DATA_LSB) |
| 29 #define WLAN_MBOX_FIFO_DATA_SET(x) (((x) << WLAN_MBOX_FIFO_DATA_LS
B) & WLAN_MBOX_FIFO_DATA_MASK) |
| 30 |
| 31 #define WLAN_MBOX_FIFO_STATUS_ADDRESS 0x00000010 |
| 32 #define WLAN_MBOX_FIFO_STATUS_OFFSET 0x00000010 |
| 33 #define WLAN_MBOX_FIFO_STATUS_EMPTY_MSB 19 |
| 34 #define WLAN_MBOX_FIFO_STATUS_EMPTY_LSB 16 |
| 35 #define WLAN_MBOX_FIFO_STATUS_EMPTY_MASK 0x000f0000 |
| 36 #define WLAN_MBOX_FIFO_STATUS_EMPTY_GET(x) (((x) & WLAN_MBOX_FIFO_STATUS_E
MPTY_MASK) >> WLAN_MBOX_FIFO_STATUS_EMPTY_LSB) |
| 37 #define WLAN_MBOX_FIFO_STATUS_EMPTY_SET(x) (((x) << WLAN_MBOX_FIFO_STATUS_
EMPTY_LSB) & WLAN_MBOX_FIFO_STATUS_EMPTY_MASK) |
| 38 #define WLAN_MBOX_FIFO_STATUS_FULL_MSB 15 |
| 39 #define WLAN_MBOX_FIFO_STATUS_FULL_LSB 12 |
| 40 #define WLAN_MBOX_FIFO_STATUS_FULL_MASK 0x0000f000 |
| 41 #define WLAN_MBOX_FIFO_STATUS_FULL_GET(x) (((x) & WLAN_MBOX_FIFO_STATUS_F
ULL_MASK) >> WLAN_MBOX_FIFO_STATUS_FULL_LSB) |
| 42 #define WLAN_MBOX_FIFO_STATUS_FULL_SET(x) (((x) << WLAN_MBOX_FIFO_STATUS_
FULL_LSB) & WLAN_MBOX_FIFO_STATUS_FULL_MASK) |
| 43 |
| 44 #define WLAN_MBOX_DMA_POLICY_ADDRESS 0x00000014 |
| 45 #define WLAN_MBOX_DMA_POLICY_OFFSET 0x00000014 |
| 46 #define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MSB 3 |
| 47 #define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_LSB 3 |
| 48 #define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MASK 0x00000008 |
| 49 #define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_TX
_QUANTUM_MASK) >> WLAN_MBOX_DMA_POLICY_TX_QUANTUM_LSB) |
| 50 #define WLAN_MBOX_DMA_POLICY_TX_QUANTUM_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_T
X_QUANTUM_LSB) & WLAN_MBOX_DMA_POLICY_TX_QUANTUM_MASK) |
| 51 #define WLAN_MBOX_DMA_POLICY_TX_ORDER_MSB 2 |
| 52 #define WLAN_MBOX_DMA_POLICY_TX_ORDER_LSB 2 |
| 53 #define WLAN_MBOX_DMA_POLICY_TX_ORDER_MASK 0x00000004 |
| 54 #define WLAN_MBOX_DMA_POLICY_TX_ORDER_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_TX
_ORDER_MASK) >> WLAN_MBOX_DMA_POLICY_TX_ORDER_LSB) |
| 55 #define WLAN_MBOX_DMA_POLICY_TX_ORDER_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_T
X_ORDER_LSB) & WLAN_MBOX_DMA_POLICY_TX_ORDER_MASK) |
| 56 #define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MSB 1 |
| 57 #define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_LSB 1 |
| 58 #define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MASK 0x00000002 |
| 59 #define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_RX
_QUANTUM_MASK) >> WLAN_MBOX_DMA_POLICY_RX_QUANTUM_LSB) |
| 60 #define WLAN_MBOX_DMA_POLICY_RX_QUANTUM_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_R
X_QUANTUM_LSB) & WLAN_MBOX_DMA_POLICY_RX_QUANTUM_MASK) |
| 61 #define WLAN_MBOX_DMA_POLICY_RX_ORDER_MSB 0 |
| 62 #define WLAN_MBOX_DMA_POLICY_RX_ORDER_LSB 0 |
| 63 #define WLAN_MBOX_DMA_POLICY_RX_ORDER_MASK 0x00000001 |
| 64 #define WLAN_MBOX_DMA_POLICY_RX_ORDER_GET(x) (((x) & WLAN_MBOX_DMA_POLICY_RX
_ORDER_MASK) >> WLAN_MBOX_DMA_POLICY_RX_ORDER_LSB) |
| 65 #define WLAN_MBOX_DMA_POLICY_RX_ORDER_SET(x) (((x) << WLAN_MBOX_DMA_POLICY_R
X_ORDER_LSB) & WLAN_MBOX_DMA_POLICY_RX_ORDER_MASK) |
| 66 |
| 67 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000018 |
| 68 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000018 |
| 69 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 70 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 71 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 72 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX0_DMA_
RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 73 #define WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX0_DMA
_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 74 |
| 75 #define WLAN_MBOX0_DMA_RX_CONTROL_ADDRESS 0x0000001c |
| 76 #define WLAN_MBOX0_DMA_RX_CONTROL_OFFSET 0x0000001c |
| 77 #define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MSB 2 |
| 78 #define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_LSB 2 |
| 79 #define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MASK 0x00000004 |
| 80 #define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX0_DMA_RX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX0_DMA_RX_CONTROL_RESUME_LSB) |
| 81 #define WLAN_MBOX0_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX0_DMA_RX_CONT
ROL_RESUME_LSB) & WLAN_MBOX0_DMA_RX_CONTROL_RESUME_MASK) |
| 82 #define WLAN_MBOX0_DMA_RX_CONTROL_START_MSB 1 |
| 83 #define WLAN_MBOX0_DMA_RX_CONTROL_START_LSB 1 |
| 84 #define WLAN_MBOX0_DMA_RX_CONTROL_START_MASK 0x00000002 |
| 85 #define WLAN_MBOX0_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX0_DMA_RX_CONTR
OL_START_MASK) >> WLAN_MBOX0_DMA_RX_CONTROL_START_LSB) |
| 86 #define WLAN_MBOX0_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX0_DMA_RX_CONT
ROL_START_LSB) & WLAN_MBOX0_DMA_RX_CONTROL_START_MASK) |
| 87 #define WLAN_MBOX0_DMA_RX_CONTROL_STOP_MSB 0 |
| 88 #define WLAN_MBOX0_DMA_RX_CONTROL_STOP_LSB 0 |
| 89 #define WLAN_MBOX0_DMA_RX_CONTROL_STOP_MASK 0x00000001 |
| 90 #define WLAN_MBOX0_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX0_DMA_RX_CONTR
OL_STOP_MASK) >> WLAN_MBOX0_DMA_RX_CONTROL_STOP_LSB) |
| 91 #define WLAN_MBOX0_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX0_DMA_RX_CONT
ROL_STOP_LSB) & WLAN_MBOX0_DMA_RX_CONTROL_STOP_MASK) |
| 92 |
| 93 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000020 |
| 94 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000020 |
| 95 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 96 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 97 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 98 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX0_DMA_
TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 99 #define WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX0_DMA
_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 100 |
| 101 #define WLAN_MBOX0_DMA_TX_CONTROL_ADDRESS 0x00000024 |
| 102 #define WLAN_MBOX0_DMA_TX_CONTROL_OFFSET 0x00000024 |
| 103 #define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MSB 2 |
| 104 #define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_LSB 2 |
| 105 #define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MASK 0x00000004 |
| 106 #define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX0_DMA_TX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX0_DMA_TX_CONTROL_RESUME_LSB) |
| 107 #define WLAN_MBOX0_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX0_DMA_TX_CONT
ROL_RESUME_LSB) & WLAN_MBOX0_DMA_TX_CONTROL_RESUME_MASK) |
| 108 #define WLAN_MBOX0_DMA_TX_CONTROL_START_MSB 1 |
| 109 #define WLAN_MBOX0_DMA_TX_CONTROL_START_LSB 1 |
| 110 #define WLAN_MBOX0_DMA_TX_CONTROL_START_MASK 0x00000002 |
| 111 #define WLAN_MBOX0_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX0_DMA_TX_CONTR
OL_START_MASK) >> WLAN_MBOX0_DMA_TX_CONTROL_START_LSB) |
| 112 #define WLAN_MBOX0_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX0_DMA_TX_CONT
ROL_START_LSB) & WLAN_MBOX0_DMA_TX_CONTROL_START_MASK) |
| 113 #define WLAN_MBOX0_DMA_TX_CONTROL_STOP_MSB 0 |
| 114 #define WLAN_MBOX0_DMA_TX_CONTROL_STOP_LSB 0 |
| 115 #define WLAN_MBOX0_DMA_TX_CONTROL_STOP_MASK 0x00000001 |
| 116 #define WLAN_MBOX0_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX0_DMA_TX_CONTR
OL_STOP_MASK) >> WLAN_MBOX0_DMA_TX_CONTROL_STOP_LSB) |
| 117 #define WLAN_MBOX0_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX0_DMA_TX_CONT
ROL_STOP_LSB) & WLAN_MBOX0_DMA_TX_CONTROL_STOP_MASK) |
| 118 |
| 119 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000028 |
| 120 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000028 |
| 121 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 122 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 123 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 124 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX1_DMA_
RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 125 #define WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX1_DMA
_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX1_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 126 |
| 127 #define WLAN_MBOX1_DMA_RX_CONTROL_ADDRESS 0x0000002c |
| 128 #define WLAN_MBOX1_DMA_RX_CONTROL_OFFSET 0x0000002c |
| 129 #define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MSB 2 |
| 130 #define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_LSB 2 |
| 131 #define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MASK 0x00000004 |
| 132 #define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX1_DMA_RX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX1_DMA_RX_CONTROL_RESUME_LSB) |
| 133 #define WLAN_MBOX1_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX1_DMA_RX_CONT
ROL_RESUME_LSB) & WLAN_MBOX1_DMA_RX_CONTROL_RESUME_MASK) |
| 134 #define WLAN_MBOX1_DMA_RX_CONTROL_START_MSB 1 |
| 135 #define WLAN_MBOX1_DMA_RX_CONTROL_START_LSB 1 |
| 136 #define WLAN_MBOX1_DMA_RX_CONTROL_START_MASK 0x00000002 |
| 137 #define WLAN_MBOX1_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX1_DMA_RX_CONTR
OL_START_MASK) >> WLAN_MBOX1_DMA_RX_CONTROL_START_LSB) |
| 138 #define WLAN_MBOX1_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX1_DMA_RX_CONT
ROL_START_LSB) & WLAN_MBOX1_DMA_RX_CONTROL_START_MASK) |
| 139 #define WLAN_MBOX1_DMA_RX_CONTROL_STOP_MSB 0 |
| 140 #define WLAN_MBOX1_DMA_RX_CONTROL_STOP_LSB 0 |
| 141 #define WLAN_MBOX1_DMA_RX_CONTROL_STOP_MASK 0x00000001 |
| 142 #define WLAN_MBOX1_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX1_DMA_RX_CONTR
OL_STOP_MASK) >> WLAN_MBOX1_DMA_RX_CONTROL_STOP_LSB) |
| 143 #define WLAN_MBOX1_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX1_DMA_RX_CONT
ROL_STOP_LSB) & WLAN_MBOX1_DMA_RX_CONTROL_STOP_MASK) |
| 144 |
| 145 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000030 |
| 146 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000030 |
| 147 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 148 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 149 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 150 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX1_DMA_
TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 151 #define WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX1_DMA
_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX1_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 152 |
| 153 #define WLAN_MBOX1_DMA_TX_CONTROL_ADDRESS 0x00000034 |
| 154 #define WLAN_MBOX1_DMA_TX_CONTROL_OFFSET 0x00000034 |
| 155 #define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MSB 2 |
| 156 #define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_LSB 2 |
| 157 #define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MASK 0x00000004 |
| 158 #define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX1_DMA_TX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX1_DMA_TX_CONTROL_RESUME_LSB) |
| 159 #define WLAN_MBOX1_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX1_DMA_TX_CONT
ROL_RESUME_LSB) & WLAN_MBOX1_DMA_TX_CONTROL_RESUME_MASK) |
| 160 #define WLAN_MBOX1_DMA_TX_CONTROL_START_MSB 1 |
| 161 #define WLAN_MBOX1_DMA_TX_CONTROL_START_LSB 1 |
| 162 #define WLAN_MBOX1_DMA_TX_CONTROL_START_MASK 0x00000002 |
| 163 #define WLAN_MBOX1_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX1_DMA_TX_CONTR
OL_START_MASK) >> WLAN_MBOX1_DMA_TX_CONTROL_START_LSB) |
| 164 #define WLAN_MBOX1_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX1_DMA_TX_CONT
ROL_START_LSB) & WLAN_MBOX1_DMA_TX_CONTROL_START_MASK) |
| 165 #define WLAN_MBOX1_DMA_TX_CONTROL_STOP_MSB 0 |
| 166 #define WLAN_MBOX1_DMA_TX_CONTROL_STOP_LSB 0 |
| 167 #define WLAN_MBOX1_DMA_TX_CONTROL_STOP_MASK 0x00000001 |
| 168 #define WLAN_MBOX1_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX1_DMA_TX_CONTR
OL_STOP_MASK) >> WLAN_MBOX1_DMA_TX_CONTROL_STOP_LSB) |
| 169 #define WLAN_MBOX1_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX1_DMA_TX_CONT
ROL_STOP_LSB) & WLAN_MBOX1_DMA_TX_CONTROL_STOP_MASK) |
| 170 |
| 171 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000038 |
| 172 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000038 |
| 173 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 174 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 175 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 176 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX2_DMA_
RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 177 #define WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX2_DMA
_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX2_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 178 |
| 179 #define WLAN_MBOX2_DMA_RX_CONTROL_ADDRESS 0x0000003c |
| 180 #define WLAN_MBOX2_DMA_RX_CONTROL_OFFSET 0x0000003c |
| 181 #define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MSB 2 |
| 182 #define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_LSB 2 |
| 183 #define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MASK 0x00000004 |
| 184 #define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX2_DMA_RX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX2_DMA_RX_CONTROL_RESUME_LSB) |
| 185 #define WLAN_MBOX2_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX2_DMA_RX_CONT
ROL_RESUME_LSB) & WLAN_MBOX2_DMA_RX_CONTROL_RESUME_MASK) |
| 186 #define WLAN_MBOX2_DMA_RX_CONTROL_START_MSB 1 |
| 187 #define WLAN_MBOX2_DMA_RX_CONTROL_START_LSB 1 |
| 188 #define WLAN_MBOX2_DMA_RX_CONTROL_START_MASK 0x00000002 |
| 189 #define WLAN_MBOX2_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX2_DMA_RX_CONTR
OL_START_MASK) >> WLAN_MBOX2_DMA_RX_CONTROL_START_LSB) |
| 190 #define WLAN_MBOX2_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX2_DMA_RX_CONT
ROL_START_LSB) & WLAN_MBOX2_DMA_RX_CONTROL_START_MASK) |
| 191 #define WLAN_MBOX2_DMA_RX_CONTROL_STOP_MSB 0 |
| 192 #define WLAN_MBOX2_DMA_RX_CONTROL_STOP_LSB 0 |
| 193 #define WLAN_MBOX2_DMA_RX_CONTROL_STOP_MASK 0x00000001 |
| 194 #define WLAN_MBOX2_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX2_DMA_RX_CONTR
OL_STOP_MASK) >> WLAN_MBOX2_DMA_RX_CONTROL_STOP_LSB) |
| 195 #define WLAN_MBOX2_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX2_DMA_RX_CONT
ROL_STOP_LSB) & WLAN_MBOX2_DMA_RX_CONTROL_STOP_MASK) |
| 196 |
| 197 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000040 |
| 198 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000040 |
| 199 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 200 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 201 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 202 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX2_DMA_
TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 203 #define WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX2_DMA
_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX2_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 204 |
| 205 #define WLAN_MBOX2_DMA_TX_CONTROL_ADDRESS 0x00000044 |
| 206 #define WLAN_MBOX2_DMA_TX_CONTROL_OFFSET 0x00000044 |
| 207 #define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MSB 2 |
| 208 #define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_LSB 2 |
| 209 #define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MASK 0x00000004 |
| 210 #define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX2_DMA_TX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX2_DMA_TX_CONTROL_RESUME_LSB) |
| 211 #define WLAN_MBOX2_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX2_DMA_TX_CONT
ROL_RESUME_LSB) & WLAN_MBOX2_DMA_TX_CONTROL_RESUME_MASK) |
| 212 #define WLAN_MBOX2_DMA_TX_CONTROL_START_MSB 1 |
| 213 #define WLAN_MBOX2_DMA_TX_CONTROL_START_LSB 1 |
| 214 #define WLAN_MBOX2_DMA_TX_CONTROL_START_MASK 0x00000002 |
| 215 #define WLAN_MBOX2_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX2_DMA_TX_CONTR
OL_START_MASK) >> WLAN_MBOX2_DMA_TX_CONTROL_START_LSB) |
| 216 #define WLAN_MBOX2_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX2_DMA_TX_CONT
ROL_START_LSB) & WLAN_MBOX2_DMA_TX_CONTROL_START_MASK) |
| 217 #define WLAN_MBOX2_DMA_TX_CONTROL_STOP_MSB 0 |
| 218 #define WLAN_MBOX2_DMA_TX_CONTROL_STOP_LSB 0 |
| 219 #define WLAN_MBOX2_DMA_TX_CONTROL_STOP_MASK 0x00000001 |
| 220 #define WLAN_MBOX2_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX2_DMA_TX_CONTR
OL_STOP_MASK) >> WLAN_MBOX2_DMA_TX_CONTROL_STOP_LSB) |
| 221 #define WLAN_MBOX2_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX2_DMA_TX_CONT
ROL_STOP_LSB) & WLAN_MBOX2_DMA_TX_CONTROL_STOP_MASK) |
| 222 |
| 223 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000048 |
| 224 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000048 |
| 225 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 226 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 227 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 228 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX3_DMA_
RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 229 #define WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX3_DMA
_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX3_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 230 |
| 231 #define WLAN_MBOX3_DMA_RX_CONTROL_ADDRESS 0x0000004c |
| 232 #define WLAN_MBOX3_DMA_RX_CONTROL_OFFSET 0x0000004c |
| 233 #define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MSB 2 |
| 234 #define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_LSB 2 |
| 235 #define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MASK 0x00000004 |
| 236 #define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX3_DMA_RX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX3_DMA_RX_CONTROL_RESUME_LSB) |
| 237 #define WLAN_MBOX3_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX3_DMA_RX_CONT
ROL_RESUME_LSB) & WLAN_MBOX3_DMA_RX_CONTROL_RESUME_MASK) |
| 238 #define WLAN_MBOX3_DMA_RX_CONTROL_START_MSB 1 |
| 239 #define WLAN_MBOX3_DMA_RX_CONTROL_START_LSB 1 |
| 240 #define WLAN_MBOX3_DMA_RX_CONTROL_START_MASK 0x00000002 |
| 241 #define WLAN_MBOX3_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_MBOX3_DMA_RX_CONTR
OL_START_MASK) >> WLAN_MBOX3_DMA_RX_CONTROL_START_LSB) |
| 242 #define WLAN_MBOX3_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_MBOX3_DMA_RX_CONT
ROL_START_LSB) & WLAN_MBOX3_DMA_RX_CONTROL_START_MASK) |
| 243 #define WLAN_MBOX3_DMA_RX_CONTROL_STOP_MSB 0 |
| 244 #define WLAN_MBOX3_DMA_RX_CONTROL_STOP_LSB 0 |
| 245 #define WLAN_MBOX3_DMA_RX_CONTROL_STOP_MASK 0x00000001 |
| 246 #define WLAN_MBOX3_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX3_DMA_RX_CONTR
OL_STOP_MASK) >> WLAN_MBOX3_DMA_RX_CONTROL_STOP_LSB) |
| 247 #define WLAN_MBOX3_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX3_DMA_RX_CONT
ROL_STOP_LSB) & WLAN_MBOX3_DMA_RX_CONTROL_STOP_MASK) |
| 248 |
| 249 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x00000050 |
| 250 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x00000050 |
| 251 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 252 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 253 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 254 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_MBOX3_DMA_
TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LS
B) |
| 255 #define WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_MBOX3_DMA
_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_MBOX3_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MAS
K) |
| 256 |
| 257 #define WLAN_MBOX3_DMA_TX_CONTROL_ADDRESS 0x00000054 |
| 258 #define WLAN_MBOX3_DMA_TX_CONTROL_OFFSET 0x00000054 |
| 259 #define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MSB 2 |
| 260 #define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_LSB 2 |
| 261 #define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MASK 0x00000004 |
| 262 #define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_MBOX3_DMA_TX_CONTR
OL_RESUME_MASK) >> WLAN_MBOX3_DMA_TX_CONTROL_RESUME_LSB) |
| 263 #define WLAN_MBOX3_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_MBOX3_DMA_TX_CONT
ROL_RESUME_LSB) & WLAN_MBOX3_DMA_TX_CONTROL_RESUME_MASK) |
| 264 #define WLAN_MBOX3_DMA_TX_CONTROL_START_MSB 1 |
| 265 #define WLAN_MBOX3_DMA_TX_CONTROL_START_LSB 1 |
| 266 #define WLAN_MBOX3_DMA_TX_CONTROL_START_MASK 0x00000002 |
| 267 #define WLAN_MBOX3_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_MBOX3_DMA_TX_CONTR
OL_START_MASK) >> WLAN_MBOX3_DMA_TX_CONTROL_START_LSB) |
| 268 #define WLAN_MBOX3_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_MBOX3_DMA_TX_CONT
ROL_START_LSB) & WLAN_MBOX3_DMA_TX_CONTROL_START_MASK) |
| 269 #define WLAN_MBOX3_DMA_TX_CONTROL_STOP_MSB 0 |
| 270 #define WLAN_MBOX3_DMA_TX_CONTROL_STOP_LSB 0 |
| 271 #define WLAN_MBOX3_DMA_TX_CONTROL_STOP_MASK 0x00000001 |
| 272 #define WLAN_MBOX3_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_MBOX3_DMA_TX_CONTR
OL_STOP_MASK) >> WLAN_MBOX3_DMA_TX_CONTROL_STOP_LSB) |
| 273 #define WLAN_MBOX3_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_MBOX3_DMA_TX_CONT
ROL_STOP_LSB) & WLAN_MBOX3_DMA_TX_CONTROL_STOP_MASK) |
| 274 |
| 275 #define WLAN_MBOX_INT_STATUS_ADDRESS 0x00000058 |
| 276 #define WLAN_MBOX_INT_STATUS_OFFSET 0x00000058 |
| 277 #define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MSB 31 |
| 278 #define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB 28 |
| 279 #define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK 0xf0000000 |
| 280 #define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_STATUS
_RX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_LSB) |
| 281 #define WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_STATU
S_RX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_STATUS_RX_DMA_COMPLETE_MASK) |
| 282 #define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB 27 |
| 283 #define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB 24 |
| 284 #define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK 0x0f000000 |
| 285 #define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_ST
ATUS_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB) |
| 286 #define WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_S
TATUS_TX_DMA_EOM_COMPLETE_LSB) & WLAN_MBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK) |
| 287 #define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MSB 23 |
| 288 #define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB 20 |
| 289 #define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK 0x00f00000 |
| 290 #define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_STATUS
_TX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_LSB) |
| 291 #define WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_STATU
S_TX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_STATUS_TX_DMA_COMPLETE_MASK) |
| 292 #define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MSB 17 |
| 293 #define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_LSB 17 |
| 294 #define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MASK 0x00020000 |
| 295 #define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & WLAN_MBOX_INT_STATUS_TX
_OVERFLOW_MASK) >> WLAN_MBOX_INT_STATUS_TX_OVERFLOW_LSB) |
| 296 #define WLAN_MBOX_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << WLAN_MBOX_INT_STATUS_T
X_OVERFLOW_LSB) & WLAN_MBOX_INT_STATUS_TX_OVERFLOW_MASK) |
| 297 #define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MSB 16 |
| 298 #define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_LSB 16 |
| 299 #define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MASK 0x00010000 |
| 300 #define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & WLAN_MBOX_INT_STATUS_RX
_UNDERFLOW_MASK) >> WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_LSB) |
| 301 #define WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << WLAN_MBOX_INT_STATUS_R
X_UNDERFLOW_LSB) & WLAN_MBOX_INT_STATUS_RX_UNDERFLOW_MASK) |
| 302 #define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MSB 15 |
| 303 #define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_LSB 12 |
| 304 #define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MASK 0x0000f000 |
| 305 #define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) (((x) & WLAN_MBOX_INT_STATUS_TX
_NOT_EMPTY_MASK) >> WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_LSB) |
| 306 #define WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) (((x) << WLAN_MBOX_INT_STATUS_T
X_NOT_EMPTY_LSB) & WLAN_MBOX_INT_STATUS_TX_NOT_EMPTY_MASK) |
| 307 #define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MSB 11 |
| 308 #define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_LSB 8 |
| 309 #define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MASK 0x00000f00 |
| 310 #define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_GET(x) (((x) & WLAN_MBOX_INT_STATUS_RX
_NOT_FULL_MASK) >> WLAN_MBOX_INT_STATUS_RX_NOT_FULL_LSB) |
| 311 #define WLAN_MBOX_INT_STATUS_RX_NOT_FULL_SET(x) (((x) << WLAN_MBOX_INT_STATUS_R
X_NOT_FULL_LSB) & WLAN_MBOX_INT_STATUS_RX_NOT_FULL_MASK) |
| 312 #define WLAN_MBOX_INT_STATUS_HOST_MSB 7 |
| 313 #define WLAN_MBOX_INT_STATUS_HOST_LSB 0 |
| 314 #define WLAN_MBOX_INT_STATUS_HOST_MASK 0x000000ff |
| 315 #define WLAN_MBOX_INT_STATUS_HOST_GET(x) (((x) & WLAN_MBOX_INT_STATUS_HO
ST_MASK) >> WLAN_MBOX_INT_STATUS_HOST_LSB) |
| 316 #define WLAN_MBOX_INT_STATUS_HOST_SET(x) (((x) << WLAN_MBOX_INT_STATUS_H
OST_LSB) & WLAN_MBOX_INT_STATUS_HOST_MASK) |
| 317 |
| 318 #define WLAN_MBOX_INT_ENABLE_ADDRESS 0x0000005c |
| 319 #define WLAN_MBOX_INT_ENABLE_OFFSET 0x0000005c |
| 320 #define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB 31 |
| 321 #define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB 28 |
| 322 #define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK 0xf0000000 |
| 323 #define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_ENABLE
_RX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB) |
| 324 #define WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_ENABL
E_RX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK) |
| 325 #define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB 27 |
| 326 #define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB 24 |
| 327 #define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK 0x0f000000 |
| 328 #define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_EN
ABLE_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB) |
| 329 #define WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_E
NABLE_TX_DMA_EOM_COMPLETE_LSB) & WLAN_MBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK) |
| 330 #define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB 23 |
| 331 #define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB 20 |
| 332 #define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK 0x00f00000 |
| 333 #define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_MBOX_INT_ENABLE
_TX_DMA_COMPLETE_MASK) >> WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB) |
| 334 #define WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_MBOX_INT_ENABL
E_TX_DMA_COMPLETE_LSB) & WLAN_MBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK) |
| 335 #define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MSB 17 |
| 336 #define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_LSB 17 |
| 337 #define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MASK 0x00020000 |
| 338 #define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_TX
_OVERFLOW_MASK) >> WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_LSB) |
| 339 #define WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_T
X_OVERFLOW_LSB) & WLAN_MBOX_INT_ENABLE_TX_OVERFLOW_MASK) |
| 340 #define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MSB 16 |
| 341 #define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_LSB 16 |
| 342 #define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MASK 0x00010000 |
| 343 #define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_RX
_UNDERFLOW_MASK) >> WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_LSB) |
| 344 #define WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_R
X_UNDERFLOW_LSB) & WLAN_MBOX_INT_ENABLE_RX_UNDERFLOW_MASK) |
| 345 #define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MSB 15 |
| 346 #define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB 12 |
| 347 #define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK 0x0000f000 |
| 348 #define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_TX
_NOT_EMPTY_MASK) >> WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_LSB) |
| 349 #define WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_T
X_NOT_EMPTY_LSB) & WLAN_MBOX_INT_ENABLE_TX_NOT_EMPTY_MASK) |
| 350 #define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MSB 11 |
| 351 #define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_LSB 8 |
| 352 #define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MASK 0x00000f00 |
| 353 #define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_RX
_NOT_FULL_MASK) >> WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_LSB) |
| 354 #define WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_R
X_NOT_FULL_LSB) & WLAN_MBOX_INT_ENABLE_RX_NOT_FULL_MASK) |
| 355 #define WLAN_MBOX_INT_ENABLE_HOST_MSB 7 |
| 356 #define WLAN_MBOX_INT_ENABLE_HOST_LSB 0 |
| 357 #define WLAN_MBOX_INT_ENABLE_HOST_MASK 0x000000ff |
| 358 #define WLAN_MBOX_INT_ENABLE_HOST_GET(x) (((x) & WLAN_MBOX_INT_ENABLE_HO
ST_MASK) >> WLAN_MBOX_INT_ENABLE_HOST_LSB) |
| 359 #define WLAN_MBOX_INT_ENABLE_HOST_SET(x) (((x) << WLAN_MBOX_INT_ENABLE_H
OST_LSB) & WLAN_MBOX_INT_ENABLE_HOST_MASK) |
| 360 |
| 361 #define WLAN_INT_HOST_ADDRESS 0x00000060 |
| 362 #define WLAN_INT_HOST_OFFSET 0x00000060 |
| 363 #define WLAN_INT_HOST_VECTOR_MSB 7 |
| 364 #define WLAN_INT_HOST_VECTOR_LSB 0 |
| 365 #define WLAN_INT_HOST_VECTOR_MASK 0x000000ff |
| 366 #define WLAN_INT_HOST_VECTOR_GET(x) (((x) & WLAN_INT_HOST_VECTOR_MA
SK) >> WLAN_INT_HOST_VECTOR_LSB) |
| 367 #define WLAN_INT_HOST_VECTOR_SET(x) (((x) << WLAN_INT_HOST_VECTOR_L
SB) & WLAN_INT_HOST_VECTOR_MASK) |
| 368 |
| 369 #define WLAN_LOCAL_COUNT_ADDRESS 0x00000080 |
| 370 #define WLAN_LOCAL_COUNT_OFFSET 0x00000080 |
| 371 #define WLAN_LOCAL_COUNT_VALUE_MSB 7 |
| 372 #define WLAN_LOCAL_COUNT_VALUE_LSB 0 |
| 373 #define WLAN_LOCAL_COUNT_VALUE_MASK 0x000000ff |
| 374 #define WLAN_LOCAL_COUNT_VALUE_GET(x) (((x) & WLAN_LOCAL_COUNT_VALUE_
MASK) >> WLAN_LOCAL_COUNT_VALUE_LSB) |
| 375 #define WLAN_LOCAL_COUNT_VALUE_SET(x) (((x) << WLAN_LOCAL_COUNT_VALUE
_LSB) & WLAN_LOCAL_COUNT_VALUE_MASK) |
| 376 |
| 377 #define WLAN_COUNT_INC_ADDRESS 0x000000a0 |
| 378 #define WLAN_COUNT_INC_OFFSET 0x000000a0 |
| 379 #define WLAN_COUNT_INC_VALUE_MSB 7 |
| 380 #define WLAN_COUNT_INC_VALUE_LSB 0 |
| 381 #define WLAN_COUNT_INC_VALUE_MASK 0x000000ff |
| 382 #define WLAN_COUNT_INC_VALUE_GET(x) (((x) & WLAN_COUNT_INC_VALUE_MA
SK) >> WLAN_COUNT_INC_VALUE_LSB) |
| 383 #define WLAN_COUNT_INC_VALUE_SET(x) (((x) << WLAN_COUNT_INC_VALUE_L
SB) & WLAN_COUNT_INC_VALUE_MASK) |
| 384 |
| 385 #define WLAN_LOCAL_SCRATCH_ADDRESS 0x000000c0 |
| 386 #define WLAN_LOCAL_SCRATCH_OFFSET 0x000000c0 |
| 387 #define WLAN_LOCAL_SCRATCH_VALUE_MSB 7 |
| 388 #define WLAN_LOCAL_SCRATCH_VALUE_LSB 0 |
| 389 #define WLAN_LOCAL_SCRATCH_VALUE_MASK 0x000000ff |
| 390 #define WLAN_LOCAL_SCRATCH_VALUE_GET(x) (((x) & WLAN_LOCAL_SCRATCH_VALU
E_MASK) >> WLAN_LOCAL_SCRATCH_VALUE_LSB) |
| 391 #define WLAN_LOCAL_SCRATCH_VALUE_SET(x) (((x) << WLAN_LOCAL_SCRATCH_VAL
UE_LSB) & WLAN_LOCAL_SCRATCH_VALUE_MASK) |
| 392 |
| 393 #define WLAN_USE_LOCAL_BUS_ADDRESS 0x000000e0 |
| 394 #define WLAN_USE_LOCAL_BUS_OFFSET 0x000000e0 |
| 395 #define WLAN_USE_LOCAL_BUS_PIN_INIT_MSB 0 |
| 396 #define WLAN_USE_LOCAL_BUS_PIN_INIT_LSB 0 |
| 397 #define WLAN_USE_LOCAL_BUS_PIN_INIT_MASK 0x00000001 |
| 398 #define WLAN_USE_LOCAL_BUS_PIN_INIT_GET(x) (((x) & WLAN_USE_LOCAL_BUS_PIN_
INIT_MASK) >> WLAN_USE_LOCAL_BUS_PIN_INIT_LSB) |
| 399 #define WLAN_USE_LOCAL_BUS_PIN_INIT_SET(x) (((x) << WLAN_USE_LOCAL_BUS_PIN
_INIT_LSB) & WLAN_USE_LOCAL_BUS_PIN_INIT_MASK) |
| 400 |
| 401 #define WLAN_SDIO_CONFIG_ADDRESS 0x000000e4 |
| 402 #define WLAN_SDIO_CONFIG_OFFSET 0x000000e4 |
| 403 #define WLAN_SDIO_CONFIG_CCCR_IOR1_MSB 0 |
| 404 #define WLAN_SDIO_CONFIG_CCCR_IOR1_LSB 0 |
| 405 #define WLAN_SDIO_CONFIG_CCCR_IOR1_MASK 0x00000001 |
| 406 #define WLAN_SDIO_CONFIG_CCCR_IOR1_GET(x) (((x) & WLAN_SDIO_CONFIG_CCCR_I
OR1_MASK) >> WLAN_SDIO_CONFIG_CCCR_IOR1_LSB) |
| 407 #define WLAN_SDIO_CONFIG_CCCR_IOR1_SET(x) (((x) << WLAN_SDIO_CONFIG_CCCR_
IOR1_LSB) & WLAN_SDIO_CONFIG_CCCR_IOR1_MASK) |
| 408 |
| 409 #define WLAN_MBOX_DEBUG_ADDRESS 0x000000e8 |
| 410 #define WLAN_MBOX_DEBUG_OFFSET 0x000000e8 |
| 411 #define WLAN_MBOX_DEBUG_SEL_MSB 2 |
| 412 #define WLAN_MBOX_DEBUG_SEL_LSB 0 |
| 413 #define WLAN_MBOX_DEBUG_SEL_MASK 0x00000007 |
| 414 #define WLAN_MBOX_DEBUG_SEL_GET(x) (((x) & WLAN_MBOX_DEBUG_SEL_MAS
K) >> WLAN_MBOX_DEBUG_SEL_LSB) |
| 415 #define WLAN_MBOX_DEBUG_SEL_SET(x) (((x) << WLAN_MBOX_DEBUG_SEL_LS
B) & WLAN_MBOX_DEBUG_SEL_MASK) |
| 416 |
| 417 #define WLAN_MBOX_FIFO_RESET_ADDRESS 0x000000ec |
| 418 #define WLAN_MBOX_FIFO_RESET_OFFSET 0x000000ec |
| 419 #define WLAN_MBOX_FIFO_RESET_INIT_MSB 0 |
| 420 #define WLAN_MBOX_FIFO_RESET_INIT_LSB 0 |
| 421 #define WLAN_MBOX_FIFO_RESET_INIT_MASK 0x00000001 |
| 422 #define WLAN_MBOX_FIFO_RESET_INIT_GET(x) (((x) & WLAN_MBOX_FIFO_RESET_IN
IT_MASK) >> WLAN_MBOX_FIFO_RESET_INIT_LSB) |
| 423 #define WLAN_MBOX_FIFO_RESET_INIT_SET(x) (((x) << WLAN_MBOX_FIFO_RESET_I
NIT_LSB) & WLAN_MBOX_FIFO_RESET_INIT_MASK) |
| 424 |
| 425 #define WLAN_MBOX_TXFIFO_POP_ADDRESS 0x000000f0 |
| 426 #define WLAN_MBOX_TXFIFO_POP_OFFSET 0x000000f0 |
| 427 #define WLAN_MBOX_TXFIFO_POP_DATA_MSB 0 |
| 428 #define WLAN_MBOX_TXFIFO_POP_DATA_LSB 0 |
| 429 #define WLAN_MBOX_TXFIFO_POP_DATA_MASK 0x00000001 |
| 430 #define WLAN_MBOX_TXFIFO_POP_DATA_GET(x) (((x) & WLAN_MBOX_TXFIFO_POP_DA
TA_MASK) >> WLAN_MBOX_TXFIFO_POP_DATA_LSB) |
| 431 #define WLAN_MBOX_TXFIFO_POP_DATA_SET(x) (((x) << WLAN_MBOX_TXFIFO_POP_D
ATA_LSB) & WLAN_MBOX_TXFIFO_POP_DATA_MASK) |
| 432 |
| 433 #define WLAN_MBOX_RXFIFO_POP_ADDRESS 0x00000100 |
| 434 #define WLAN_MBOX_RXFIFO_POP_OFFSET 0x00000100 |
| 435 #define WLAN_MBOX_RXFIFO_POP_DATA_MSB 0 |
| 436 #define WLAN_MBOX_RXFIFO_POP_DATA_LSB 0 |
| 437 #define WLAN_MBOX_RXFIFO_POP_DATA_MASK 0x00000001 |
| 438 #define WLAN_MBOX_RXFIFO_POP_DATA_GET(x) (((x) & WLAN_MBOX_RXFIFO_POP_DA
TA_MASK) >> WLAN_MBOX_RXFIFO_POP_DATA_LSB) |
| 439 #define WLAN_MBOX_RXFIFO_POP_DATA_SET(x) (((x) << WLAN_MBOX_RXFIFO_POP_D
ATA_LSB) & WLAN_MBOX_RXFIFO_POP_DATA_MASK) |
| 440 |
| 441 #define WLAN_SDIO_DEBUG_ADDRESS 0x00000110 |
| 442 #define WLAN_SDIO_DEBUG_OFFSET 0x00000110 |
| 443 #define WLAN_SDIO_DEBUG_SEL_MSB 3 |
| 444 #define WLAN_SDIO_DEBUG_SEL_LSB 0 |
| 445 #define WLAN_SDIO_DEBUG_SEL_MASK 0x0000000f |
| 446 #define WLAN_SDIO_DEBUG_SEL_GET(x) (((x) & WLAN_SDIO_DEBUG_SEL_MAS
K) >> WLAN_SDIO_DEBUG_SEL_LSB) |
| 447 #define WLAN_SDIO_DEBUG_SEL_SET(x) (((x) << WLAN_SDIO_DEBUG_SEL_LS
B) & WLAN_SDIO_DEBUG_SEL_MASK) |
| 448 |
| 449 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS 0x00000114 |
| 450 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_OFFSET 0x00000114 |
| 451 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 452 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 453 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 454 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_GMBOX0_DM
A_RX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS
_LSB) |
| 455 #define WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_GMBOX0_D
MA_RX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_GMBOX0_DMA_RX_DESCRIPTOR_BASE_ADDRESS_
MASK) |
| 456 |
| 457 #define WLAN_GMBOX0_DMA_RX_CONTROL_ADDRESS 0x00000118 |
| 458 #define WLAN_GMBOX0_DMA_RX_CONTROL_OFFSET 0x00000118 |
| 459 #define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MSB 2 |
| 460 #define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_LSB 2 |
| 461 #define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MASK 0x00000004 |
| 462 #define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_CONT
ROL_RESUME_MASK) >> WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_LSB) |
| 463 #define WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_CON
TROL_RESUME_LSB) & WLAN_GMBOX0_DMA_RX_CONTROL_RESUME_MASK) |
| 464 #define WLAN_GMBOX0_DMA_RX_CONTROL_START_MSB 1 |
| 465 #define WLAN_GMBOX0_DMA_RX_CONTROL_START_LSB 1 |
| 466 #define WLAN_GMBOX0_DMA_RX_CONTROL_START_MASK 0x00000002 |
| 467 #define WLAN_GMBOX0_DMA_RX_CONTROL_START_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_CONT
ROL_START_MASK) >> WLAN_GMBOX0_DMA_RX_CONTROL_START_LSB) |
| 468 #define WLAN_GMBOX0_DMA_RX_CONTROL_START_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_CON
TROL_START_LSB) & WLAN_GMBOX0_DMA_RX_CONTROL_START_MASK) |
| 469 #define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MSB 0 |
| 470 #define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_LSB 0 |
| 471 #define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MASK 0x00000001 |
| 472 #define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_GET(x) (((x) & WLAN_GMBOX0_DMA_RX_CONT
ROL_STOP_MASK) >> WLAN_GMBOX0_DMA_RX_CONTROL_STOP_LSB) |
| 473 #define WLAN_GMBOX0_DMA_RX_CONTROL_STOP_SET(x) (((x) << WLAN_GMBOX0_DMA_RX_CON
TROL_STOP_LSB) & WLAN_GMBOX0_DMA_RX_CONTROL_STOP_MASK) |
| 474 |
| 475 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS 0x0000011c |
| 476 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_OFFSET 0x0000011c |
| 477 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MSB 27 |
| 478 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_LSB 2 |
| 479 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_MASK 0x0ffffffc |
| 480 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_GET(x) (((x) & WLAN_GMBOX0_DM
A_TX_DESCRIPTOR_BASE_ADDRESS_MASK) >> WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS
_LSB) |
| 481 #define WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_SET(x) (((x) << WLAN_GMBOX0_D
MA_TX_DESCRIPTOR_BASE_ADDRESS_LSB) & WLAN_GMBOX0_DMA_TX_DESCRIPTOR_BASE_ADDRESS_
MASK) |
| 482 |
| 483 #define WLAN_GMBOX0_DMA_TX_CONTROL_ADDRESS 0x00000120 |
| 484 #define WLAN_GMBOX0_DMA_TX_CONTROL_OFFSET 0x00000120 |
| 485 #define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MSB 2 |
| 486 #define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_LSB 2 |
| 487 #define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MASK 0x00000004 |
| 488 #define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_CONT
ROL_RESUME_MASK) >> WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_LSB) |
| 489 #define WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_CON
TROL_RESUME_LSB) & WLAN_GMBOX0_DMA_TX_CONTROL_RESUME_MASK) |
| 490 #define WLAN_GMBOX0_DMA_TX_CONTROL_START_MSB 1 |
| 491 #define WLAN_GMBOX0_DMA_TX_CONTROL_START_LSB 1 |
| 492 #define WLAN_GMBOX0_DMA_TX_CONTROL_START_MASK 0x00000002 |
| 493 #define WLAN_GMBOX0_DMA_TX_CONTROL_START_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_CONT
ROL_START_MASK) >> WLAN_GMBOX0_DMA_TX_CONTROL_START_LSB) |
| 494 #define WLAN_GMBOX0_DMA_TX_CONTROL_START_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_CON
TROL_START_LSB) & WLAN_GMBOX0_DMA_TX_CONTROL_START_MASK) |
| 495 #define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MSB 0 |
| 496 #define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_LSB 0 |
| 497 #define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MASK 0x00000001 |
| 498 #define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_GET(x) (((x) & WLAN_GMBOX0_DMA_TX_CONT
ROL_STOP_MASK) >> WLAN_GMBOX0_DMA_TX_CONTROL_STOP_LSB) |
| 499 #define WLAN_GMBOX0_DMA_TX_CONTROL_STOP_SET(x) (((x) << WLAN_GMBOX0_DMA_TX_CON
TROL_STOP_LSB) & WLAN_GMBOX0_DMA_TX_CONTROL_STOP_MASK) |
| 500 |
| 501 #define WLAN_GMBOX_INT_STATUS_ADDRESS 0x00000124 |
| 502 #define WLAN_GMBOX_INT_STATUS_OFFSET 0x00000124 |
| 503 #define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MSB 6 |
| 504 #define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_LSB 6 |
| 505 #define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MASK 0x00000040 |
| 506 #define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_T
X_OVERFLOW_MASK) >> WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_LSB) |
| 507 #define WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_
TX_OVERFLOW_LSB) & WLAN_GMBOX_INT_STATUS_TX_OVERFLOW_MASK) |
| 508 #define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MSB 5 |
| 509 #define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_LSB 5 |
| 510 #define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MASK 0x00000020 |
| 511 #define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_
RX_UNDERFLOW_MASK) >> WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_LSB) |
| 512 #define WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_STATUS
_RX_UNDERFLOW_LSB) & WLAN_GMBOX_INT_STATUS_RX_UNDERFLOW_MASK) |
| 513 #define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MSB 4 |
| 514 #define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB 4 |
| 515 #define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK 0x00000010 |
| 516 #define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_STAT
US_RX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_LSB) |
| 517 #define WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_STA
TUS_RX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_STATUS_RX_DMA_COMPLETE_MASK) |
| 518 #define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MSB 3 |
| 519 #define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LSB 3 |
| 520 #define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MASK 0x00000008 |
| 521 #define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_
STATUS_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_LS
B) |
| 522 #define WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT
_STATUS_TX_DMA_EOM_COMPLETE_LSB) & WLAN_GMBOX_INT_STATUS_TX_DMA_EOM_COMPLETE_MAS
K) |
| 523 #define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MSB 2 |
| 524 #define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB 2 |
| 525 #define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK 0x00000004 |
| 526 #define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_STAT
US_TX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_LSB) |
| 527 #define WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_STA
TUS_TX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_STATUS_TX_DMA_COMPLETE_MASK) |
| 528 #define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MSB 1 |
| 529 #define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB 1 |
| 530 #define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK 0x00000002 |
| 531 #define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_
TX_NOT_EMPTY_MASK) >> WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_LSB) |
| 532 #define WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_SET(x) (((x) << WLAN_GMBOX_INT_STATUS
_TX_NOT_EMPTY_LSB) & WLAN_GMBOX_INT_STATUS_TX_NOT_EMPTY_MASK) |
| 533 #define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MSB 0 |
| 534 #define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_LSB 0 |
| 535 #define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MASK 0x00000001 |
| 536 #define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_GET(x) (((x) & WLAN_GMBOX_INT_STATUS_R
X_NOT_FULL_MASK) >> WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_LSB) |
| 537 #define WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_SET(x) (((x) << WLAN_GMBOX_INT_STATUS_
RX_NOT_FULL_LSB) & WLAN_GMBOX_INT_STATUS_RX_NOT_FULL_MASK) |
| 538 |
| 539 #define WLAN_GMBOX_INT_ENABLE_ADDRESS 0x00000128 |
| 540 #define WLAN_GMBOX_INT_ENABLE_OFFSET 0x00000128 |
| 541 #define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MSB 6 |
| 542 #define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_LSB 6 |
| 543 #define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MASK 0x00000040 |
| 544 #define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_T
X_OVERFLOW_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_LSB) |
| 545 #define WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_
TX_OVERFLOW_LSB) & WLAN_GMBOX_INT_ENABLE_TX_OVERFLOW_MASK) |
| 546 #define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MSB 5 |
| 547 #define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB 5 |
| 548 #define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK 0x00000020 |
| 549 #define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_
RX_UNDERFLOW_MASK) >> WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_LSB) |
| 550 #define WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE
_RX_UNDERFLOW_LSB) & WLAN_GMBOX_INT_ENABLE_RX_UNDERFLOW_MASK) |
| 551 #define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MSB 4 |
| 552 #define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB 4 |
| 553 #define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK 0x00000010 |
| 554 #define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_ENAB
LE_RX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_LSB) |
| 555 #define WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_ENA
BLE_RX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_ENABLE_RX_DMA_COMPLETE_MASK) |
| 556 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MSB 3 |
| 557 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LSB 3 |
| 558 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MASK 0x00000008 |
| 559 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_
ENABLE_TX_DMA_EOM_COMPLETE_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_LS
B) |
| 560 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT
_ENABLE_TX_DMA_EOM_COMPLETE_LSB) & WLAN_GMBOX_INT_ENABLE_TX_DMA_EOM_COMPLETE_MAS
K) |
| 561 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MSB 2 |
| 562 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB 2 |
| 563 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK 0x00000004 |
| 564 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_GET(x) (((x) & WLAN_GMBOX_INT_ENAB
LE_TX_DMA_COMPLETE_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_LSB) |
| 565 #define WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_SET(x) (((x) << WLAN_GMBOX_INT_ENA
BLE_TX_DMA_COMPLETE_LSB) & WLAN_GMBOX_INT_ENABLE_TX_DMA_COMPLETE_MASK) |
| 566 #define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MSB 1 |
| 567 #define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB 1 |
| 568 #define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK 0x00000002 |
| 569 #define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_
TX_NOT_EMPTY_MASK) >> WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_LSB) |
| 570 #define WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE
_TX_NOT_EMPTY_LSB) & WLAN_GMBOX_INT_ENABLE_TX_NOT_EMPTY_MASK) |
| 571 #define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MSB 0 |
| 572 #define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_LSB 0 |
| 573 #define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MASK 0x00000001 |
| 574 #define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_GET(x) (((x) & WLAN_GMBOX_INT_ENABLE_R
X_NOT_FULL_MASK) >> WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_LSB) |
| 575 #define WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_SET(x) (((x) << WLAN_GMBOX_INT_ENABLE_
RX_NOT_FULL_LSB) & WLAN_GMBOX_INT_ENABLE_RX_NOT_FULL_MASK) |
| 576 |
| 577 #define WLAN_HOST_IF_WINDOW_ADDRESS 0x00002000 |
| 578 #define WLAN_HOST_IF_WINDOW_OFFSET 0x00002000 |
| 579 #define WLAN_HOST_IF_WINDOW_DATA_MSB 7 |
| 580 #define WLAN_HOST_IF_WINDOW_DATA_LSB 0 |
| 581 #define WLAN_HOST_IF_WINDOW_DATA_MASK 0x000000ff |
| 582 #define WLAN_HOST_IF_WINDOW_DATA_GET(x) (((x) & WLAN_HOST_IF_WINDOW_DAT
A_MASK) >> WLAN_HOST_IF_WINDOW_DATA_LSB) |
| 583 #define WLAN_HOST_IF_WINDOW_DATA_SET(x) (((x) << WLAN_HOST_IF_WINDOW_DA
TA_LSB) & WLAN_HOST_IF_WINDOW_DATA_MASK) |
| 584 |
| 585 |
| 586 #ifndef __ASSEMBLER__ |
| 587 |
| 588 typedef struct mbox_wlan_reg_reg_s { |
| 589 volatile unsigned int wlan_mbox_fifo[4]; |
| 590 volatile unsigned int wlan_mbox_fifo_status; |
| 591 volatile unsigned int wlan_mbox_dma_policy; |
| 592 volatile unsigned int wlan_mbox0_dma_rx_descriptor_base; |
| 593 volatile unsigned int wlan_mbox0_dma_rx_control; |
| 594 volatile unsigned int wlan_mbox0_dma_tx_descriptor_base; |
| 595 volatile unsigned int wlan_mbox0_dma_tx_control; |
| 596 volatile unsigned int wlan_mbox1_dma_rx_descriptor_base; |
| 597 volatile unsigned int wlan_mbox1_dma_rx_control; |
| 598 volatile unsigned int wlan_mbox1_dma_tx_descriptor_base; |
| 599 volatile unsigned int wlan_mbox1_dma_tx_control; |
| 600 volatile unsigned int wlan_mbox2_dma_rx_descriptor_base; |
| 601 volatile unsigned int wlan_mbox2_dma_rx_control; |
| 602 volatile unsigned int wlan_mbox2_dma_tx_descriptor_base; |
| 603 volatile unsigned int wlan_mbox2_dma_tx_control; |
| 604 volatile unsigned int wlan_mbox3_dma_rx_descriptor_base; |
| 605 volatile unsigned int wlan_mbox3_dma_rx_control; |
| 606 volatile unsigned int wlan_mbox3_dma_tx_descriptor_base; |
| 607 volatile unsigned int wlan_mbox3_dma_tx_control; |
| 608 volatile unsigned int wlan_mbox_int_status; |
| 609 volatile unsigned int wlan_mbox_int_enable; |
| 610 volatile unsigned int wlan_int_host; |
| 611 unsigned char pad0[28]; /* pad to 0x80 */ |
| 612 volatile unsigned int wlan_local_count[8]; |
| 613 volatile unsigned int wlan_count_inc[8]; |
| 614 volatile unsigned int wlan_local_scratch[8]; |
| 615 volatile unsigned int wlan_use_local_bus; |
| 616 volatile unsigned int wlan_sdio_config; |
| 617 volatile unsigned int wlan_mbox_debug; |
| 618 volatile unsigned int wlan_mbox_fifo_reset; |
| 619 volatile unsigned int wlan_mbox_txfifo_pop[4]; |
| 620 volatile unsigned int wlan_mbox_rxfifo_pop[4]; |
| 621 volatile unsigned int wlan_sdio_debug; |
| 622 volatile unsigned int wlan_gmbox0_dma_rx_descriptor_base; |
| 623 volatile unsigned int wlan_gmbox0_dma_rx_control; |
| 624 volatile unsigned int wlan_gmbox0_dma_tx_descriptor_base; |
| 625 volatile unsigned int wlan_gmbox0_dma_tx_control; |
| 626 volatile unsigned int wlan_gmbox_int_status; |
| 627 volatile unsigned int wlan_gmbox_int_enable; |
| 628 unsigned char pad1[7892]; /* pad to 0x2000 */ |
| 629 volatile unsigned int wlan_host_if_window[2048]; |
| 630 } mbox_wlan_reg_reg_t; |
| 631 |
| 632 #endif /* __ASSEMBLER__ */ |
| 633 |
| 634 #endif /* _MBOX_WLAN_REG_H_ */ |
OLD | NEW |