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Side by Side Diff: chromeos/drivers/ath6kl/include/AR6002/hw2.0/hw/si_reg.h

Issue 646055: Atheros AR600x driver + build glue (Closed)
Patch Set: Created 10 years, 10 months ago
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1 // ------------------------------------------------------------------
2 // Copyright (c) 2004-2007 Atheros Corporation. All rights reserved.
3 //
4 // This program is free software; you can redistribute it and/or modify
5 // it under the terms of the GNU General Public License version 2 as
6 // published by the Free Software Foundation;
7 //
8 // Software distributed under the License is distributed on an "AS
9 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
10 // implied. See the License for the specific language governing
11 // rights and limitations under the License.
12 //
13 //
14 // ------------------------------------------------------------------
15 //===================================================================
16 // Author(s): ="Atheros"
17 //===================================================================
18
19
20 #ifndef _SI_REG_REG_H_
21 #define _SI_REG_REG_H_
22
23 #define SI_CONFIG_ADDRESS 0x00000000
24 #define SI_CONFIG_OFFSET 0x00000000
25 #define SI_CONFIG_ERR_INT_MSB 19
26 #define SI_CONFIG_ERR_INT_LSB 19
27 #define SI_CONFIG_ERR_INT_MASK 0x00080000
28 #define SI_CONFIG_ERR_INT_GET(x) (((x) & SI_CONFIG_ERR_INT_MASK) >> SI_CONFIG_ERR_INT_LSB)
29 #define SI_CONFIG_ERR_INT_SET(x) (((x) << SI_CONFIG_ERR_INT_LSB) & SI_CONFIG_ERR_INT_MASK)
30 #define SI_CONFIG_BIDIR_OD_DATA_MSB 18
31 #define SI_CONFIG_BIDIR_OD_DATA_LSB 18
32 #define SI_CONFIG_BIDIR_OD_DATA_MASK 0x00040000
33 #define SI_CONFIG_BIDIR_OD_DATA_GET(x) (((x) & SI_CONFIG_BIDIR_OD_DATA _MASK) >> SI_CONFIG_BIDIR_OD_DATA_LSB)
34 #define SI_CONFIG_BIDIR_OD_DATA_SET(x) (((x) << SI_CONFIG_BIDIR_OD_DAT A_LSB) & SI_CONFIG_BIDIR_OD_DATA_MASK)
35 #define SI_CONFIG_I2C_MSB 16
36 #define SI_CONFIG_I2C_LSB 16
37 #define SI_CONFIG_I2C_MASK 0x00010000
38 #define SI_CONFIG_I2C_GET(x) (((x) & SI_CONFIG_I2C_MASK) >> SI_CONFIG_I2C_LSB)
39 #define SI_CONFIG_I2C_SET(x) (((x) << SI_CONFIG_I2C_LSB) & S I_CONFIG_I2C_MASK)
40 #define SI_CONFIG_POS_SAMPLE_MSB 7
41 #define SI_CONFIG_POS_SAMPLE_LSB 7
42 #define SI_CONFIG_POS_SAMPLE_MASK 0x00000080
43 #define SI_CONFIG_POS_SAMPLE_GET(x) (((x) & SI_CONFIG_POS_SAMPLE_MA SK) >> SI_CONFIG_POS_SAMPLE_LSB)
44 #define SI_CONFIG_POS_SAMPLE_SET(x) (((x) << SI_CONFIG_POS_SAMPLE_L SB) & SI_CONFIG_POS_SAMPLE_MASK)
45 #define SI_CONFIG_POS_DRIVE_MSB 6
46 #define SI_CONFIG_POS_DRIVE_LSB 6
47 #define SI_CONFIG_POS_DRIVE_MASK 0x00000040
48 #define SI_CONFIG_POS_DRIVE_GET(x) (((x) & SI_CONFIG_POS_DRIVE_MAS K) >> SI_CONFIG_POS_DRIVE_LSB)
49 #define SI_CONFIG_POS_DRIVE_SET(x) (((x) << SI_CONFIG_POS_DRIVE_LS B) & SI_CONFIG_POS_DRIVE_MASK)
50 #define SI_CONFIG_INACTIVE_DATA_MSB 5
51 #define SI_CONFIG_INACTIVE_DATA_LSB 5
52 #define SI_CONFIG_INACTIVE_DATA_MASK 0x00000020
53 #define SI_CONFIG_INACTIVE_DATA_GET(x) (((x) & SI_CONFIG_INACTIVE_DATA _MASK) >> SI_CONFIG_INACTIVE_DATA_LSB)
54 #define SI_CONFIG_INACTIVE_DATA_SET(x) (((x) << SI_CONFIG_INACTIVE_DAT A_LSB) & SI_CONFIG_INACTIVE_DATA_MASK)
55 #define SI_CONFIG_INACTIVE_CLK_MSB 4
56 #define SI_CONFIG_INACTIVE_CLK_LSB 4
57 #define SI_CONFIG_INACTIVE_CLK_MASK 0x00000010
58 #define SI_CONFIG_INACTIVE_CLK_GET(x) (((x) & SI_CONFIG_INACTIVE_CLK_ MASK) >> SI_CONFIG_INACTIVE_CLK_LSB)
59 #define SI_CONFIG_INACTIVE_CLK_SET(x) (((x) << SI_CONFIG_INACTIVE_CLK _LSB) & SI_CONFIG_INACTIVE_CLK_MASK)
60 #define SI_CONFIG_DIVIDER_MSB 3
61 #define SI_CONFIG_DIVIDER_LSB 0
62 #define SI_CONFIG_DIVIDER_MASK 0x0000000f
63 #define SI_CONFIG_DIVIDER_GET(x) (((x) & SI_CONFIG_DIVIDER_MASK) >> SI_CONFIG_DIVIDER_LSB)
64 #define SI_CONFIG_DIVIDER_SET(x) (((x) << SI_CONFIG_DIVIDER_LSB) & SI_CONFIG_DIVIDER_MASK)
65
66 #define SI_CS_ADDRESS 0x00000004
67 #define SI_CS_OFFSET 0x00000004
68 #define SI_CS_BIT_CNT_IN_LAST_BYTE_MSB 13
69 #define SI_CS_BIT_CNT_IN_LAST_BYTE_LSB 11
70 #define SI_CS_BIT_CNT_IN_LAST_BYTE_MASK 0x00003800
71 #define SI_CS_BIT_CNT_IN_LAST_BYTE_GET(x) (((x) & SI_CS_BIT_CNT_IN_LAST_B YTE_MASK) >> SI_CS_BIT_CNT_IN_LAST_BYTE_LSB)
72 #define SI_CS_BIT_CNT_IN_LAST_BYTE_SET(x) (((x) << SI_CS_BIT_CNT_IN_LAST_ BYTE_LSB) & SI_CS_BIT_CNT_IN_LAST_BYTE_MASK)
73 #define SI_CS_DONE_ERR_MSB 10
74 #define SI_CS_DONE_ERR_LSB 10
75 #define SI_CS_DONE_ERR_MASK 0x00000400
76 #define SI_CS_DONE_ERR_GET(x) (((x) & SI_CS_DONE_ERR_MASK) >> SI_CS_DONE_ERR_LSB)
77 #define SI_CS_DONE_ERR_SET(x) (((x) << SI_CS_DONE_ERR_LSB) & SI_CS_DONE_ERR_MASK)
78 #define SI_CS_DONE_INT_MSB 9
79 #define SI_CS_DONE_INT_LSB 9
80 #define SI_CS_DONE_INT_MASK 0x00000200
81 #define SI_CS_DONE_INT_GET(x) (((x) & SI_CS_DONE_INT_MASK) >> SI_CS_DONE_INT_LSB)
82 #define SI_CS_DONE_INT_SET(x) (((x) << SI_CS_DONE_INT_LSB) & SI_CS_DONE_INT_MASK)
83 #define SI_CS_START_MSB 8
84 #define SI_CS_START_LSB 8
85 #define SI_CS_START_MASK 0x00000100
86 #define SI_CS_START_GET(x) (((x) & SI_CS_START_MASK) >> SI _CS_START_LSB)
87 #define SI_CS_START_SET(x) (((x) << SI_CS_START_LSB) & SI_ CS_START_MASK)
88 #define SI_CS_RX_CNT_MSB 7
89 #define SI_CS_RX_CNT_LSB 4
90 #define SI_CS_RX_CNT_MASK 0x000000f0
91 #define SI_CS_RX_CNT_GET(x) (((x) & SI_CS_RX_CNT_MASK) >> S I_CS_RX_CNT_LSB)
92 #define SI_CS_RX_CNT_SET(x) (((x) << SI_CS_RX_CNT_LSB) & SI _CS_RX_CNT_MASK)
93 #define SI_CS_TX_CNT_MSB 3
94 #define SI_CS_TX_CNT_LSB 0
95 #define SI_CS_TX_CNT_MASK 0x0000000f
96 #define SI_CS_TX_CNT_GET(x) (((x) & SI_CS_TX_CNT_MASK) >> S I_CS_TX_CNT_LSB)
97 #define SI_CS_TX_CNT_SET(x) (((x) << SI_CS_TX_CNT_LSB) & SI _CS_TX_CNT_MASK)
98
99 #define SI_TX_DATA0_ADDRESS 0x00000008
100 #define SI_TX_DATA0_OFFSET 0x00000008
101 #define SI_TX_DATA0_DATA3_MSB 31
102 #define SI_TX_DATA0_DATA3_LSB 24
103 #define SI_TX_DATA0_DATA3_MASK 0xff000000
104 #define SI_TX_DATA0_DATA3_GET(x) (((x) & SI_TX_DATA0_DATA3_MASK) >> SI_TX_DATA0_DATA3_LSB)
105 #define SI_TX_DATA0_DATA3_SET(x) (((x) << SI_TX_DATA0_DATA3_LSB) & SI_TX_DATA0_DATA3_MASK)
106 #define SI_TX_DATA0_DATA2_MSB 23
107 #define SI_TX_DATA0_DATA2_LSB 16
108 #define SI_TX_DATA0_DATA2_MASK 0x00ff0000
109 #define SI_TX_DATA0_DATA2_GET(x) (((x) & SI_TX_DATA0_DATA2_MASK) >> SI_TX_DATA0_DATA2_LSB)
110 #define SI_TX_DATA0_DATA2_SET(x) (((x) << SI_TX_DATA0_DATA2_LSB) & SI_TX_DATA0_DATA2_MASK)
111 #define SI_TX_DATA0_DATA1_MSB 15
112 #define SI_TX_DATA0_DATA1_LSB 8
113 #define SI_TX_DATA0_DATA1_MASK 0x0000ff00
114 #define SI_TX_DATA0_DATA1_GET(x) (((x) & SI_TX_DATA0_DATA1_MASK) >> SI_TX_DATA0_DATA1_LSB)
115 #define SI_TX_DATA0_DATA1_SET(x) (((x) << SI_TX_DATA0_DATA1_LSB) & SI_TX_DATA0_DATA1_MASK)
116 #define SI_TX_DATA0_DATA0_MSB 7
117 #define SI_TX_DATA0_DATA0_LSB 0
118 #define SI_TX_DATA0_DATA0_MASK 0x000000ff
119 #define SI_TX_DATA0_DATA0_GET(x) (((x) & SI_TX_DATA0_DATA0_MASK) >> SI_TX_DATA0_DATA0_LSB)
120 #define SI_TX_DATA0_DATA0_SET(x) (((x) << SI_TX_DATA0_DATA0_LSB) & SI_TX_DATA0_DATA0_MASK)
121
122 #define SI_TX_DATA1_ADDRESS 0x0000000c
123 #define SI_TX_DATA1_OFFSET 0x0000000c
124 #define SI_TX_DATA1_DATA7_MSB 31
125 #define SI_TX_DATA1_DATA7_LSB 24
126 #define SI_TX_DATA1_DATA7_MASK 0xff000000
127 #define SI_TX_DATA1_DATA7_GET(x) (((x) & SI_TX_DATA1_DATA7_MASK) >> SI_TX_DATA1_DATA7_LSB)
128 #define SI_TX_DATA1_DATA7_SET(x) (((x) << SI_TX_DATA1_DATA7_LSB) & SI_TX_DATA1_DATA7_MASK)
129 #define SI_TX_DATA1_DATA6_MSB 23
130 #define SI_TX_DATA1_DATA6_LSB 16
131 #define SI_TX_DATA1_DATA6_MASK 0x00ff0000
132 #define SI_TX_DATA1_DATA6_GET(x) (((x) & SI_TX_DATA1_DATA6_MASK) >> SI_TX_DATA1_DATA6_LSB)
133 #define SI_TX_DATA1_DATA6_SET(x) (((x) << SI_TX_DATA1_DATA6_LSB) & SI_TX_DATA1_DATA6_MASK)
134 #define SI_TX_DATA1_DATA5_MSB 15
135 #define SI_TX_DATA1_DATA5_LSB 8
136 #define SI_TX_DATA1_DATA5_MASK 0x0000ff00
137 #define SI_TX_DATA1_DATA5_GET(x) (((x) & SI_TX_DATA1_DATA5_MASK) >> SI_TX_DATA1_DATA5_LSB)
138 #define SI_TX_DATA1_DATA5_SET(x) (((x) << SI_TX_DATA1_DATA5_LSB) & SI_TX_DATA1_DATA5_MASK)
139 #define SI_TX_DATA1_DATA4_MSB 7
140 #define SI_TX_DATA1_DATA4_LSB 0
141 #define SI_TX_DATA1_DATA4_MASK 0x000000ff
142 #define SI_TX_DATA1_DATA4_GET(x) (((x) & SI_TX_DATA1_DATA4_MASK) >> SI_TX_DATA1_DATA4_LSB)
143 #define SI_TX_DATA1_DATA4_SET(x) (((x) << SI_TX_DATA1_DATA4_LSB) & SI_TX_DATA1_DATA4_MASK)
144
145 #define SI_RX_DATA0_ADDRESS 0x00000010
146 #define SI_RX_DATA0_OFFSET 0x00000010
147 #define SI_RX_DATA0_DATA3_MSB 31
148 #define SI_RX_DATA0_DATA3_LSB 24
149 #define SI_RX_DATA0_DATA3_MASK 0xff000000
150 #define SI_RX_DATA0_DATA3_GET(x) (((x) & SI_RX_DATA0_DATA3_MASK) >> SI_RX_DATA0_DATA3_LSB)
151 #define SI_RX_DATA0_DATA3_SET(x) (((x) << SI_RX_DATA0_DATA3_LSB) & SI_RX_DATA0_DATA3_MASK)
152 #define SI_RX_DATA0_DATA2_MSB 23
153 #define SI_RX_DATA0_DATA2_LSB 16
154 #define SI_RX_DATA0_DATA2_MASK 0x00ff0000
155 #define SI_RX_DATA0_DATA2_GET(x) (((x) & SI_RX_DATA0_DATA2_MASK) >> SI_RX_DATA0_DATA2_LSB)
156 #define SI_RX_DATA0_DATA2_SET(x) (((x) << SI_RX_DATA0_DATA2_LSB) & SI_RX_DATA0_DATA2_MASK)
157 #define SI_RX_DATA0_DATA1_MSB 15
158 #define SI_RX_DATA0_DATA1_LSB 8
159 #define SI_RX_DATA0_DATA1_MASK 0x0000ff00
160 #define SI_RX_DATA0_DATA1_GET(x) (((x) & SI_RX_DATA0_DATA1_MASK) >> SI_RX_DATA0_DATA1_LSB)
161 #define SI_RX_DATA0_DATA1_SET(x) (((x) << SI_RX_DATA0_DATA1_LSB) & SI_RX_DATA0_DATA1_MASK)
162 #define SI_RX_DATA0_DATA0_MSB 7
163 #define SI_RX_DATA0_DATA0_LSB 0
164 #define SI_RX_DATA0_DATA0_MASK 0x000000ff
165 #define SI_RX_DATA0_DATA0_GET(x) (((x) & SI_RX_DATA0_DATA0_MASK) >> SI_RX_DATA0_DATA0_LSB)
166 #define SI_RX_DATA0_DATA0_SET(x) (((x) << SI_RX_DATA0_DATA0_LSB) & SI_RX_DATA0_DATA0_MASK)
167
168 #define SI_RX_DATA1_ADDRESS 0x00000014
169 #define SI_RX_DATA1_OFFSET 0x00000014
170 #define SI_RX_DATA1_DATA7_MSB 31
171 #define SI_RX_DATA1_DATA7_LSB 24
172 #define SI_RX_DATA1_DATA7_MASK 0xff000000
173 #define SI_RX_DATA1_DATA7_GET(x) (((x) & SI_RX_DATA1_DATA7_MASK) >> SI_RX_DATA1_DATA7_LSB)
174 #define SI_RX_DATA1_DATA7_SET(x) (((x) << SI_RX_DATA1_DATA7_LSB) & SI_RX_DATA1_DATA7_MASK)
175 #define SI_RX_DATA1_DATA6_MSB 23
176 #define SI_RX_DATA1_DATA6_LSB 16
177 #define SI_RX_DATA1_DATA6_MASK 0x00ff0000
178 #define SI_RX_DATA1_DATA6_GET(x) (((x) & SI_RX_DATA1_DATA6_MASK) >> SI_RX_DATA1_DATA6_LSB)
179 #define SI_RX_DATA1_DATA6_SET(x) (((x) << SI_RX_DATA1_DATA6_LSB) & SI_RX_DATA1_DATA6_MASK)
180 #define SI_RX_DATA1_DATA5_MSB 15
181 #define SI_RX_DATA1_DATA5_LSB 8
182 #define SI_RX_DATA1_DATA5_MASK 0x0000ff00
183 #define SI_RX_DATA1_DATA5_GET(x) (((x) & SI_RX_DATA1_DATA5_MASK) >> SI_RX_DATA1_DATA5_LSB)
184 #define SI_RX_DATA1_DATA5_SET(x) (((x) << SI_RX_DATA1_DATA5_LSB) & SI_RX_DATA1_DATA5_MASK)
185 #define SI_RX_DATA1_DATA4_MSB 7
186 #define SI_RX_DATA1_DATA4_LSB 0
187 #define SI_RX_DATA1_DATA4_MASK 0x000000ff
188 #define SI_RX_DATA1_DATA4_GET(x) (((x) & SI_RX_DATA1_DATA4_MASK) >> SI_RX_DATA1_DATA4_LSB)
189 #define SI_RX_DATA1_DATA4_SET(x) (((x) << SI_RX_DATA1_DATA4_LSB) & SI_RX_DATA1_DATA4_MASK)
190
191
192 #ifndef __ASSEMBLER__
193
194 typedef struct si_reg_reg_s {
195 volatile unsigned int si_config;
196 volatile unsigned int si_cs;
197 volatile unsigned int si_tx_data0;
198 volatile unsigned int si_tx_data1;
199 volatile unsigned int si_rx_data0;
200 volatile unsigned int si_rx_data1;
201 } si_reg_reg_t;
202
203 #endif /* __ASSEMBLER__ */
204
205 #endif /* _SI_REG_H_ */
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