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Issue 645493002: [ia32] Better code generation for materialization of float/double constants. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE Created 6 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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2374 DCHECK(IsEnabled(SSE4_1)); 2374 DCHECK(IsEnabled(SSE4_1));
2375 EnsureSpace ensure_space(this); 2375 EnsureSpace ensure_space(this);
2376 EMIT(0x66); 2376 EMIT(0x66);
2377 EMIT(0x0F); 2377 EMIT(0x0F);
2378 EMIT(0x38); 2378 EMIT(0x38);
2379 EMIT(0x17); 2379 EMIT(0x17);
2380 emit_sse_operand(dst, src); 2380 emit_sse_operand(dst, src);
2381 } 2381 }
2382 2382
2383 2383
2384 void Assembler::pslld(XMMRegister reg, int8_t shift) {
2385 EnsureSpace ensure_space(this);
2386 EMIT(0x66);
2387 EMIT(0x0F);
2388 EMIT(0x72);
2389 emit_sse_operand(esi, reg); // esi == 6
2390 EMIT(shift);
2391 }
2392
2393
2394 void Assembler::psrld(XMMRegister reg, int8_t shift) {
2395 EnsureSpace ensure_space(this);
2396 EMIT(0x66);
2397 EMIT(0x0F);
2398 EMIT(0x72);
2399 emit_sse_operand(edx, reg); // edx == 2
2400 EMIT(shift);
2401 }
2402
2403
2384 void Assembler::psllq(XMMRegister reg, int8_t shift) { 2404 void Assembler::psllq(XMMRegister reg, int8_t shift) {
2385 EnsureSpace ensure_space(this); 2405 EnsureSpace ensure_space(this);
2386 EMIT(0x66); 2406 EMIT(0x66);
2387 EMIT(0x0F); 2407 EMIT(0x0F);
2388 EMIT(0x73); 2408 EMIT(0x73);
2389 emit_sse_operand(esi, reg); // esi == 6 2409 emit_sse_operand(esi, reg); // esi == 6
2390 EMIT(shift); 2410 EMIT(shift);
2391 } 2411 }
2392 2412
2393 2413
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2667 fprintf(coverage_log, "%s\n", file_line); 2687 fprintf(coverage_log, "%s\n", file_line);
2668 fflush(coverage_log); 2688 fflush(coverage_log);
2669 } 2689 }
2670 } 2690 }
2671 2691
2672 #endif 2692 #endif
2673 2693
2674 } } // namespace v8::internal 2694 } } // namespace v8::internal
2675 2695
2676 #endif // V8_TARGET_ARCH_IA32 2696 #endif // V8_TARGET_ARCH_IA32
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