| Index: src/assembler_ia32.cpp
|
| diff --git a/src/assembler_ia32.cpp b/src/assembler_ia32.cpp
|
| index 6bcbb9aad95551e8ff378272fecfb73db6afd24d..bc59ca8d84d57e62ae9329d56c751c9b2fb7d05f 100644
|
| --- a/src/assembler_ia32.cpp
|
| +++ b/src/assembler_ia32.cpp
|
| @@ -948,21 +948,6 @@ void AssemblerX86::sqrtpd(XmmRegister dst) {
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| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -void AssemblerX86::cvtps2pd(XmmRegister dst, XmmRegister src) {
|
| - AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0x0F);
|
| - EmitUint8(0x5A);
|
| - EmitXmmRegisterOperand(dst, src);
|
| -}
|
| -
|
| -void AssemblerX86::cvtpd2ps(XmmRegister dst, XmmRegister src) {
|
| - AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0x66);
|
| - EmitUint8(0x0F);
|
| - EmitUint8(0x5A);
|
| - EmitXmmRegisterOperand(dst, src);
|
| -}
|
| -
|
| void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src,
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| const Immediate &imm) {
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| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -974,78 +959,91 @@ void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src,
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| EmitUint8(imm.value());
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| }
|
|
|
| -void AssemblerX86::cvtsi2ss(XmmRegister dst, GPRRegister src) {
|
| +void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
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| + XmmRegister src) {
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| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF3);
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| EmitUint8(0x0F);
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| - EmitUint8(0x2A);
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| - EmitOperand(dst, Operand(src));
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| + EmitUint8(0x5B);
|
| + EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtsi2sd(XmmRegister dst, GPRRegister src) {
|
| +void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
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| + const Address &src) {
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| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF2);
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| EmitUint8(0x0F);
|
| - EmitUint8(0x2A);
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| - EmitOperand(dst, Operand(src));
|
| + EmitUint8(0x5B);
|
| + EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtss2si(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
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| + XmmRegister src) {
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| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
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| EmitUint8(0x0F);
|
| - EmitUint8(0x2D);
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| + EmitUint8(0x5B);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtss2sd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0x0F);
|
| - EmitUint8(0x5A);
|
| - EmitXmmRegisterOperand(dst, src);
|
| + EmitUint8(0x5B);
|
| + EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtsd2si(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF2);
|
| + EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| - EmitUint8(0x2D);
|
| - EmitXmmRegisterOperand(dst, src);
|
| + EmitUint8(0x2A);
|
| + EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvttss2si(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF3);
|
| + EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| - EmitUint8(0x2C);
|
| - EmitXmmRegisterOperand(dst, src);
|
| + EmitUint8(0x2A);
|
| + EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvttsd2si(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
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| + XmmRegister src) {
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| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF2);
|
| + // ss2sd or sd2ss
|
| + EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| - EmitUint8(0x2C);
|
| + EmitUint8(0x5A);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtsd2ss(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF2);
|
| + EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5A);
|
| - EmitXmmRegisterOperand(dst, src);
|
| + EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtdq2pd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| - EmitUint8(0xF3);
|
| + EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| - EmitUint8(0xE6);
|
| + EmitUint8(0x2C);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| +void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, const Address &src) {
|
| + AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| + EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| + EmitUint8(0x0F);
|
| + EmitUint8(0x2C);
|
| + EmitOperand(dst, src);
|
| +}
|
| +
|
| void AssemblerX86::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_f64)
|
|
|