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Side by Side Diff: runtime/vm/assembler_arm64.h

Issue 640423002: Uses stp/ldp for frame entry/exit on arm64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 2 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_ARM64_H_ 5 #ifndef VM_ASSEMBLER_ARM64_H_
6 #define VM_ASSEMBLER_ARM64_H_ 6 #define VM_ASSEMBLER_ARM64_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_arm64.h directly; use assembler.h instead. 9 #error Do not include assembler_arm64.h directly; use assembler.h instead.
10 #endif 10 #endif
(...skipping 1072 matching lines...) Expand 10 before | Expand all | Expand 10 after
1083 madd(rd, rn, rm, ZR); 1083 madd(rd, rn, rm, ZR);
1084 } 1084 }
1085 void Push(Register reg) { 1085 void Push(Register reg) {
1086 ASSERT(reg != PP); // Only push PP with TagAndPushPP(). 1086 ASSERT(reg != PP); // Only push PP with TagAndPushPP().
1087 str(reg, Address(SP, -1 * kWordSize, Address::PreIndex)); 1087 str(reg, Address(SP, -1 * kWordSize, Address::PreIndex));
1088 } 1088 }
1089 void Pop(Register reg) { 1089 void Pop(Register reg) {
1090 ASSERT(reg != PP); // Only pop PP with PopAndUntagPP(). 1090 ASSERT(reg != PP); // Only pop PP with PopAndUntagPP().
1091 ldr(reg, Address(SP, 1 * kWordSize, Address::PostIndex)); 1091 ldr(reg, Address(SP, 1 * kWordSize, Address::PostIndex));
1092 } 1092 }
1093 void PushPair(Register first, Register second) {
1094 ASSERT((first != PP) && (second != PP));
1095 stp(second, first, Address(SP, -2 * kWordSize, Address::PairPreIndex));
1096 }
1097 void PopPair(Register first, Register second) {
1098 ASSERT((first != PP) && (second != PP));
1099 ldp(second, first, Address(SP, 2 * kWordSize, Address::PairPostIndex));
1100 }
1093 void PushFloat(VRegister reg) { 1101 void PushFloat(VRegister reg) {
1094 fstrs(reg, Address(SP, -1 * kFloatSize, Address::PreIndex)); 1102 fstrs(reg, Address(SP, -1 * kFloatSize, Address::PreIndex));
1095 } 1103 }
1096 void PushDouble(VRegister reg) { 1104 void PushDouble(VRegister reg) {
1097 fstrd(reg, Address(SP, -1 * kDoubleSize, Address::PreIndex)); 1105 fstrd(reg, Address(SP, -1 * kDoubleSize, Address::PreIndex));
1098 } 1106 }
1099 void PushQuad(VRegister reg) { 1107 void PushQuad(VRegister reg) {
1100 fstrq(reg, Address(SP, -1 * kQuadSize, Address::PreIndex)); 1108 fstrq(reg, Address(SP, -1 * kQuadSize, Address::PreIndex));
1101 } 1109 }
1102 void PopFloat(VRegister reg) { 1110 void PopFloat(VRegister reg) {
1103 fldrs(reg, Address(SP, 1 * kFloatSize, Address::PostIndex)); 1111 fldrs(reg, Address(SP, 1 * kFloatSize, Address::PostIndex));
1104 } 1112 }
1105 void PopDouble(VRegister reg) { 1113 void PopDouble(VRegister reg) {
1106 fldrd(reg, Address(SP, 1 * kDoubleSize, Address::PostIndex)); 1114 fldrd(reg, Address(SP, 1 * kDoubleSize, Address::PostIndex));
1107 } 1115 }
1108 void PopQuad(VRegister reg) { 1116 void PopQuad(VRegister reg) {
1109 fldrq(reg, Address(SP, 1 * kQuadSize, Address::PostIndex)); 1117 fldrq(reg, Address(SP, 1 * kQuadSize, Address::PostIndex));
1110 } 1118 }
1111 void TagAndPushPP() { 1119 void TagAndPushPP() {
1112 // Add the heap object tag back to PP before putting it on the stack. 1120 // Add the heap object tag back to PP before putting it on the stack.
1113 add(TMP, PP, Operand(kHeapObjectTag)); 1121 add(TMP, PP, Operand(kHeapObjectTag));
1114 str(TMP, Address(SP, -1 * kWordSize, Address::PreIndex)); 1122 str(TMP, Address(SP, -1 * kWordSize, Address::PreIndex));
1115 } 1123 }
1124 void TagAndPushPPAndPcMarker(Register pc_marker_reg) {
1125 ASSERT(pc_marker_reg != TMP2);
1126 // Add the heap object tag back to PP before putting it on the stack.
1127 add(TMP2, PP, Operand(kHeapObjectTag));
1128 stp(TMP2, pc_marker_reg,
1129 Address(SP, -2 * kWordSize, Address::PairPreIndex));
1130 }
1116 void PopAndUntagPP() { 1131 void PopAndUntagPP() {
1117 ldr(PP, Address(SP, 1 * kWordSize, Address::PostIndex)); 1132 ldr(PP, Address(SP, 1 * kWordSize, Address::PostIndex));
1118 sub(PP, PP, Operand(kHeapObjectTag)); 1133 sub(PP, PP, Operand(kHeapObjectTag));
1119 } 1134 }
1120 void tst(Register rn, Operand o) { 1135 void tst(Register rn, Operand o) {
1121 ands(ZR, rn, o); 1136 ands(ZR, rn, o);
1122 } 1137 }
1123 void tsti(Register rn, const Immediate& imm) { 1138 void tsti(Register rn, const Immediate& imm) {
1124 andis(ZR, rn, imm); 1139 andis(ZR, rn, imm);
1125 } 1140 }
(...skipping 578 matching lines...) Expand 10 before | Expand all | Expand 10 after
1704 } 1719 }
1705 1720
1706 void EmitLoadStoreRegPair(LoadStoreRegPairOp op, 1721 void EmitLoadStoreRegPair(LoadStoreRegPairOp op,
1707 Register rt, Register rt2, Address a, 1722 Register rt, Register rt2, Address a,
1708 OperandSize sz) { 1723 OperandSize sz) {
1709 ASSERT((sz == kDoubleWord) || (sz == kWord) || (sz == kUnsignedWord)); 1724 ASSERT((sz == kDoubleWord) || (sz == kWord) || (sz == kUnsignedWord));
1710 ASSERT((rt != CSP) && (rt != R31)); 1725 ASSERT((rt != CSP) && (rt != R31));
1711 ASSERT((rt2 != CSP) && (rt2 != R31)); 1726 ASSERT((rt2 != CSP) && (rt2 != R31));
1712 const Register crt = ConcreteRegister(rt); 1727 const Register crt = ConcreteRegister(rt);
1713 const Register crt2 = ConcreteRegister(rt2); 1728 const Register crt2 = ConcreteRegister(rt2);
1714 int32_t opc; 1729 int32_t opc = 0;
1715 switch (sz) { 1730 switch (sz) {
1716 case kDoubleWord: opc = B31; break; 1731 case kDoubleWord: opc = B31; break;
1717 case kWord: opc = B30; break; 1732 case kWord: opc = B30; break;
1718 case kUnsignedWord: opc = 0; break; 1733 case kUnsignedWord: opc = 0; break;
1719 default: UNREACHABLE(); break; 1734 default: UNREACHABLE(); break;
1720 } 1735 }
1721 const int32_t encoding = 1736 const int32_t encoding =
1722 opc | op | 1737 opc | op |
1723 (static_cast<int32_t>(crt) << kRtShift) | 1738 (static_cast<int32_t>(crt) << kRtShift) |
1724 (static_cast<int32_t>(crt2) << kRt2Shift) | 1739 (static_cast<int32_t>(crt2) << kRt2Shift) |
(...skipping 148 matching lines...) Expand 10 before | Expand all | Expand 10 after
1873 Register value, 1888 Register value,
1874 Label* no_update); 1889 Label* no_update);
1875 1890
1876 DISALLOW_ALLOCATION(); 1891 DISALLOW_ALLOCATION();
1877 DISALLOW_COPY_AND_ASSIGN(Assembler); 1892 DISALLOW_COPY_AND_ASSIGN(Assembler);
1878 }; 1893 };
1879 1894
1880 } // namespace dart 1895 } // namespace dart
1881 1896
1882 #endif // VM_ASSEMBLER_ARM64_H_ 1897 #endif // VM_ASSEMBLER_ARM64_H_
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