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1 /* | 1 /* |
2 * Copyright (c) 2008-2009 Atheros Communications Inc. | 2 * Copyright (c) 2008-2009 Atheros Communications Inc. |
3 * | 3 * |
4 * Permission to use, copy, modify, and/or distribute this software for any | 4 * Permission to use, copy, modify, and/or distribute this software for any |
5 * purpose with or without fee is hereby granted, provided that the above | 5 * purpose with or without fee is hereby granted, provided that the above |
6 * copyright notice and this permission notice appear in all copies. | 6 * copyright notice and this permission notice appear in all copies. |
7 * | 7 * |
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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208 ads->ds_ctl3 = 0; | 208 ads->ds_ctl3 = 0; |
209 } | 209 } |
210 ads->ds_txstatus0 = ads->ds_txstatus1 = 0; | 210 ads->ds_txstatus0 = ads->ds_txstatus1 = 0; |
211 ads->ds_txstatus2 = ads->ds_txstatus3 = 0; | 211 ads->ds_txstatus2 = ads->ds_txstatus3 = 0; |
212 ads->ds_txstatus4 = ads->ds_txstatus5 = 0; | 212 ads->ds_txstatus4 = ads->ds_txstatus5 = 0; |
213 ads->ds_txstatus6 = ads->ds_txstatus7 = 0; | 213 ads->ds_txstatus6 = ads->ds_txstatus7 = 0; |
214 ads->ds_txstatus8 = ads->ds_txstatus9 = 0; | 214 ads->ds_txstatus8 = ads->ds_txstatus9 = 0; |
215 } | 215 } |
216 | 216 |
217 static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds, | 217 static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds, |
218 » » » » struct ath_tx_status *ts) | 218 » » » » struct ath_tx_status *ts, |
| 219 » » » » void *txs_desc) |
219 { | 220 { |
220 struct ar5416_desc *ads = AR5416DESC(ds); | 221 struct ar5416_desc *ads = AR5416DESC(ds); |
221 | 222 |
222 if ((ads->ds_txstatus9 & AR_TxDone) == 0) | 223 if ((ads->ds_txstatus9 & AR_TxDone) == 0) |
223 return -EINPROGRESS; | 224 return -EINPROGRESS; |
224 | 225 |
225 ts->ts_seqnum = MS(ads->ds_txstatus9, AR_SeqNum); | 226 ts->ts_seqnum = MS(ads->ds_txstatus9, AR_SeqNum); |
226 ts->ts_tstamp = ads->AR_SendTimestamp; | 227 ts->ts_tstamp = ads->AR_SendTimestamp; |
227 ts->ts_status = 0; | 228 ts->ts_status = 0; |
228 ts->ts_flags = 0; | 229 ts->ts_flags = 0; |
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474 ops->proc_txdesc = ar9002_hw_proc_txdesc; | 475 ops->proc_txdesc = ar9002_hw_proc_txdesc; |
475 ops->set11n_txdesc = ar9002_hw_set11n_txdesc; | 476 ops->set11n_txdesc = ar9002_hw_set11n_txdesc; |
476 ops->set11n_ratescenario = ar9002_hw_set11n_ratescenario; | 477 ops->set11n_ratescenario = ar9002_hw_set11n_ratescenario; |
477 ops->set11n_aggr_first = ar9002_hw_set11n_aggr_first; | 478 ops->set11n_aggr_first = ar9002_hw_set11n_aggr_first; |
478 ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle; | 479 ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle; |
479 ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last; | 480 ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last; |
480 ops->clr11n_aggr = ar9002_hw_clr11n_aggr; | 481 ops->clr11n_aggr = ar9002_hw_clr11n_aggr; |
481 ops->set11n_burstduration = ar9002_hw_set11n_burstduration; | 482 ops->set11n_burstduration = ar9002_hw_set11n_burstduration; |
482 ops->set11n_virtualmorefrag = ar9002_hw_set11n_virtualmorefrag; | 483 ops->set11n_virtualmorefrag = ar9002_hw_set11n_virtualmorefrag; |
483 } | 484 } |
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