[MIPS] Define 'CPU_CISC' for mips as aes calculation is incorrect for 'CPU_RISC'

libsrtp.gyp

 # Copyright (c) 2012 The Chromium Authors. All rights reserved.
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
 {
   'variables': {
     'use_system_libsrtp%': 0,
   },
   'target_defaults': {
     'defines': [
@@ skipping 28 matching lines @@
           # All Windows architectures are this way.
           'SIZEOF_UNSIGNED_LONG=4',
           'SIZEOF_UNSIGNED_LONG_LONG=8',
          ],
       }],
       ['target_arch=="x64" or target_arch=="ia32"', {
         'defines': [
           'CPU_CISC',
         ],
       }],
-      ['target_arch=="arm" or target_arch=="armv7" or target_arch=="arm64"', {
+      ['target_arch=="arm" or target_arch=="armv7" or target_arch=="arm64" \
+       or target_arch=="mipsel" or target_arch=="mips64el"', {
         'defines': [
-          # TODO(leozwang): CPU_RISC doesn't work properly on android/arm
-          # platform for unknown reasons, need to investigate the root cause
+          # TODO(leozwang): CPU_RISC doesn't work properly on android/arm and mips

[Mallinath (Gone from Chromium), 2014/10/24 16:14:56]

nit: exceeds line limit.

[gordanac, 2014/10/28 09:19:08]

Done.

+          # platforms for unknown reasons, need to investigate the root cause
           # of it. CPU_RISC is used for optimization only, and CPU_CISC should
           # just work just fine, it has been tested on android/arm with srtp
           # test applications and libjingle.
           'CPU_CISC',
         ],
       }],
-      ['target_arch=="mipsel" or target_arch=="mips64el"', {
-        'defines': [
-          'CPU_RISC',
-        ],
-      }],
       ['target_arch=="mipsel" or target_arch=="arm" or target_arch=="armv7" or target_arch=="ia32"', {
         'defines': [
           # Define FORCE_64BIT_ALIGN to avoid alignment-related-crashes like
           # crbug/414919. Without this, aes_cbc_alloc will allocate an
           # aes_cbc_ctx_t not 64-bit aligned and the v128_t members of
           # aes_cbc_ctx_t will not be 64-bit aligned, which breaks the
           # compiler optimizations that assume 64-bit alignment of v128_t.
           'FORCE_64BIT_ALIGN',
         ],
       }],
@@ skipping 27 matching lines @@
             # All Windows architectures are this way.
             'SIZEOF_UNSIGNED_LONG=4',
             'SIZEOF_UNSIGNED_LONG_LONG=8',
            ],
         }],
         ['target_arch=="x64" or target_arch=="ia32"', {
           'defines': [
             'CPU_CISC',
           ],
         }],
-        ['target_arch=="mipsel" or target_arch=="mips64el"', {
-          'defines': [
-            'CPU_RISC',
-          ],
-        }],
       ],
     },
   },
   'conditions': [
     ['use_system_libsrtp==0', {
       'targets': [
         {
           'target_name': 'libsrtp',
           'type': 'static_library',
           'sources': [
@@ skipping 251 matching lines @@
           'link_settings': {
             'libraries': [
               '-lsrtp',
             ],
           },
         }, # target libsrtp
       ], # targets
     }],
   ],
 }