Implement bigint mulAdd and sqrAdd intrinsics on ARM.

runtime/vm/simulator_arm.cc

Index: runtime/vm/simulator_arm.cc
===================================================================
--- runtime/vm/simulator_arm.cc	(revision 40991)
+++ runtime/vm/simulator_arm.cc	(working copy)
@@ -1774,6 +1774,9 @@
             }
             break;
           }
+          case 2:
+            // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
+            // Format(instr, "umaal'cond's 'rd, 'rn, 'rm, 'rs");
           case 5:
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             // Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs");
@@ -1790,10 +1793,16 @@
               uint64_t left_op  = static_cast<uint32_t>(rm_val);
               uint64_t right_op = static_cast<uint32_t>(rs_val);
               result = accum + left_op * right_op;  // Unsigned nultiplication.

[zra, 2014/10/08 15:54:46]

multiplication

[regis, 2014/10/08 16:58:00]

Done.

-            } else {  // smlal
+            } else if (instr->Bits(21, 3) == 7) {  // smlal
               int64_t left_op  = static_cast<int32_t>(rm_val);
               int64_t right_op = static_cast<int32_t>(rs_val);
               result = accum + left_op * right_op;  // Signed nultiplication.

[zra, 2014/10/08 15:54:46]

multiplication

[regis, 2014/10/08 16:58:00]

Done.

+            } else {

[Cutch, 2014/10/08 15:22:26]

ASSERT(instr->Bits(21, 3) == 2);

[regis, 2014/10/08 16:58:00]

Done.

+              uint64_t left_op  = static_cast<uint32_t>(rm_val);
+              uint64_t right_op = static_cast<uint32_t>(rs_val);
+              result = left_op * right_op +  // Unsigned nultiplication.

[zra, 2014/10/08 15:54:46]

multiplication

[regis, 2014/10/08 16:58:00]

Done.

+                  static_cast<uint32_t>(rd_lo_val) +
+                  static_cast<uint32_t>(rd_hi_val);
             }
             int32_t hi_res = Utils::High32Bits(result);
             int32_t lo_res = Utils::Low32Bits(result);