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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 968 const Condition cond = al); | 968 const Condition cond = al); |
| 969 void vcvt_f64_f32(const DwVfpRegister dst, | 969 void vcvt_f64_f32(const DwVfpRegister dst, |
| 970 const SwVfpRegister src, | 970 const SwVfpRegister src, |
| 971 ConversionMode mode = RoundToZero, | 971 ConversionMode mode = RoundToZero, |
| 972 const Condition cond = al); | 972 const Condition cond = al); |
| 973 void vcvt_f32_f64(const SwVfpRegister dst, | 973 void vcvt_f32_f64(const SwVfpRegister dst, |
| 974 const DwVfpRegister src, | 974 const DwVfpRegister src, |
| 975 ConversionMode mode = RoundToZero, | 975 ConversionMode mode = RoundToZero, |
| 976 const Condition cond = al); | 976 const Condition cond = al); |
| 977 | 977 |
| 978 void vabs(const DwVfpRegister dst, |
| 979 const DwVfpRegister src, |
| 980 const Condition cond = al); |
| 978 void vadd(const DwVfpRegister dst, | 981 void vadd(const DwVfpRegister dst, |
| 979 const DwVfpRegister src1, | 982 const DwVfpRegister src1, |
| 980 const DwVfpRegister src2, | 983 const DwVfpRegister src2, |
| 981 const Condition cond = al); | 984 const Condition cond = al); |
| 982 void vsub(const DwVfpRegister dst, | 985 void vsub(const DwVfpRegister dst, |
| 983 const DwVfpRegister src1, | 986 const DwVfpRegister src1, |
| 984 const DwVfpRegister src2, | 987 const DwVfpRegister src2, |
| 985 const Condition cond = al); | 988 const Condition cond = al); |
| 986 void vmul(const DwVfpRegister dst, | 989 void vmul(const DwVfpRegister dst, |
| 987 const DwVfpRegister src1, | 990 const DwVfpRegister src1, |
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| 1260 public: | 1263 public: |
| 1261 explicit EnsureSpace(Assembler* assembler) { | 1264 explicit EnsureSpace(Assembler* assembler) { |
| 1262 assembler->CheckBuffer(); | 1265 assembler->CheckBuffer(); |
| 1263 } | 1266 } |
| 1264 }; | 1267 }; |
| 1265 | 1268 |
| 1266 | 1269 |
| 1267 } } // namespace v8::internal | 1270 } } // namespace v8::internal |
| 1268 | 1271 |
| 1269 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1272 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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