| Index: src/mips/debug-mips.cc
|
| diff --git a/src/mips/debug-mips.cc b/src/mips/debug-mips.cc
|
| index 96a146715fd242d38165aa6299c57cd04b00530f..5b3591c81b3326aca58ccc98525f20f708e59900 100644
|
| --- a/src/mips/debug-mips.cc
|
| +++ b/src/mips/debug-mips.cc
|
| @@ -187,7 +187,11 @@ void DebugCodegen::GenerateCallICStubDebugBreak(MacroAssembler* masm) {
|
| void DebugCodegen::GenerateLoadICDebugBreak(MacroAssembler* masm) {
|
| Register receiver = LoadDescriptor::ReceiverRegister();
|
| Register name = LoadDescriptor::NameRegister();
|
| - Generate_DebugBreakCallHelper(masm, receiver.bit() | name.bit(), 0);
|
| + RegList regs = receiver.bit() | name.bit();
|
| + if (FLAG_vector_ics) {
|
| + regs |= VectorLoadICTrampolineDescriptor::SlotRegister().bit();
|
| + }
|
| + Generate_DebugBreakCallHelper(masm, regs, 0);
|
| }
|
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|