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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 718 | 718 |
| 719 void or_(Register dst, int32_t imm32); | 719 void or_(Register dst, int32_t imm32); |
| 720 void or_(Register dst, Register src) { or_(dst, Operand(src)); } | 720 void or_(Register dst, Register src) { or_(dst, Operand(src)); } |
| 721 void or_(Register dst, const Operand& src); | 721 void or_(Register dst, const Operand& src); |
| 722 void or_(const Operand& dst, Register src); | 722 void or_(const Operand& dst, Register src); |
| 723 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); } | 723 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); } |
| 724 void or_(const Operand& dst, const Immediate& x); | 724 void or_(const Operand& dst, const Immediate& x); |
| 725 | 725 |
| 726 void rcl(Register dst, uint8_t imm8); | 726 void rcl(Register dst, uint8_t imm8); |
| 727 void rcr(Register dst, uint8_t imm8); | 727 void rcr(Register dst, uint8_t imm8); |
| 728 void ror(Register dst, uint8_t imm8); | 728 |
| 729 void ror_cl(Register dst); | 729 void ror(Register dst, uint8_t imm8) { ror(Operand(dst), imm8); } |
| 730 void ror(const Operand& dst, uint8_t imm8); |
| 731 void ror_cl(Register dst) { ror_cl(Operand(dst)); } |
| 732 void ror_cl(const Operand& dst); |
| 730 | 733 |
| 731 void sar(Register dst, uint8_t imm8) { sar(Operand(dst), imm8); } | 734 void sar(Register dst, uint8_t imm8) { sar(Operand(dst), imm8); } |
| 732 void sar(const Operand& dst, uint8_t imm8); | 735 void sar(const Operand& dst, uint8_t imm8); |
| 733 void sar_cl(Register dst) { sar_cl(Operand(dst)); } | 736 void sar_cl(Register dst) { sar_cl(Operand(dst)); } |
| 734 void sar_cl(const Operand& dst); | 737 void sar_cl(const Operand& dst); |
| 735 | 738 |
| 736 void sbb(Register dst, const Operand& src); | 739 void sbb(Register dst, const Operand& src); |
| 737 | 740 |
| 738 void shld(Register dst, Register src) { shld(dst, Operand(src)); } | 741 void shld(Register dst, Register src) { shld(dst, Operand(src)); } |
| 739 void shld(Register dst, const Operand& src); | 742 void shld(Register dst, const Operand& src); |
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| 1055 private: | 1058 private: |
| 1056 Assembler* assembler_; | 1059 Assembler* assembler_; |
| 1057 #ifdef DEBUG | 1060 #ifdef DEBUG |
| 1058 int space_before_; | 1061 int space_before_; |
| 1059 #endif | 1062 #endif |
| 1060 }; | 1063 }; |
| 1061 | 1064 |
| 1062 } } // namespace v8::internal | 1065 } } // namespace v8::internal |
| 1063 | 1066 |
| 1064 #endif // V8_X87_ASSEMBLER_X87_H_ | 1067 #endif // V8_X87_ASSEMBLER_X87_H_ |
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