emitIAS for fld and fstp

src/assembler_ia32.cpp

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32  -------------===//
 //
 //                        The Subzero Code Generator
 //
@@ skipping 254 matching lines @@
   EmitUint8(0x40 + cond);
   EmitRegisterOperand(dst, src);
 }
 
 void AssemblerX86::rep_movsb() {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xF3);
   EmitUint8(0xA4);
 }
 
-void AssemblerX86::movss(XmmRegister dst, const Address &src) {
+void AssemblerX86::movss(Type Ty, XmmRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF3);
+  EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   EmitUint8(0x0F);
   EmitUint8(0x10);
   EmitOperand(dst, src);
 }
 
-void AssemblerX86::movss(const Address &dst, XmmRegister src) {
+void AssemblerX86::movss(Type Ty, const Address &dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF3);
+  EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   EmitUint8(0x0F);
   EmitUint8(0x11);
   EmitOperand(src, dst);
 }
 
-void AssemblerX86::movss(XmmRegister dst, XmmRegister src) {
+void AssemblerX86::movss(Type Ty, XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF3);
+  EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   EmitUint8(0x0F);
   EmitUint8(0x11);
   EmitXmmRegisterOperand(src, dst);
 }
 
 void AssemblerX86::movd(XmmRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x66);
   EmitUint8(0x0F);
   EmitUint8(0x6E);
@@ skipping 105 matching lines @@
 }
 
 void AssemblerX86::divss(Type Ty, XmmRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   EmitUint8(0x0F);
   EmitUint8(0x5E);
   EmitOperand(dst, src);
 }
 
-void AssemblerX86::flds(const Address &src) {
+void AssemblerX86::fld(Type Ty, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xD9);
+  EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
   EmitOperand(0, src);
 }
 
-void AssemblerX86::fstps(const Address &dst) {
+void AssemblerX86::fstp(Type Ty, const Address &dst) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xD9);
+  EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
   EmitOperand(3, dst);
 }
 
-void AssemblerX86::movsd(XmmRegister dst, const Address &src) {
+void AssemblerX86::fstp(X87STRegister st) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF2);
-  EmitUint8(0x0F);
-  EmitUint8(0x10);
-  EmitOperand(dst, src);
-}
-
-void AssemblerX86::movsd(const Address &dst, XmmRegister src) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF2);
-  EmitUint8(0x0F);
-  EmitUint8(0x11);
-  EmitOperand(src, dst);
-}
-
-void AssemblerX86::movsd(XmmRegister dst, XmmRegister src) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF2);
-  EmitUint8(0x0F);
-  EmitUint8(0x11);
-  EmitXmmRegisterOperand(src, dst);
+  EmitUint8(0xDD);
+  EmitUint8(0xD8 + st);
 }
 
 void AssemblerX86::movaps(XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0x28);
   EmitXmmRegisterOperand(dst, src);
 }
 
 void AssemblerX86::movups(XmmRegister dst, XmmRegister src) {
@@ skipping 768 matching lines @@
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x66);
   EmitUint8(0x0F);
   EmitUint8(0x3A);
   EmitUint8(0x0B);
   EmitXmmRegisterOperand(dst, src);
   // Mask precision exeption.
   EmitUint8(static_cast<uint8_t>(mode) | 0x8);
 }
 
-void AssemblerX86::fldl(const Address &src) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xDD);
-  EmitOperand(0, src);
-}
-
-void AssemblerX86::fstpl(const Address &dst) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xDD);
-  EmitOperand(3, dst);
-}
-
 void AssemblerX86::fnstcw(const Address &dst) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xD9);
   EmitOperand(7, dst);
 }
 
 void AssemblerX86::fldcw(const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xD9);
   EmitOperand(5, src);
@@ skipping 1084 matching lines @@
   assert(shifter == RegX8632::Encoded_Reg_ecx);
   (void)shifter;
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
   EmitOperand(rm, operand);
 }
 
 } // end of namespace x86
 } // end of namespace Ice