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Issue 634333002: emitIAS for fld and fstp (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: handle st(0) Created 6 years, 2 months ago
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1 //===- subzero/src/IceInstX8632.def - X-macros for x86-32 insts -*- C++ -*-===// 1 //===- subzero/src/IceInstX8632.def - X-macros for x86-32 insts -*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines properties of lowered x86-32 instructions in the 10 // This file defines properties of lowered x86-32 instructions in the
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
81 #define SEG_REGX8632_TABLE \ 81 #define SEG_REGX8632_TABLE \
82 /* enum value, name */ \ 82 /* enum value, name */ \
83 X(SegReg_CS, "cs") \ 83 X(SegReg_CS, "cs") \
84 X(SegReg_DS, "ds") \ 84 X(SegReg_DS, "ds") \
85 X(SegReg_ES, "es") \ 85 X(SegReg_ES, "es") \
86 X(SegReg_SS, "ss") \ 86 X(SegReg_SS, "ss") \
87 X(SegReg_FS, "fs") \ 87 X(SegReg_FS, "fs") \
88 X(SegReg_GS, "gs") \ 88 X(SegReg_GS, "gs") \
89 //#define X(val, name) 89 //#define X(val, name)
90 90
91 // X87 ST(n) registers.
92 #define X87ST_REGX8632_TABLE \
93 /* enum value, encode, name */ \
94 X(X87ST_First, = 0, "st(0)") \
95 X(X87ST_0, = 0, "st(0)") \
96 X(X87ST_1, = 1, "st(1)") \
97 X(X87ST_2, = 2, "st(2)") \
98 X(X87ST_3, = 3, "st(3)") \
99 X(X87ST_4, = 4, "st(4)") \
100 X(X87ST_5, = 5, "st(5)") \
101 X(X87ST_6, = 6, "st(6)") \
102 X(X87ST_7, = 7, "st(7)") \
103 X(X87ST_Last, = 7, "st(7)") \
104 //#define X(val, encode, name)
105
91 #define ICEINSTX8632BR_TABLE \ 106 #define ICEINSTX8632BR_TABLE \
92 /* enum value, encode, opposite, dump, emit */ \ 107 /* enum value, encode, opposite, dump, emit */ \
93 X(Br_o, = 0, Br_no, "o", "jo") \ 108 X(Br_o, = 0, Br_no, "o", "jo") \
94 X(Br_no, = 1, Br_o, "no", "jno") \ 109 X(Br_no, = 1, Br_o, "no", "jno") \
95 X(Br_b, = 2, Br_ae, "b", "jb") \ 110 X(Br_b, = 2, Br_ae, "b", "jb") \
96 X(Br_ae, = 3, Br_b, "ae", "jae") \ 111 X(Br_ae, = 3, Br_b, "ae", "jae") \
97 X(Br_e, = 4, Br_ne, "e", "je") \ 112 X(Br_e, = 4, Br_ne, "e", "je") \
98 X(Br_ne, = 5, Br_e, "ne", "jne") \ 113 X(Br_ne, = 5, Br_e, "ne", "jne") \
99 X(Br_be, = 6, Br_a, "be", "jbe") \ 114 X(Br_be, = 6, Br_a, "be", "jbe") \
100 X(Br_a, = 7, Br_be, "a", "ja") \ 115 X(Br_a, = 7, Br_be, "a", "ja") \
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
133 X(IceType_v4i1, IceType_i32 , "?" , "" , "d", "xmmword ptr") \ 148 X(IceType_v4i1, IceType_i32 , "?" , "" , "d", "xmmword ptr") \
134 X(IceType_v8i1, IceType_i16 , "?" , "" , "w", "xmmword ptr") \ 149 X(IceType_v8i1, IceType_i16 , "?" , "" , "w", "xmmword ptr") \
135 X(IceType_v16i1, IceType_i8 , "?" , "" , "b", "xmmword ptr") \ 150 X(IceType_v16i1, IceType_i8 , "?" , "" , "b", "xmmword ptr") \
136 X(IceType_v16i8, IceType_i8 , "?" , "" , "b", "xmmword ptr") \ 151 X(IceType_v16i8, IceType_i8 , "?" , "" , "b", "xmmword ptr") \
137 X(IceType_v8i16, IceType_i16 , "?" , "" , "w", "xmmword ptr") \ 152 X(IceType_v8i16, IceType_i16 , "?" , "" , "w", "xmmword ptr") \
138 X(IceType_v4i32, IceType_i32 , "dq", "" , "d", "xmmword ptr") \ 153 X(IceType_v4i32, IceType_i32 , "dq", "" , "d", "xmmword ptr") \
139 X(IceType_v4f32, IceType_f32 , "ps", "" , "" , "xmmword ptr") \ 154 X(IceType_v4f32, IceType_f32 , "ps", "" , "" , "xmmword ptr") \
140 //#define X(tag, elementty, cvt, sdss, width) 155 //#define X(tag, elementty, cvt, sdss, width)
141 156
142 #endif // SUBZERO_SRC_ICEINSTX8632_DEF 157 #endif // SUBZERO_SRC_ICEINSTX8632_DEF
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