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Side by Side Diff: runtime/vm/constants_arm64.h

Issue 630093004: Fix 32-bit and 64-bit carry out calculation in arm64 simulator. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 2 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_CONSTANTS_ARM64_H_ 5 #ifndef VM_CONSTANTS_ARM64_H_
6 #define VM_CONSTANTS_ARM64_H_ 6 #define VM_CONSTANTS_ARM64_H_
7 7
8 #include "platform/assert.h" 8 #include "platform/assert.h"
9 9
10 namespace dart { 10 namespace dart {
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413 }; 413 };
414 414
415 // C3.5.1 415 // C3.5.1
416 enum AddSubShiftExtOp { 416 enum AddSubShiftExtOp {
417 AddSubShiftExtMask = 0x1f000000, 417 AddSubShiftExtMask = 0x1f000000,
418 AddSubShiftExtFixed = DPRegisterFixed | B24, 418 AddSubShiftExtFixed = DPRegisterFixed | B24,
419 ADD = AddSubShiftExtFixed, 419 ADD = AddSubShiftExtFixed,
420 SUB = AddSubShiftExtFixed | B30, 420 SUB = AddSubShiftExtFixed | B30,
421 }; 421 };
422 422
423 // C3.5.3
424 enum AddSubWithCarryOp {
425 AddSubWithCarryMask = 0x1fe00000,
426 AddSubWithCarryFixed = DPRegisterFixed | B28,
427 ADC = AddSubWithCarryFixed,
428 SBC = AddSubWithCarryFixed | B30,
429 };
430
423 // C3.5.6 431 // C3.5.6
424 enum ConditionalSelectOp { 432 enum ConditionalSelectOp {
425 ConditionalSelectMask = 0x1fe00000, 433 ConditionalSelectMask = 0x1fe00000,
426 ConditionalSelectFixed = DPRegisterFixed | B28 | B23, 434 ConditionalSelectFixed = DPRegisterFixed | B28 | B23,
427 CSEL = ConditionalSelectFixed, 435 CSEL = ConditionalSelectFixed,
428 CSINC = ConditionalSelectFixed | B10, 436 CSINC = ConditionalSelectFixed | B10,
429 CSINV = ConditionalSelectFixed | B30, 437 CSINV = ConditionalSelectFixed | B30,
430 }; 438 };
431 439
432 // C3.5.8 440 // C3.5.8
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589 _V(UnconditionalBranch) \ 597 _V(UnconditionalBranch) \
590 _V(UnconditionalBranchReg) \ 598 _V(UnconditionalBranchReg) \
591 _V(LoadStoreReg) \ 599 _V(LoadStoreReg) \
592 _V(LoadStoreRegPair) \ 600 _V(LoadStoreRegPair) \
593 _V(LoadRegLiteral) \ 601 _V(LoadRegLiteral) \
594 _V(AddSubImm) \ 602 _V(AddSubImm) \
595 _V(LogicalImm) \ 603 _V(LogicalImm) \
596 _V(MoveWide) \ 604 _V(MoveWide) \
597 _V(PCRel) \ 605 _V(PCRel) \
598 _V(AddSubShiftExt) \ 606 _V(AddSubShiftExt) \
607 _V(AddSubWithCarry) \
599 _V(ConditionalSelect) \ 608 _V(ConditionalSelect) \
600 _V(MiscDP2Source) \ 609 _V(MiscDP2Source) \
601 _V(MiscDP3Source) \ 610 _V(MiscDP3Source) \
602 _V(LogicalShift) \ 611 _V(LogicalShift) \
603 _V(SIMDCopy) \ 612 _V(SIMDCopy) \
604 _V(SIMDThreeSame) \ 613 _V(SIMDThreeSame) \
605 _V(SIMDTwoReg) \ 614 _V(SIMDTwoReg) \
606 _V(FPCompare) \ 615 _V(FPCompare) \
607 _V(FPOneSource) \ 616 _V(FPOneSource) \
608 _V(FPTwoSource) \ 617 _V(FPTwoSource) \
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1037 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } 1046 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
1038 1047
1039 private: 1048 private:
1040 DISALLOW_ALLOCATION(); 1049 DISALLOW_ALLOCATION();
1041 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); 1050 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
1042 }; 1051 };
1043 1052
1044 } // namespace dart 1053 } // namespace dart
1045 1054
1046 #endif // VM_CONSTANTS_ARM64_H_ 1055 #endif // VM_CONSTANTS_ARM64_H_
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