Fix 32-bit and 64-bit carry out calculation in arm64 simulator.

runtime/vm/assembler_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM64_H_
 #define VM_ASSEMBLER_ARM64_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm64.h directly; use assembler.h instead.
 #endif
@@ skipping 493 matching lines @@
   // For an unmodified rm in this case, use Operand(rm, UXTX, 0);
   void add(Register rd, Register rn, Operand o) {
     AddSubHelper(kDoubleWord, false, false, rd, rn, o);
   }
   void adds(Register rd, Register rn, Operand o) {
     AddSubHelper(kDoubleWord, true, false, rd, rn, o);
   }
   void addw(Register rd, Register rn, Operand o) {
     AddSubHelper(kWord, false, false, rd, rn, o);
   }
+  void addsw(Register rd, Register rn, Operand o) {
+    AddSubHelper(kWord, true, false, rd, rn, o);
+  }
   void sub(Register rd, Register rn, Operand o) {
     AddSubHelper(kDoubleWord, false, true, rd, rn, o);
   }
   void subs(Register rd, Register rn, Operand o) {
     AddSubHelper(kDoubleWord, true, true, rd, rn, o);
   }
+  void subw(Register rd, Register rn, Operand o) {
+    AddSubHelper(kWord, false, true, rd, rn, o);
+  }
+  void subsw(Register rd, Register rn, Operand o) {
+    AddSubHelper(kWord, true, true, rd, rn, o);
+  }
+
+  // Addition and subtraction with carry.
+  void adc(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kDoubleWord, false, false, rd, rn, rm);
+  }
+  void adcs(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kDoubleWord, true, false, rd, rn, rm);
+  }
+  void adcw(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kWord, false, false, rd, rn, rm);
+  }
+  void adcsw(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kWord, true, false, rd, rn, rm);
+  }
+  void sbc(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kDoubleWord, false, true, rd, rn, rm);
+  }
+  void sbcs(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kDoubleWord, true, true, rd, rn, rm);
+  }
+  void sbcw(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kWord, false, true, rd, rn, rm);
+  }
+  void sbcsw(Register rd, Register rn, Register rm) {
+    AddSubWithCarryHelper(kWord, true, true, rd, rn, rm);
+  }
 
   // PC relative immediate add. imm is in bytes.
   void adr(Register rd, const Immediate& imm) {
     EmitPCRelOp(ADR, rd, imm);
   }
 
   // Logical immediate operations.
   void andi(Register rd, Register rn, const Immediate& imm) {
     Operand imm_op;
     const bool immok =
@@ skipping 841 matching lines @@
     } else if (o.type() == Operand::Shifted) {
       ASSERT((rd != CSP) && (rn != CSP));
       EmitAddSubShiftExtOp(subtract ? SUB : ADD, crd, crn, o, os, set_flags);
     } else {
       ASSERT(o.type() == Operand::Extended);
       ASSERT((rd != CSP) && (rn != ZR));
       EmitAddSubShiftExtOp(subtract ? SUB : ADD, crd, crn, o, os, set_flags);
     }
   }
 
+  void AddSubWithCarryHelper(OperandSize sz, bool set_flags, bool subtract,
+                             Register rd, Register rn, Register rm) {
+    ASSERT((rd != R31) && (rn != R31) && (rm != R31));
+    ASSERT((rd != CSP) && (rn != CSP) && (rm != CSP));
+    const Register crd = ConcreteRegister(rd);
+    const Register crn = ConcreteRegister(rn);
+    const Register crm = ConcreteRegister(rm);
+    const int32_t size = (sz == kDoubleWord) ? B31 : 0;
+    const int32_t s = set_flags ? B29 : 0;
+    const int32_t op = subtract ? SBC : ADC;
+    const int32_t encoding =
+        op | size | s |
+        (static_cast<int32_t>(crd) << kRdShift) |
+        (static_cast<int32_t>(crn) << kRnShift) |
+        (static_cast<int32_t>(crm) << kRmShift);
+    Emit(encoding);
+  }
+
   void EmitAddSubImmOp(AddSubImmOp op, Register rd, Register rn,
                        Operand o, OperandSize sz, bool set_flags) {
     ASSERT((sz == kDoubleWord) || (sz == kWord) || (sz == kUnsignedWord));
     const int32_t size = (sz == kDoubleWord) ? B31 : 0;
     const int32_t s = set_flags ? B29 : 0;
     const int32_t encoding =
         op | size | s |
         (static_cast<int32_t>(rd) << kRdShift) |
         (static_cast<int32_t>(rn) << kRnShift) |
         o.encoding();
@@ skipping 357 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM64_H_