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| (Empty) |
1 @hex: | |
2 # Test handling of different sizes for instruction prefetch | |
3 # illegal undefined sequence | |
4 0f 18 21 | |
5 # legal SSE prefetch instruction | |
6 0f 18 1c 24 | |
7 @rval: | |
8 VALIDATOR: 0000000000000000: 0f 18 21 inva
lid | |
9 VALIDATOR: ERROR: This instruction has been marked illegal by Native Client | |
10 VALIDATOR: 0000000000000000: 0f 18 21 inva
lid | |
11 VALIDATOR: ERROR: Opcode sequence doesn't define a valid x86 instruction | |
12 VALIDATOR: Checking jump targets: 0 to 7 | |
13 VALIDATOR: Checking that basic blocks are aligned | |
14 *** <input> IS UNSAFE *** | |
15 @dis: | |
16 0000000000000000: 0f 18 21 invalid | |
17 0000000000000003: 0f 18 1c 24 prefetcht2 [%rs
p] | |
18 @vdis: | |
19 0000000000000000: 0f 18 21 invalid | |
20 0000000000000003: 0f 18 1c 24 [P] dontcare [%
rsp] | |
21 @rdfa_output: | |
22 0: [0] unrecognized instruction | |
23 return code: 1 | |
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