src/trusted/validator_x86/testdata/32/ncdis_examples1.internal - Issue 625923004: Delete old x86 validator.

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Issue 625923004: Delete old x86 validator. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client

Patch Set: rebase master Created 6 years, 2 months ago

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1 00000000: 00 00 add %ds:[%eax], %al

2 00 386 OpcodeUsesModRm OpcodeLockable OperandSize_b

3 Add $Eb, $Gb

4 E_Operand OpUse OpSet

5 G_Operand OpUse

6 NaClExpVector[10] = {

7 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

8 { ExprSegmentAddress[2] , 0, ExprSet \| ExprUsed \| ExprSize32 },

9 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

10 { ExprMemOffset[4] , 0, ExprSize32 },

11 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

12 { ExprRegister[0] , %unknown, 0 },

13 { ExprConstant[0] , 1, ExprSize8 },

14 { ExprConstant[0] , 0, ExprSize8 },

15 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

16 { ExprRegister[0] , %al, ExprUsed \| ExprSize8 },

17 };

18 00000000: 00 c0 add %al, %al

19 00 386 OpcodeUsesModRm OpcodeLockable OperandSize_b

20 Add $Eb, $Gb

21 E_Operand OpUse OpSet

22 G_Operand OpUse

23 NaClExpVector[4] = {

24 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

25 { ExprRegister[0] , %al, ExprSet \| ExprUsed \| ExprSize8 },

26 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

27 { ExprRegister[0] , %al, ExprUsed \| ExprSize8 },

28 };

29 00000000: 01 c0 add %eax, %eax

30 01 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsDat a16 OperandSize_w OperandSize_v

31 Add $Ev, $Gv

32 E_Operand OpUse OpSet

33 G_Operand OpUse

34 NaClExpVector[4] = {

35 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

36 { ExprRegister[0] , %eax, ExprSet \| ExprUsed \| ExprSize32 },

37 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

38 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

39 };

40 00000000: 03 18 add %ebx, %ds:[%eax]

41 03 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsDat a16 OperandSize_w OperandSize_v

42 Add $Gv, $Ev

43 G_Operand OpUse OpSet

44 E_Operand OpUse

45 NaClExpVector[10] = {

46 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

47 { ExprRegister[0] , %ebx, ExprSet \| ExprUsed \| ExprSize32 },

48 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

49 { ExprSegmentAddress[2] , 0, ExprUsed \| ExprSize32 },

50 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

51 { ExprMemOffset[4] , 0, ExprSize32 },

52 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

53 { ExprRegister[0] , %unknown, 0 },

54 { ExprConstant[0] , 1, ExprSize8 },

55 { ExprConstant[0] , 0, ExprSize8 },

56 };

57 00000000: 03 1d 20 00 00 00 add %ebx, 0x20

58 03 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsDat a16 OperandSize_w OperandSize_v

59 Add $Gv, $Ev

60 G_Operand OpUse OpSet

61 E_Operand OpUse

62 NaClExpVector[4] = {

63 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

64 { ExprRegister[0] , %ebx, ExprSet \| ExprUsed \| ExprSize32 },

65 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

66 { ExprConstant[0] , 0x20, ExprUsed \| ExprSize32 \| ExprSignedHex },

67 };

68 00000000: 02 04 00 add %al, %ds:[%eax+%eax*1 ]

69 02 386 OpcodeUsesModRm OpcodeLockable OperandSize_b

70 Add $Gb, $Eb

71 G_Operand OpUse OpSet

72 E_Operand OpUse

73 NaClExpVector[10] = {

74 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

75 { ExprRegister[0] , %al, ExprSet \| ExprUsed \| ExprSize8 },

76 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

77 { ExprSegmentAddress[2] , 0, ExprUsed \| ExprSize32 },

78 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

79 { ExprMemOffset[4] , 0, ExprSize32 },

80 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

81 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

82 { ExprConstant[0] , 1, ExprSize8 },

83 { ExprConstant[0] , 0, ExprSize8 },

84 };

85 00000000: d5 0a aad 0xa

86 d5 386 OpcodeHasImmed_b NaClIllegal

87 Aad {%ax}, $Ib

88 RegAX OpUse OpSet OpImplicit

89 I_Operand OpUse

90 NaClExpVector[4] = {

91 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt \| ExprImplicit },

92 { ExprRegister[0] , %ax, ExprSet \| ExprUsed \| ExprSize16 },

93 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

94 { ExprConstant[0] , 0xa, ExprUsed \| ExprSize8 \| ExprUnsignedHex },

95 };

96 00000000: 90 nop

97 [hard coded] 386

98 Nop

99 NaClExpVector[0] = {

100 };

101 00000000: 66 90 nop

102 [hard coded] 386

103 Nop

104 NaClExpVector[0] = {

105 };

106 00000000: 8d 76 00 lea %esi, %ds:[%esi]

107 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsDa ta16 OperandSize_w OperandSize_v

108 Lea $Gv, $M

109 G_Operand OpSet

110 M_Operand OpAddress

111 NaClExpVector[10] = {

112 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

113 { ExprRegister[0] , %esi, ExprSet \| ExprSize32 },

114 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

115 { ExprSegmentAddress[2] , 0, ExprAddress \| ExprSize32 },

116 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

117 { ExprMemOffset[4] , 0, ExprSize32 },

118 { ExprRegister[0] , %esi, ExprUsed \| ExprSize32 },

119 { ExprRegister[0] , %unknown, 0 },

120 { ExprConstant[0] , 1, ExprSize8 },

121 { ExprConstant[0] , 0x0, ExprSize8 \| ExprSignedHex },

122 };

123 00000000: 8d 74 26 00 lea %esi, %ds:[%esi+%esp* 1]

124 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsDa ta16 OperandSize_w OperandSize_v

125 Lea $Gv, $M

126 G_Operand OpSet

127 M_Operand OpAddress

128 NaClExpVector[10] = {

129 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

130 { ExprRegister[0] , %esi, ExprSet \| ExprSize32 },

131 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

132 { ExprSegmentAddress[2] , 0, ExprAddress \| ExprSize32 },

133 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

134 { ExprMemOffset[4] , 0, ExprSize32 },

135 { ExprRegister[0] , %esi, ExprUsed \| ExprSize32 },

136 { ExprRegister[0] , %esp, ExprUsed \| ExprSize32 },

137 { ExprConstant[0] , 1, ExprSize8 },

138 { ExprConstant[0] , 0x0, ExprSize8 \| ExprSignedHex },

139 };

140 00000000: 8d b6 00 00 00 00 lea %esi, %ds:[%esi]

141 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsDa ta16 OperandSize_w OperandSize_v

142 Lea $Gv, $M

143 G_Operand OpSet

144 M_Operand OpAddress

145 NaClExpVector[10] = {

146 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

147 { ExprRegister[0] , %esi, ExprSet \| ExprSize32 },

148 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

149 { ExprSegmentAddress[2] , 0, ExprAddress \| ExprSize32 },

150 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

151 { ExprMemOffset[4] , 0, ExprSize32 },

152 { ExprRegister[0] , %esi, ExprUsed \| ExprSize32 },

153 { ExprRegister[0] , %unknown, 0 },

154 { ExprConstant[0] , 1, ExprSize8 },

155 { ExprConstant[0] , 0x0, ExprSize32 \| ExprSignedHex },

156 };

157 00000000: 8d b4 26 00 00 00 00 lea %esi, %ds:[%esi+%esp* 1]

158 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsDa ta16 OperandSize_w OperandSize_v

159 Lea $Gv, $M

160 G_Operand OpSet

161 M_Operand OpAddress

162 NaClExpVector[10] = {

163 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

164 { ExprRegister[0] , %esi, ExprSet \| ExprSize32 },

165 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

166 { ExprSegmentAddress[2] , 0, ExprAddress \| ExprSize32 },

167 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

168 { ExprMemOffset[4] , 0, ExprSize32 },

169 { ExprRegister[0] , %esi, ExprUsed \| ExprSize32 },

170 { ExprRegister[0] , %esp, ExprUsed \| ExprSize32 },

171 { ExprConstant[0] , 1, ExprSize8 },

172 { ExprConstant[0] , 0x0, ExprSize32 \| ExprSignedHex },

173 };

174 00000000: 89 f6 mov %esi, %esi

175 89 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize _w OperandSize_v

176 Mov $Ev, $Gv

177 E_Operand OpSet

178 G_Operand OpUse

179 NaClExpVector[4] = {

180 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

181 { ExprRegister[0] , %esi, ExprSet \| ExprSize32 },

182 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

183 { ExprRegister[0] , %esi, ExprUsed \| ExprSize32 },

184 };

185 00000000: 8d bc 27 00 00 00 00 lea %edi, %ds:[%edi+%esp* 1]

186 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsDa ta16 OperandSize_w OperandSize_v

187 Lea $Gv, $M

188 G_Operand OpSet

189 M_Operand OpAddress

190 NaClExpVector[10] = {

191 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

192 { ExprRegister[0] , %edi, ExprSet \| ExprSize32 },

193 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

194 { ExprSegmentAddress[2] , 0, ExprAddress \| ExprSize32 },

195 { ExprRegister[0] , %ds, ExprUsed \| ExprSize16 },

196 { ExprMemOffset[4] , 0, ExprSize32 },

197 { ExprRegister[0] , %edi, ExprUsed \| ExprSize32 },

198 { ExprRegister[0] , %esp, ExprUsed \| ExprSize32 },

199 { ExprConstant[0] , 1, ExprSize8 },

200 { ExprConstant[0] , 0x0, ExprSize32 \| ExprSignedHex },

201 };

202 00000000: 0f 1f 00 nop

203 [hard coded] 386

204 Nop

205 NaClExpVector[0] = {

206 };

207 00000000: 0f 1f 40 00 nop

208 [hard coded] 386

209 Nop

210 NaClExpVector[0] = {

211 };

212 00000000: 0f 1f 44 00 00 nop

213 [hard coded] 386

214 Nop

215 NaClExpVector[0] = {

216 };

217 00000000: 66 0f 1f 44 00 00 nop

218 [hard coded] 386

219 Nop

220 NaClExpVector[0] = {

221 };

222 00000000: 0f 1f 80 00 00 00 00 nop

223 [hard coded] 386

224 Nop

225 NaClExpVector[0] = {

226 };

227 00000000: 0f 1f 84 00 00 00 00 00 nop

228 [hard coded] 386

229 Nop

230 NaClExpVector[0] = {

231 };

232 00000000: 66 0f 1f 84 00 00 00 00 00 nop

233 [hard coded] 386

234 Nop

235 NaClExpVector[0] = {

236 };

237 00000000: 66 2e 0f 1f 84 00 00 00 00 00 nop

238 [hard coded] 386

239 Nop

240 NaClExpVector[0] = {

241 };

242 00000000: 66 66 2e 0f 1f 84 00 00 00 00 00 nop

243 [hard coded] 386

244 Nop

245 NaClExpVector[0] = {

246 };

247 00000000: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nop

248 [hard coded] 386

249 Nop

250 NaClExpVector[0] = {

251 };

252 00000000: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nop

253 [hard coded] 386

254 Nop

255 NaClExpVector[0] = {

256 };

257 00000000: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nop

258 [hard coded] 386

259 Nop

260 NaClExpVector[0] = {

261 };

262 00000000: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nop

263 [hard coded] 386

264 Nop

265 NaClExpVector[0] = {

266 };

267 00000000: e3 00 jecxz 0x2

268 e3 386 OpcodeHasImmed OperandSize_b AddressSize_v Con ditionalJump BranchHints

269 Jecxz {%eip}, {%ecx}, $Jb

270 RegEIP OpSet OpImplicit

271 RegECX OpUse OpImplicit

272 J_Operand OpUse OperandNear OperandRelative

273 NaClExpVector[6] = {

274 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt \| ExprImplicit },

275 { ExprRegister[0] , %eip, ExprSet \| ExprSize32 },

276 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt \| ExprImplicit },

277 { ExprRegister[0] , %ecx, ExprUsed \| ExprSize32 },

278 { OperandReference[1] , 2, ExprSize8 \| ExprUnsignedInt },

279 { ExprConstant[0] , 0x2, ExprUsed \| ExprSize8 \| ExprSignedHex \| ExprJumpTarget },

280 };

281 00000000: 67 e3 00 jcxz 0x3

282 e3 386 OpcodeHasImmed OperandSize_b AddressSize_w Con ditionalJump BranchHints

283 Jcxz {%eip}, {%cx}, $Jb

284 RegEIP OpSet OpImplicit

285 RegCX OpUse OpImplicit

286 J_Operand OpUse OperandNear OperandRelative

287 NaClExpVector[6] = {

288 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt \| ExprImplicit },

289 { ExprRegister[0] , %eip, ExprSet \| ExprSize32 },

290 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt \| ExprImplicit },

291 { ExprRegister[0] , %cx, ExprUsed \| ExprSize16 },

292 { OperandReference[1] , 2, ExprSize8 \| ExprUnsignedInt },

293 { ExprConstant[0] , 0x3, ExprUsed \| ExprSize8 \| ExprSignedHex \| ExprJumpTarget },

294 };

295 00000000: 0f 16 d1 movlhps %xmm2, %xmm1

296 0f 16 SSE ModRmModIs0x3 OpcodeUsesModRm

297 Movlhps $Vps, $VRq

298 Xmm_G_Operand OpSet

299 Xmm_E_Operand OpUse

300 NaClExpVector[4] = {

301 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

302 { ExprRegister[0] , %xmm2, ExprSet },

303 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

304 { ExprRegister[0] , %xmm1, ExprUsed },

305 };

306 00000000: 0f 16 a5 00 00 00 00 movhps %xmm4, %ss:[%ebp]

307 0f 16 SSE ModRmModIsnt0x3 OpcodeUsesModRm

308 Movhps $Vps, $Mq

309 Xmm_G_Operand OpSet

310 Mo_Operand OpUse

311 NaClExpVector[10] = {

312 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

313 { ExprRegister[0] , %xmm4, ExprSet },

314 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

315 { ExprSegmentAddress[2] , 0, ExprUsed \| ExprSize32 },

316 { ExprRegister[0] , %ss, ExprUsed \| ExprSize16 },

317 { ExprMemOffset[4] , 0, ExprSize32 },

318 { ExprRegister[0] , %ebp, ExprUsed \| ExprSize32 },

319 { ExprRegister[0] , %unknown, 0 },

320 { ExprConstant[0] , 1, ExprSize8 },

321 { ExprConstant[0] , 0x0, ExprSize32 \| ExprSignedHex },

322 };

323 00000000: 0f ac c1 10 shrd %ecx, %eax, 0x10

324 0f ac 386 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsD ata16 OperandSize_w OperandSize_v

325 Shrd $Ev, $Gv, $Ib

326 E_Operand OpUse OpSet

327 G_Operand OpUse

328 I_Operand OpUse

329 NaClExpVector[6] = {

330 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

331 { ExprRegister[0] , %ecx, ExprSet \| ExprUsed \| ExprSize32 },

332 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

333 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

334 { OperandReference[1] , 2, ExprSize8 \| ExprUnsignedInt },

335 { ExprConstant[0] , 0x10, ExprUsed \| ExprSize8 \| ExprUnsignedHex },

336 };

337 00000000: 0f ad 45 bc shrd %ss:[%ebp-0x44], %ea x, %cl

338 0f ad 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize _w OperandSize_v

339 Shrd $Ev, $Gv, %cl

340 E_Operand OpUse OpSet

341 G_Operand OpUse

342 RegCL OpUse

343 NaClExpVector[12] = {

344 { OperandReference[1] , 0, ExprSize8 \| ExprUnsignedInt },

345 { ExprSegmentAddress[2] , 0, ExprSet \| ExprUsed \| ExprSize32 },

346 { ExprRegister[0] , %ss, ExprUsed \| ExprSize16 },

347 { ExprMemOffset[4] , 0, ExprSize32 },

348 { ExprRegister[0] , %ebp, ExprUsed \| ExprSize32 },

349 { ExprRegister[0] , %unknown, 0 },

350 { ExprConstant[0] , 1, ExprSize8 },

351 { ExprConstant[0] , -0x44, ExprSize8 \| ExprSignedHex },

352 { OperandReference[1] , 1, ExprSize8 \| ExprUnsignedInt },

353 { ExprRegister[0] , %eax, ExprUsed \| ExprSize32 },

354 { OperandReference[1] , 2, ExprSize8 \| ExprUnsignedInt },

355 { ExprRegister[0] , %cl, ExprUsed \| ExprSize8 },

356 };

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