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| 1 /* | |
| 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | |
| 3 * Use of this source code is governed by a BSD-style license that can be | |
| 4 * found in the LICENSE file. | |
| 5 */ | |
| 6 | |
| 7 /* | |
| 8 * Defines register layouts for x86 32 bit hardware registers for | |
| 9 * the use in modrm. | |
| 10 */ | |
| 11 | |
| 12 | |
| 13 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_X86_NACL_REGS32_H_ | |
| 14 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_X86_NACL_REGS32_H_ | |
| 15 | |
| 16 #include "native_client/src/trusted/validator/x86/decoder/ncopcode_desc.h" | |
| 17 | |
| 18 /* Define the number of general purpose registers defined for the given | |
| 19 * subarchitecture. | |
| 20 */ | |
| 21 #define NACL_REG_TABLE_SIZE_32 8 | |
| 22 | |
| 23 /* Defines that the nacl register is not defined. */ | |
| 24 #define NACL_REGISTER_UNDEFINED_32 (-1) | |
| 25 | |
| 26 /* Define the available 8-bit registers, for the given subarchitecture, | |
| 27 * assuming the REX prefix is not present. | |
| 28 * Note: The order is important, and is based on the indexing values used | |
| 29 * in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 30 */ | |
| 31 static const NaClOpKind NaClRegTable8NoRex_32[NACL_REG_TABLE_SIZE_32] = { | |
| 32 RegAL, | |
| 33 RegCL, | |
| 34 RegDL, | |
| 35 RegBL, | |
| 36 RegAH, | |
| 37 RegCH, | |
| 38 RegDH, | |
| 39 RegBH, | |
| 40 }; | |
| 41 | |
| 42 /* Define the available 8-bit registers, for the given subarchitecture, | |
| 43 * assuming the rex prefix is present. | |
| 44 * Note: The order is important, and is based on the indexing values used | |
| 45 * in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 46 */ | |
| 47 static const NaClOpKind NaClRegTable8Rex_32[NACL_REG_TABLE_SIZE_32] = { | |
| 48 RegAL, | |
| 49 RegCL, | |
| 50 RegDL, | |
| 51 RegBL, | |
| 52 RegAH, | |
| 53 RegCH, | |
| 54 RegDH, | |
| 55 RegBH | |
| 56 }; | |
| 57 | |
| 58 /* Define the available 16-bit registers, for the given subarchitecture. | |
| 59 * Note: The order is important, and is based on the indexing values used | |
| 60 * in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 61 */ | |
| 62 static const NaClOpKind NaClRegTable16_32[NACL_REG_TABLE_SIZE_32] = { | |
| 63 RegAX, | |
| 64 RegCX, | |
| 65 RegDX, | |
| 66 RegBX, | |
| 67 RegSP, | |
| 68 RegBP, | |
| 69 RegSI, | |
| 70 RegDI, | |
| 71 }; | |
| 72 | |
| 73 /* Define the available 32-bit registers, for the given subarchitecture. | |
| 74 * Note: The order is important, and is based on the indexing values used | |
| 75 * in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 76 */ | |
| 77 static const NaClOpKind NaClRegTable32_32[NACL_REG_TABLE_SIZE_32] = { | |
| 78 RegEAX, | |
| 79 RegECX, | |
| 80 RegEDX, | |
| 81 RegEBX, | |
| 82 RegESP, | |
| 83 RegEBP, | |
| 84 RegESI, | |
| 85 RegEDI, | |
| 86 }; | |
| 87 | |
| 88 /* Define the available 64-bit registers, for the given subarchitecture. | |
| 89 * Note: The order is important, and is based on the indexing values used | |
| 90 * in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 91 */ | |
| 92 static const NaClOpKind NaClRegTable64_32[NACL_REG_TABLE_SIZE_32] = { | |
| 93 RegUnknown, | |
| 94 RegUnknown, | |
| 95 RegUnknown, | |
| 96 RegUnknown, | |
| 97 RegUnknown, | |
| 98 RegUnknown, | |
| 99 RegUnknown, | |
| 100 RegUnknown | |
| 101 }; | |
| 102 | |
| 103 /* Define the available Mmx registers, for the given subarchitecture. | |
| 104 * Note: The order is important, and is based on the indexing values | |
| 105 * used in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 106 */ | |
| 107 static const NaClOpKind NaClRegTableMmx_32[NACL_REG_TABLE_SIZE_32] = { | |
| 108 RegMMX0, | |
| 109 RegMMX1, | |
| 110 RegMMX2, | |
| 111 RegMMX3, | |
| 112 RegMMX4, | |
| 113 RegMMX5, | |
| 114 RegMMX6, | |
| 115 RegMMX7, | |
| 116 }; | |
| 117 | |
| 118 /* Define the available Xmm registers, for the given subarchitecture. | |
| 119 * Note: The order is important, and is based on the indexing values | |
| 120 * used in the ModRm and SIB bytes (and the REX prefix if appropriate). | |
| 121 */ | |
| 122 static const NaClOpKind NaClRegTableXmm_32[NACL_REG_TABLE_SIZE_32] = { | |
| 123 RegXMM0, | |
| 124 RegXMM1, | |
| 125 RegXMM2, | |
| 126 RegXMM3, | |
| 127 RegXMM4, | |
| 128 RegXMM5, | |
| 129 RegXMM6, | |
| 130 RegXMM7, | |
| 131 }; | |
| 132 | |
| 133 /* Defines the available control registers, for the given subarchitecture. | |
| 134 * Note: The order is important, and is based on the indexing values | |
| 135 * used in the ModRm byte (and the REX prefix if appropriate). | |
| 136 */ | |
| 137 static const NaClOpKind NaClRegTableC_32[NACL_REG_TABLE_SIZE_32] = { | |
| 138 RegCR0, | |
| 139 RegCR1, | |
| 140 RegCR2, | |
| 141 RegCR3, | |
| 142 RegCR4, | |
| 143 RegCR5, | |
| 144 RegCR6, | |
| 145 RegCR7, | |
| 146 }; | |
| 147 | |
| 148 /* Defines the available debug registers, for the given subarchitecture. | |
| 149 * Note: The order is important, and is based on the indexing values | |
| 150 * used in the ModRm byte (and the REX prefix if appropriate). | |
| 151 */ | |
| 152 static const NaClOpKind NaClRegTableD_32[NACL_REG_TABLE_SIZE_32] = { | |
| 153 RegDR0, | |
| 154 RegDR1, | |
| 155 RegDR2, | |
| 156 RegDR3, | |
| 157 RegDR4, | |
| 158 RegDR5, | |
| 159 RegDR6, | |
| 160 RegDR7, | |
| 161 }; | |
| 162 | |
| 163 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_X86_NACL_REGS_H_ */ | |
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