OLD | NEW |
| (Empty) |
1 /* | |
2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | |
3 * Use of this source code is governed by a BSD-style license that can be | |
4 * found in the LICENSE file. | |
5 */ | |
6 | |
7 /* Captures instructions that can be locked. | |
8 * | |
9 * Extracted from zection '1.2.5 Lock Prefix' in AMD Document 25494 - AMD64 | |
10 * Architecture Programmer's Manual, Volume 3: General-Purpose and System | |
11 * Instructions. | |
12 * | |
13 * Note: This is used by the x86-64 validator to decide what operations can | |
14 * be locked. | |
15 */ | |
16 | |
17 #ifndef NACL_TRUSTED_BUT_NOT_TCB | |
18 #error("This file is not meant for use in the TCB") | |
19 #endif | |
20 | |
21 #include "native_client/src/trusted/validator/x86/decoder/generator/lock_insts.h
" | |
22 | |
23 #include "native_client/src/include/nacl_macros.h" | |
24 #include "native_client/src/trusted/validator/x86/decoder/generator/ncdecode_for
ms.h" | |
25 #include "native_client/src/trusted/validator/x86/decoder/generator/ncdecode_tab
legen.h" | |
26 | |
27 /* List of instruction nmemonics that can be locked. */ | |
28 static const NaClMnemonic kLockableOp[] = { | |
29 InstAdc, | |
30 InstAdd, | |
31 InstAnd, | |
32 InstBtc, | |
33 InstBtr, | |
34 InstBts, | |
35 InstCmpxchg, | |
36 /* Note: The following two instructions are not implemented as separate | |
37 * instructions from Cmpxchg, but are separated in the AMD manual. | |
38 */ | |
39 InstCmpxchg8b, | |
40 InstCmpxchg16b, | |
41 InstDec, | |
42 InstInc, | |
43 InstNeg, | |
44 InstNot, | |
45 InstOr, | |
46 InstSbb, | |
47 InstSub, | |
48 InstXadd, | |
49 InstXchg, | |
50 InstXor | |
51 }; | |
52 | |
53 void NaClLockableFlagIfApplicable(void) { | |
54 if (NaClInInstructionSet(kLockableOp, NACL_ARRAY_SIZE(kLockableOp), | |
55 NULL, 0)) { | |
56 NaClAddIFlags(NACL_IFLAG(OpcodeLockable)); | |
57 } | |
58 } | |
OLD | NEW |