emitIAS for icmp, and test, movss-reg, movq, movups, storep, storeq, tighten some of the Xmm ops

tests_lit/llvm2ice_tests/vector-arg.ll

 ; This file checks that Subzero generates code in accordance with the
 ; calling convention for vectors.
 
 ; RUN: %p2i -i %s --args -O2 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %p2i -i %s --args -Om1 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \
 ; RUN:   | FileCheck --check-prefix=OPTM1 %s
@@ skipping 153 matching lines @@
 ; CHECK: movups  [[ARG5:.*]], xmmword ptr [esp + 64]
 ; CHECK: movups  xmmword ptr [esp], [[ARG5]]
 ; CHECK: movups  [[ARG6:.*]], xmmword ptr [esp + 48]
 ; CHECK: movups  xmmword ptr [esp + 16], [[ARG6]]
 ; CHECK: movups  xmm0, xmmword ptr [esp + 128]
 ; CHECK: movups  xmm1, xmmword ptr [esp + 112]
 ; CHECK: movups  xmm2, xmmword ptr [esp + 96]
 ; CHECK: movups  xmm3, xmmword ptr [esp + 80]
 ; CHECK: call -4
 ; CHECK-NEXT: add esp, 32
-; CHECK: ret

[jvoung (off chromium), 2014/10/05 21:17:26]

Since the .byte breaks llvm-mc NaCl bundle padding, this test suddenly got
unlucky and ended w/ a ret, which llvm-objdump doesn't print out right.

 
 ; OPTM1-LABEL: test_passing_vectors:
 ; OPTM1: sub esp, 32
 ; OPTM1: movups  [[ARG5:.*]], xmmword ptr {{.*}}
 ; OPTM1: movups  xmmword ptr [esp], [[ARG5]]
 ; OPTM1: movups  [[ARG6:.*]], xmmword ptr {{.*}}
 ; OPTM1: movups  xmmword ptr [esp + 16], [[ARG6]]
 ; OPTM1: movups  xmm0, xmmword ptr {{.*}}
 ; OPTM1: movups  xmm1, xmmword ptr {{.*}}
 ; OPTM1: movups  xmm2, xmmword ptr {{.*}}
 ; OPTM1: movups  xmm3, xmmword ptr {{.*}}
 ; OPTM1: call -4
 ; OPTM1-NEXT: add esp, 32
-; OPTM1: ret
 }
 
 declare void @InterspersedVectorArgs(<4 x float>, i64, <4 x float>, i64, <4 x float>, float, <4 x float>, double, <4 x float>, i32, <4 x float>)
 
 define void @test_passing_vectors_interspersed(<4 x float> %arg0, <4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3, <4 x float> %arg4, <4 x float> %arg5, <4 x float> %arg6, <4 x float> %arg7, <4 x float> %arg8, <4 x float> %arg9) {
 entry:
   ; Kills XMM registers so that no in-arg lowering code interferes
   ; with the test.
   call void @killXmmRegisters()
   call void @InterspersedVectorArgs(<4 x float> %arg9, i64 0, <4 x float> %arg8, i64 1, <4 x float> %arg7, float 2.000000e+00, <4 x float> %arg6, double 3.000000e+00, <4 x float> %arg5, i32 4, <4 x float> %arg4)
@@ skipping 46 matching lines @@
 ; OPTM1-LABEL: test_receiving_vectors:
 ; OPTM1: call -4
 ; OPTM1: movups {{.*}}, xmm0
 ; OPTM1: movups xmm0, {{.*}}
 ; OPTM1: call -4
 ; OPTM1: ret
 }
 
 ; ERRORS-NOT: ICE translation error
 ; DUMP-NOT: SZ