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Issue 624263002: emitIAS for icmp, and test, movss-reg, movq, movups, storep, storeq, tighten some of the Xmm ops (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: stuff Created 6 years, 2 months ago
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1 ; Tests various aspects of x86 immediate encoding. Some encodings are shorter. 1 ; Tests various aspects of x86 immediate encoding. Some encodings are shorter.
2 ; For example, the encoding is shorter for 8-bit immediates or when using EAX. 2 ; For example, the encoding is shorter for 8-bit immediates or when using EAX.
3 ; This assumes that EAX is chosen as the first free register in O2 mode. 3 ; This assumes that EAX is chosen as the first free register in O2 mode.
4 4
5 ; RUN: %p2i -i %s --args -O2 --verbose none \ 5 ; RUN: %p2i -i %s --args -O2 --verbose none \
6 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ 6 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
7 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s 7 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
8 ; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s 8 ; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s
9 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s 9 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s
10 10
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269 define internal i32 @testShl16Imm1(i32 %arg) { 269 define internal i32 @testShl16Imm1(i32 %arg) {
270 entry: 270 entry:
271 %arg_i16 = trunc i32 %arg to i16 271 %arg_i16 = trunc i32 %arg to i16
272 %tmp = shl i16 %arg_i16, 1 272 %tmp = shl i16 %arg_i16, 1
273 %result = zext i16 %tmp to i32 273 %result = zext i16 %tmp to i32
274 ret i32 %result 274 ret i32 %result
275 } 275 }
276 ; CHECK-LABEL: testShl16Imm1 276 ; CHECK-LABEL: testShl16Imm1
277 ; CHECK: 66 d1 e0 shl ax 277 ; CHECK: 66 d1 e0 shl ax
278 278
279 ; Currently the "test" instruction is used for 64-bit shifts, and
280 ; for ctlz 64-bit, so we use those to test the "test" instruction.
281 ; One optimization for "test": the "test" instruction is essentially a
282 ; bitwise AND that doesn't modify the two source operands, so for immediates
283 ; under 8-bits and registers with 8-bit variants we can use the shorter form.
284
285 define internal i64 @test_via_shl64Bit(i64 %a, i64 %b) {
286 entry:
287 %shl = shl i64 %a, %b
288 ret i64 %shl
289 }
290 ; CHECK-LABEL: test_via_shl64Bit
291 ; CHECK: 0f a5 c2 shld edx, eax, cl
292 ; CHECK: d3 e0 shl eax, cl
293 ; CHECK: f6 c1 20 test cl, 32
294
295 ; Test a few register encodings of "test".
296 declare i64 @llvm.ctlz.i64(i64, i1)
297
298 define i64 @test_via_ctlz_64(i64 %x, i64 %y, i64 %z, i64 %w) {
299 entry:
300 %r = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
301 %r2 = call i64 @llvm.ctlz.i64(i64 %y, i1 false)
302 %r3 = call i64 @llvm.ctlz.i64(i64 %z, i1 false)
303 %r4 = call i64 @llvm.ctlz.i64(i64 %w, i1 false)
304 %res1 = add i64 %r, %r2
305 %res2 = add i64 %r3, %r4
306 %res = add i64 %res1, %res2
307 ret i64 %res
308 }
309 ; CHECK-LABEL: test_via_ctlz_64
310 ; CHECK-DAG: 85 c0 test eax, eax
311 ; CHECK-DAG: 85 db test ebx, ebx
312 ; CHECK-DAG: 85 f6 test esi, esi
313
279 ; ERRORS-NOT: ICE translation error 314 ; ERRORS-NOT: ICE translation error
280 ; DUMP-NOT: SZ 315 ; DUMP-NOT: SZ
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