emitIAS for icmp, and test, movss-reg, movq, movups, storep, storeq, tighten some of the Xmm ops

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 249 matching lines @@
     : InstX8632(Func, InstX8632::Mfence, 0, NULL) {
   HasSideEffects = true;
 }
 
 InstX8632Store::InstX8632Store(Cfg *Func, Operand *Value, OperandX8632 *Mem)
     : InstX8632(Func, InstX8632::Store, 2, NULL) {
   addSource(Value);
   addSource(Mem);
 }
 
-InstX8632StoreP::InstX8632StoreP(Cfg *Func, Operand *Value, OperandX8632 *Mem)
+InstX8632StoreP::InstX8632StoreP(Cfg *Func, Variable *Value,
+                                 OperandX8632Mem *Mem)
     : InstX8632(Func, InstX8632::StoreP, 2, NULL) {
   addSource(Value);
   addSource(Mem);
 }
 
-InstX8632StoreQ::InstX8632StoreQ(Cfg *Func, Operand *Value, OperandX8632 *Mem)
+InstX8632StoreQ::InstX8632StoreQ(Cfg *Func, Variable *Value,
+                                 OperandX8632Mem *Mem)
     : InstX8632(Func, InstX8632::StoreQ, 2, NULL) {
   addSource(Value);
   addSource(Mem);
 }
 
 InstX8632Movsx::InstX8632Movsx(Cfg *Func, Variable *Dest, Operand *Source)
     : InstX8632(Func, InstX8632::Movsx, 1, Dest) {
   addSource(Source);
 }
 
@@ skipping 242 matching lines @@
   } else if (const ConstantInteger32 *Imm =
                  llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
   Ostream &Str = Func->getContext()->getStrEmit();
   emitIASBytes(Str, Asm, StartPosition);
 }
 
+void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const x86::Address &Addr,
+                        const Operand *Src,
+                        const x86::AssemblerX86::GPREmitterAddrOp &Emitter) {
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  // Src can only be Reg or Immediate.
+  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+    assert(SrcVar->hasReg());
+    RegX8632::GPRRegister SrcReg =
+        RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
+    (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg);
+  } else if (const ConstantInteger32 *Imm =
+                 llvm::dyn_cast<ConstantInteger32>(Src)) {
+    (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Imm->getValue()));
+  } else {
+    llvm_unreachable("Unexpected operand type");
+  }
+  Ostream &Str = Func->getContext()->getStrEmit();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
                      const Operand *Src,
                      const x86::AssemblerX86::GPREmitterShiftOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   // Technically, the Dest Var can be mem as well, but we only use Reg.
   // We can extend this to check Dest if we decide to use that form.
   assert(Var->hasReg());
   // We cheat a little and use GPRRegister even for byte operations.
   RegX8632::GPRRegister VarReg =
@@ skipping 39 matching lines @@
   } else if (const ConstantInteger32 *Imm =
                  llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.XmmImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
   Ostream &Str = Func->getContext()->getStrEmit();
   emitIASBytes(Str, Asm, StartPosition);
 }
 
-void
-emitIASVarOperandTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
+void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
                        const Operand *Src,
-                       const x86::AssemblerX86::XmmEmitterTwoOps &Emitter) {
+                       const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(Var->hasReg());
   RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
   if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::XmmRegister SrcReg =
           RegX8632::getEncodedXmm(SrcVar->getRegNum());
       (Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const OperandX8632Mem *Mem =
                  llvm::dyn_cast<OperandX8632Mem>(Src)) {
     x86::Address SrcAddr = Mem->toAsmAddress(Asm);
     (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcAddr);
   } else if (const Constant *Imm = llvm::dyn_cast<Constant>(Src)) {
     (Asm->*(Emitter.XmmAddr))(
         Ty, VarReg, x86::Address::ofConstPool(Func->getContext(), Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
   Ostream &Str = Func->getContext()->getStrEmit();
   emitIASBytes(Str, Asm, StartPosition);
 }
 
+void emitIASMovlikeXMM(const Cfg *Func, const Variable *Dest,
+                       const Operand *Src,
+                       const x86::AssemblerX86::XmmEmitterMovOps Emitter) {
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  if (Dest->hasReg()) {
+    RegX8632::XmmRegister DestReg = RegX8632::getEncodedXmm(Dest->getRegNum());
+    if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+      if (SrcVar->hasReg()) {
+        (Asm->*(Emitter.XmmXmm))(DestReg,
+                                 RegX8632::getEncodedXmm(SrcVar->getRegNum()));
+      } else {
+        x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+                                   ->stackVarToAsmOperand(SrcVar));
+        (Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
+      }
+    } else if (const OperandX8632Mem *SrcMem =
+                   llvm::dyn_cast<OperandX8632Mem>(Src)) {
+      (Asm->*(Emitter.XmmAddr))(DestReg, SrcMem->toAsmAddress(Asm));
+    } else {
+      llvm_unreachable("Unexpected operand type");
+    }
+  } else {
+    x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+                               ->stackVarToAsmOperand(Dest));
+    // Src must be a register in this case.
+    const Variable *SrcVar = llvm::cast<Variable>(Src);
+    assert(SrcVar->hasReg());
+    (Asm->*(Emitter.AddrXmm))(StackAddr,
+                              RegX8632::getEncodedXmm(SrcVar->getRegNum()));
+  }
+  Ostream &Str = Func->getContext()->getStrEmit();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 bool checkForRedundantAssign(const Variable *Dest, const Operand *Source) {
   const Variable *Src = llvm::dyn_cast<const Variable>(Source);
   if (Src == NULL)
     return false;
   if (Dest->hasReg() && Dest->getRegNum() == Src->getRegNum()) {
     // TODO: On x86-64, instructions like "mov eax, eax" are used to
     // clear the upper 32 bits of rax.  We need to recognize and
     // preserve these.
     return true;
   }
@@ skipping 45 matching lines @@
 template <> const char *InstX8632Idiv::Opcode = "idiv";
 template <> const char *InstX8632Divss::Opcode = "divss";
 template <> const char *InstX8632Rol::Opcode = "rol";
 template <> const char *InstX8632Shl::Opcode = "shl";
 template <> const char *InstX8632Psll::Opcode = "psll";
 template <> const char *InstX8632Shr::Opcode = "shr";
 template <> const char *InstX8632Sar::Opcode = "sar";
 template <> const char *InstX8632Psra::Opcode = "psra";
 template <> const char *InstX8632Pcmpeq::Opcode = "pcmpeq";
 template <> const char *InstX8632Pcmpgt::Opcode = "pcmpgt";
-template <> const char *InstX8632Movss::Opcode = "movss";
+template <> const char *InstX8632MovssRegs::Opcode = "movss";
 // Ternary ops
 template <> const char *InstX8632Insertps::Opcode = "insertps";
 template <> const char *InstX8632Shufps::Opcode = "shufps";
 template <> const char *InstX8632Pinsr::Opcode = "pinsr";
 template <> const char *InstX8632Blendvps::Opcode = "blendvps";
 template <> const char *InstX8632Pblendvb::Opcode = "pblendvb";
 // Three address ops
 template <> const char *InstX8632Pextr::Opcode = "pextr";
 template <> const char *InstX8632Pshufd::Opcode = "pshufd";
 
@@ skipping 11 matching lines @@
     &x86::AssemblerX86::bsf, &x86::AssemblerX86::bsf, NULL};
 template <>
 const x86::AssemblerX86::GPREmitterRegOp InstX8632Bsr::Emitter = {
     &x86::AssemblerX86::bsr, &x86::AssemblerX86::bsr, NULL};
 template <>
 const x86::AssemblerX86::GPREmitterRegOp InstX8632Lea::Emitter = {
     /* reg/reg and reg/imm are illegal */ NULL, &x86::AssemblerX86::lea, NULL};
 
 // Unary XMM ops
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Sqrtss::Emitter = {
-    &x86::AssemblerX86::sqrtss, &x86::AssemblerX86::sqrtss, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Sqrtss::Emitter = {
+    &x86::AssemblerX86::sqrtss, &x86::AssemblerX86::sqrtss};
 
 // Binary GPR ops
 template <>
 const x86::AssemblerX86::GPREmitterRegOp InstX8632Add::Emitter = {
     &x86::AssemblerX86::add, &x86::AssemblerX86::add, &x86::AssemblerX86::add};
 template <>
 const x86::AssemblerX86::GPREmitterRegOp InstX8632Adc::Emitter = {
     &x86::AssemblerX86::adc, &x86::AssemblerX86::adc, &x86::AssemblerX86::adc};
 template <>
 const x86::AssemblerX86::GPREmitterRegOp InstX8632And::Emitter = {
@@ skipping 20 matching lines @@
     &x86::AssemblerX86::sar, &x86::AssemblerX86::sar};
 template <>
 const x86::AssemblerX86::GPREmitterShiftOp InstX8632Shl::Emitter = {
     &x86::AssemblerX86::shl, &x86::AssemblerX86::shl};
 template <>
 const x86::AssemblerX86::GPREmitterShiftOp InstX8632Shr::Emitter = {
     &x86::AssemblerX86::shr, &x86::AssemblerX86::shr};
 
 // Binary XMM ops
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Addss::Emitter = {
-    &x86::AssemblerX86::addss, &x86::AssemblerX86::addss, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Addss::Emitter = {
+    &x86::AssemblerX86::addss, &x86::AssemblerX86::addss};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Addps::Emitter = {
-    &x86::AssemblerX86::addps, &x86::AssemblerX86::addps, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Addps::Emitter = {
+    &x86::AssemblerX86::addps, &x86::AssemblerX86::addps};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Divss::Emitter = {
-    &x86::AssemblerX86::divss, &x86::AssemblerX86::divss, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Divss::Emitter = {
+    &x86::AssemblerX86::divss, &x86::AssemblerX86::divss};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Divps::Emitter = {
-    &x86::AssemblerX86::divps, &x86::AssemblerX86::divps, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Divps::Emitter = {
+    &x86::AssemblerX86::divps, &x86::AssemblerX86::divps};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Mulss::Emitter = {
-    &x86::AssemblerX86::mulss, &x86::AssemblerX86::mulss, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Mulss::Emitter = {
+    &x86::AssemblerX86::mulss, &x86::AssemblerX86::mulss};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Mulps::Emitter = {
-    &x86::AssemblerX86::mulps, &x86::AssemblerX86::mulps, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Mulps::Emitter = {
+    &x86::AssemblerX86::mulps, &x86::AssemblerX86::mulps};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Padd::Emitter = {
-    &x86::AssemblerX86::padd, &x86::AssemblerX86::padd, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Padd::Emitter = {
+    &x86::AssemblerX86::padd, &x86::AssemblerX86::padd};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pand::Emitter = {
-    &x86::AssemblerX86::pand, &x86::AssemblerX86::pand, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pand::Emitter = {
+    &x86::AssemblerX86::pand, &x86::AssemblerX86::pand};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pandn::Emitter = {
-    &x86::AssemblerX86::pandn, &x86::AssemblerX86::pandn, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pandn::Emitter = {
+    &x86::AssemblerX86::pandn, &x86::AssemblerX86::pandn};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pcmpeq::Emitter = {
-    &x86::AssemblerX86::pcmpeq, &x86::AssemblerX86::pcmpeq, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pcmpeq::Emitter = {
+    &x86::AssemblerX86::pcmpeq, &x86::AssemblerX86::pcmpeq};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pcmpgt::Emitter = {
-    &x86::AssemblerX86::pcmpgt, &x86::AssemblerX86::pcmpgt, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pcmpgt::Emitter = {
+    &x86::AssemblerX86::pcmpgt, &x86::AssemblerX86::pcmpgt};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pmull::Emitter = {
-    &x86::AssemblerX86::pmull, &x86::AssemblerX86::pmull, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pmull::Emitter = {
+    &x86::AssemblerX86::pmull, &x86::AssemblerX86::pmull};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pmuludq::Emitter = {
-    &x86::AssemblerX86::pmuludq, &x86::AssemblerX86::pmuludq, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pmuludq::Emitter = {
+    &x86::AssemblerX86::pmuludq, &x86::AssemblerX86::pmuludq};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Por::Emitter = {
-    &x86::AssemblerX86::por, &x86::AssemblerX86::por, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Por::Emitter = {
+    &x86::AssemblerX86::por, &x86::AssemblerX86::por};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Psub::Emitter = {
-    &x86::AssemblerX86::psub, &x86::AssemblerX86::psub, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Psub::Emitter = {
+    &x86::AssemblerX86::psub, &x86::AssemblerX86::psub};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Pxor::Emitter = {
-    &x86::AssemblerX86::pxor, &x86::AssemblerX86::pxor, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Pxor::Emitter = {
+    &x86::AssemblerX86::pxor, &x86::AssemblerX86::pxor};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Subss::Emitter = {
-    &x86::AssemblerX86::subss, &x86::AssemblerX86::subss, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Subss::Emitter = {
+    &x86::AssemblerX86::subss, &x86::AssemblerX86::subss};
 template <>
-const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Subps::Emitter = {
-    &x86::AssemblerX86::subps, &x86::AssemblerX86::subps, NULL};
+const x86::AssemblerX86::XmmEmitterRegOp InstX8632Subps::Emitter = {
+    &x86::AssemblerX86::subps, &x86::AssemblerX86::subps};
 
 // Binary XMM Shift ops
 template <>
 const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psll::Emitter = {
     &x86::AssemblerX86::psll, &x86::AssemblerX86::psll,
     &x86::AssemblerX86::psll};
 template <>
 const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psra::Emitter = {
     &x86::AssemblerX86::psra, &x86::AssemblerX86::psra,
     &x86::AssemblerX86::psra};
@@ skipping 47 matching lines @@
   bool InstructionSetIsValid =
       Ty == IceType_v8i16 ||
       static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
           TargetX8632::SSE4_1;
   (void)TypesAreValid;
   (void)InstructionSetIsValid;
   assert(TypesAreValid);
   assert(InstructionSetIsValid);
   assert(getSrcSize() == 2);
   Type ElementTy = typeElementType(Ty);
-  emitIASVarOperandTyXMM(Func, ElementTy, getDest(), getSrc(1), Emitter);
+  emitIASRegOpTyXMM(Func, ElementTy, getDest(), getSrc(1), Emitter);
 }
 
 template <> void InstX8632Subss::emit(const Cfg *Func) const {
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "sub%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Psub::emit(const Cfg *Func) const {
@@ skipping 457 matching lines @@
 void InstX8632Icmp::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tcmp\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Icmp::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 2);
+  const Operand *Src0 = getSrc(0);
+  const Operand *Src1 = getSrc(1);
+  Type Ty = Src0->getType();
+  static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
+      &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp,
+      &x86::AssemblerX86::cmp};
+  static const x86::AssemblerX86::GPREmitterAddrOp AddrEmitter = {
+      &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp};
+  if (const Variable *SrcVar0 = llvm::dyn_cast<Variable>(Src0)) {
+    if (SrcVar0->hasReg()) {
+      emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
+    } else {
+      x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+                                 ->stackVarToAsmOperand(SrcVar0));
+      emitIASAddrOpTyGPR(Func, Ty, StackAddr, Src1, AddrEmitter);
+    }
+  } else if (const OperandX8632Mem *SrcMem0 =
+                 llvm::dyn_cast<OperandX8632Mem>(Src0)) {
+    x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+    emitIASAddrOpTyGPR(Func, Ty, SrcMem0->toAsmAddress(Asm), Src1, AddrEmitter);
+  }
+}
+
 void InstX8632Icmp::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "cmp." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Ucomiss::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tucomi" << TypeX8632Attributes[getSrc(0)->getType()].SdSsString
       << "\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Ucomiss::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   // Currently src0 is always a variable by convention, to avoid having
   // two memory operands.
   assert(llvm::isa<Variable>(getSrc(0)));
   const Variable *Src0 = llvm::cast<Variable>(getSrc(0));
   Type Ty = Src0->getType();
-  const static x86::AssemblerX86::XmmEmitterTwoOps Emitter = {
-      &x86::AssemblerX86::ucomiss, &x86::AssemblerX86::ucomiss, NULL};
-  emitIASVarOperandTyXMM(Func, Ty, Src0, getSrc(1), Emitter);
+  const static x86::AssemblerX86::XmmEmitterRegOp Emitter = {
+      &x86::AssemblerX86::ucomiss, &x86::AssemblerX86::ucomiss};
+  emitIASRegOpTyXMM(Func, Ty, Src0, getSrc(1), Emitter);
 }
 
 void InstX8632Ucomiss::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ucomiss." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632UD2::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tud2\n";
 }
 
+void InstX8632UD2::emitIAS(const Cfg *Func) const {
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Asm->ud2();
+  Ostream &Str = Func->getContext()->getStrEmit();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632UD2::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ud2\n";
 }
 
 void InstX8632Test::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\ttest\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Test::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 2);
+  const Operand *Src0 = getSrc(0);
+  const Operand *Src1 = getSrc(1);
+  Type Ty = Src0->getType();
+  // The Reg/Addr form of test is not encodeable.
+  static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
+      &x86::AssemblerX86::test, NULL, &x86::AssemblerX86::test};
+  static const x86::AssemblerX86::GPREmitterAddrOp AddrEmitter = {
+      &x86::AssemblerX86::test, &x86::AssemblerX86::test};
+  if (const Variable *SrcVar0 = llvm::dyn_cast<Variable>(Src0)) {
+    if (SrcVar0->hasReg()) {
+      emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
+    } else {
+      llvm_unreachable("Nothing actually generates this so it's untested");
+      x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+                                 ->stackVarToAsmOperand(SrcVar0));
+      emitIASAddrOpTyGPR(Func, Ty, StackAddr, Src1, AddrEmitter);
+    }
+  } else if (const OperandX8632Mem *SrcMem0 =
+                 llvm::dyn_cast<OperandX8632Mem>(Src0)) {
+    llvm_unreachable("Nothing actually generates this so it's untested");
+    x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+    emitIASAddrOpTyGPR(Func, Ty, SrcMem0->toAsmAddress(Asm), Src1, AddrEmitter);
+  }
+}
+
 void InstX8632Test::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "test." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Mfence::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tmfence\n";
@@ skipping 34 matching lines @@
 void InstX8632StoreP::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tmovups\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632StoreP::emitIAS(const Cfg *Func) const {
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  assert(getSrcSize() == 2);
+  const Variable *Src = llvm::cast<Variable>(getSrc(0));
+  const OperandX8632Mem *DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
+  assert(Src->hasReg());
+  Asm->movups(DestMem->toAsmAddress(Asm),
+              RegX8632::getEncodedXmm(Src->getRegNum()));
+  Ostream &Str = Func->getContext()->getStrEmit();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632StoreP::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storep." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
 void InstX8632StoreQ::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(getSrc(1)->getType() == IceType_i64 ||
          getSrc(1)->getType() == IceType_f64);
   Str << "\tmovq\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632StoreQ::emitIAS(const Cfg *Func) const {
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  assert(getSrcSize() == 2);
+  const Variable *Src = llvm::cast<Variable>(getSrc(0));
+  const OperandX8632Mem *DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
+  assert(Src->hasReg());
+  Asm->movq(DestMem->toAsmAddress(Asm),
+            RegX8632::getEncodedXmm(Src->getRegNum()));
+  Ostream &Str = Func->getContext()->getStrEmit();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632StoreQ::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storeq." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
 template <> void InstX8632Lea::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
@@ skipping 107 matching lines @@
   // operands.
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovups\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
+template <> void InstX8632Movp::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 1);
+  assert(isVectorType(getDest()->getType()));
+  const Variable *Dest = getDest();
+  const Operand *Src = getSrc(0);
+  const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
+      &x86::AssemblerX86::movups, &x86::AssemblerX86::movups,
+      &x86::AssemblerX86::movups};
+  emitIASMovlikeXMM(Func, Dest, Src, Emitter);
+}
+
 template <> void InstX8632Movq::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   assert(getDest()->getType() == IceType_i64 ||
          getDest()->getType() == IceType_f64);
   Str << "\tmovq\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
+template <> void InstX8632Movq::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 1);
+  assert(getDest()->getType() == IceType_i64 ||
+         getDest()->getType() == IceType_f64);
+  const Variable *Dest = getDest();
+  const Operand *Src = getSrc(0);
+  const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
+      &x86::AssemblerX86::movq, &x86::AssemblerX86::movq,
+      &x86::AssemblerX86::movq};
+  emitIASMovlikeXMM(Func, Dest, Src, Emitter);
+}
+
+template <> void InstX8632MovssRegs::emitIAS(const Cfg *Func) const {
+  // This is Binop variant is only intended to be used for reg-reg moves
+  // where part of the Dest register is untouched.
+  assert(getSrcSize() == 2);
+  const Variable *Dest = getDest();
+  assert(Dest == getSrc(0));
+  const Variable *Src = llvm::cast<Variable>(getSrc(1));
+  assert(Dest->hasReg() && Src->hasReg());
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Asm->movss(RegX8632::getEncodedXmm(Dest->getRegNum()),
+             RegX8632::getEncodedXmm(Src->getRegNum()));
+  Ostream &Str = Func->getContext()->getStrEmit();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Movsx::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovsx\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
@@ skipping 538 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice