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| 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
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| 4298 if (RegNum == Variable::NoRegister) | 4298 if (RegNum == Variable::NoRegister) |
| 4299 Reg->setWeightInfinite(); | 4299 Reg->setWeightInfinite(); |
| 4300 else | 4300 else |
| 4301 Reg->setRegNum(RegNum); | 4301 Reg->setRegNum(RegNum); |
| 4302 return Reg; | 4302 return Reg; |
| 4303 } | 4303 } |
| 4304 | 4304 |
| 4305 void TargetX8632::postLower() { | 4305 void TargetX8632::postLower() { |
| 4306 if (Ctx->getOptLevel() != Opt_m1) | 4306 if (Ctx->getOptLevel() != Opt_m1) |
| 4307 return; | 4307 return; |
| 4308 static TimerIdT IDpostLower = GlobalContext::getTimerID("postLower"); |
| 4309 TimerMarker T(IDpostLower, Ctx); |
| 4308 // TODO: Avoid recomputing WhiteList every instruction. | 4310 // TODO: Avoid recomputing WhiteList every instruction. |
| 4309 RegSetMask RegInclude = RegSet_All; | 4311 RegSetMask RegInclude = RegSet_All; |
| 4310 RegSetMask RegExclude = RegSet_StackPointer; | 4312 RegSetMask RegExclude = RegSet_StackPointer; |
| 4311 if (hasFramePointer()) | 4313 if (hasFramePointer()) |
| 4312 RegExclude |= RegSet_FramePointer; | 4314 RegExclude |= RegSet_FramePointer; |
| 4313 llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude); | 4315 llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude); |
| 4314 // Make one pass to black-list pre-colored registers. TODO: If | 4316 // Make one pass to black-list pre-colored registers. TODO: If |
| 4315 // there was some prior register allocation pass that made register | 4317 // there was some prior register allocation pass that made register |
| 4316 // assignments, those registers need to be black-listed here as | 4318 // assignments, those registers need to be black-listed here as |
| 4317 // well. | 4319 // well. |
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| 4518 Str << "\t.align\t" << Align << "\n"; | 4520 Str << "\t.align\t" << Align << "\n"; |
| 4519 Str << MangledName << ":\n"; | 4521 Str << MangledName << ":\n"; |
| 4520 for (SizeT i = 0; i < Size; ++i) { | 4522 for (SizeT i = 0; i < Size; ++i) { |
| 4521 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; | 4523 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; |
| 4522 } | 4524 } |
| 4523 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; | 4525 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; |
| 4524 } | 4526 } |
| 4525 } | 4527 } |
| 4526 | 4528 |
| 4527 } // end of namespace Ice | 4529 } // end of namespace Ice |
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