Handle GPR and vector shift ops. Handle pmull also.

tests_lit/llvm2ice_tests/8bit.pnacl.ll

 ; This tries to be a comprehensive test of i8 operations.
 
 ; RUN: %p2i -i %s --args -O2 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %p2i -i %s --args -Om1 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s
 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s
@@ skipping 141 matching lines @@
 define internal i32 @srem8BitConst(i32 %a, i32 %b) {
 entry:
   %a_8 = trunc i32 %a to i8
   %srem = srem i8 %a_8, 123
   %ret = zext i8 %srem to i32
   ret i32 %ret
 }
 ; CHECK-LABEL: srem8BitConst
 ; CHECK: idiv {{[abcd]l|byte ptr}}
 
+define internal i32 @shl8Bit(i32 %a, i32 %b) {
+entry:
+  %a_8 = trunc i32 %a to i8
+  %b_8 = trunc i32 %b to i8
+  %shl = shl i8 %b_8, %a_8
+  %ret = zext i8 %shl to i32
+  ret i32 %ret
+}
+; CHECK-LABEL: shl8Bit
+; CHECK: shl {{[abcd]l|byte ptr}}, cl

[Jim Stichnoth, 2014/10/02 20:35:17]

Maybe [abd]l ?  Shouldn't be shifting cl by cl.

[jvoung (off chromium), 2014/10/02 22:04:13]

Ah right -- Done

+
+define internal i32 @shl8BitConst(i32 %a, i32 %b) {
+entry:
+  %a_8 = trunc i32 %a to i8
+  %shl = shl i8 %a_8, 6
+  %ret = zext i8 %shl to i32
+  ret i32 %ret
+}
+; CHECK-LABEL: shl8BitConst
+; CHECK: shl {{[abcd]l|byte ptr}}, 6
+
+define internal i32 @lshr8Bit(i32 %a, i32 %b) {
+entry:
+  %a_8 = trunc i32 %a to i8
+  %b_8 = trunc i32 %b to i8
+  %lshr = lshr i8 %b_8, %a_8
+  %ret = zext i8 %lshr to i32
+  ret i32 %ret
+}
+; CHECK-LABEL: lshr8Bit
+; CHECK: shr {{[abcd]l|byte ptr}}, cl
+
+define internal i32 @lshr8BitConst(i32 %a, i32 %b) {
+entry:
+  %a_8 = trunc i32 %a to i8
+  %lshr = lshr i8 %a_8, 6
+  %ret = zext i8 %lshr to i32
+  ret i32 %ret
+}
+; CHECK-LABEL: lshr8BitConst
+; CHECK: shr {{[abcd]l|byte ptr}}, 6
+
+define internal i32 @ashr8Bit(i32 %a, i32 %b) {
+entry:
+  %a_8 = trunc i32 %a to i8
+  %b_8 = trunc i32 %b to i8
+  %ashr = ashr i8 %b_8, %a_8
+  %ret = zext i8 %ashr to i32
+  ret i32 %ret
+}
+; CHECK-LABEL: ashr8Bit
+; CHECK: sar {{[abcd]l|byte ptr}}, cl
+
+define internal i32 @ashr8BitConst(i32 %a, i32 %b) {
+entry:
+  %a_8 = trunc i32 %a to i8
+  %ashr = ashr i8 %a_8, 6
+  %ret = zext i8 %ashr to i32
+  ret i32 %ret
+}
+; CHECK-LABEL: ashr8BitConst
+; CHECK: sar {{[abcd]l|byte ptr}}, 6
+
 
 ; ERRORS-NOT: ICE translation error
 ; DUMP-NOT: SZ