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Side by Side Diff: runtime/vm/assembler_ia32.cc

Issue 620553002: Provide ia32 intrinsics for bigint add, sub, quotient digit estimation, and (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 2 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/cpu.h" 10 #include "vm/cpu.h"
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1591 1591
1592 void Assembler::cdq() { 1592 void Assembler::cdq() {
1593 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1593 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1594 EmitUint8(0x99); 1594 EmitUint8(0x99);
1595 } 1595 }
1596 1596
1597 1597
1598 void Assembler::idivl(Register reg) { 1598 void Assembler::idivl(Register reg) {
1599 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1599 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1600 EmitUint8(0xF7); 1600 EmitUint8(0xF7);
1601 EmitUint8(0xF8 | reg); 1601 EmitOperand(7, Operand(reg));
1602 }
1603
1604
1605 void Assembler::divl(Register reg) {
1606 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1607 EmitUint8(0xF7);
1608 EmitOperand(6, Operand(reg));
1602 } 1609 }
1603 1610
1604 1611
1605 void Assembler::imull(Register dst, Register src) { 1612 void Assembler::imull(Register dst, Register src) {
1606 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1613 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1607 EmitUint8(0x0F); 1614 EmitUint8(0x0F);
1608 EmitUint8(0xAF); 1615 EmitUint8(0xAF);
1609 EmitOperand(dst, Operand(src)); 1616 EmitOperand(dst, Operand(src));
1610 } 1617 }
1611 1618
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2867 2874
2868 const char* Assembler::FpuRegisterName(FpuRegister reg) { 2875 const char* Assembler::FpuRegisterName(FpuRegister reg) {
2869 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 2876 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
2870 return xmm_reg_names[reg]; 2877 return xmm_reg_names[reg];
2871 } 2878 }
2872 2879
2873 2880
2874 } // namespace dart 2881 } // namespace dart
2875 2882
2876 #endif // defined TARGET_ARCH_IA32 2883 #endif // defined TARGET_ARCH_IA32
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