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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 620373004: Subzero: Add a few performance measurement tools. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Minor fixes Created 6 years, 2 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
(...skipping 295 matching lines...) Expand 10 before | Expand all | Expand 10 after
306 TypeToRegisterSet[IceType_v4i1] = VectorRegisters; 306 TypeToRegisterSet[IceType_v4i1] = VectorRegisters;
307 TypeToRegisterSet[IceType_v8i1] = VectorRegisters; 307 TypeToRegisterSet[IceType_v8i1] = VectorRegisters;
308 TypeToRegisterSet[IceType_v16i1] = VectorRegisters; 308 TypeToRegisterSet[IceType_v16i1] = VectorRegisters;
309 TypeToRegisterSet[IceType_v16i8] = VectorRegisters; 309 TypeToRegisterSet[IceType_v16i8] = VectorRegisters;
310 TypeToRegisterSet[IceType_v8i16] = VectorRegisters; 310 TypeToRegisterSet[IceType_v8i16] = VectorRegisters;
311 TypeToRegisterSet[IceType_v4i32] = VectorRegisters; 311 TypeToRegisterSet[IceType_v4i32] = VectorRegisters;
312 TypeToRegisterSet[IceType_v4f32] = VectorRegisters; 312 TypeToRegisterSet[IceType_v4f32] = VectorRegisters;
313 } 313 }
314 314
315 void TargetX8632::translateO2() { 315 void TargetX8632::translateO2() {
316 GlobalContext *Context = Func->getContext();
317 static TimerIdT IDO2 = GlobalContext::getTimerID("O2"); 316 static TimerIdT IDO2 = GlobalContext::getTimerID("O2");
318 TimerMarker T(IDO2, Context); 317 TimerMarker T(IDO2, Func);
319 318
320 // Lower Phi instructions. 319 // Lower Phi instructions.
321 Func->placePhiLoads(); 320 Func->placePhiLoads();
322 if (Func->hasError()) 321 if (Func->hasError())
323 return; 322 return;
324 Func->placePhiStores(); 323 Func->placePhiStores();
325 if (Func->hasError()) 324 if (Func->hasError())
326 return; 325 return;
327 Func->deletePhis(); 326 Func->deletePhis();
328 if (Func->hasError()) 327 if (Func->hasError())
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
393 Func->doBranchOpt(); 392 Func->doBranchOpt();
394 Func->dump("After branch optimization"); 393 Func->dump("After branch optimization");
395 394
396 // Nop insertion 395 // Nop insertion
397 if (shouldDoNopInsertion()) { 396 if (shouldDoNopInsertion()) {
398 Func->doNopInsertion(); 397 Func->doNopInsertion();
399 } 398 }
400 } 399 }
401 400
402 void TargetX8632::translateOm1() { 401 void TargetX8632::translateOm1() {
403 GlobalContext *Context = Func->getContext();
404 static TimerIdT IDOm1 = GlobalContext::getTimerID("Om1"); 402 static TimerIdT IDOm1 = GlobalContext::getTimerID("Om1");
405 TimerMarker T(IDOm1, Context); 403 TimerMarker T(IDOm1, Func);
406 Func->placePhiLoads(); 404 Func->placePhiLoads();
407 if (Func->hasError()) 405 if (Func->hasError())
408 return; 406 return;
409 Func->placePhiStores(); 407 Func->placePhiStores();
410 if (Func->hasError()) 408 if (Func->hasError())
411 return; 409 return;
412 Func->deletePhis(); 410 Func->deletePhis();
413 if (Func->hasError()) 411 if (Func->hasError())
414 return; 412 return;
415 Func->dump("After Phi lowering"); 413 Func->dump("After Phi lowering");
(...skipping 3883 matching lines...) Expand 10 before | Expand all | Expand 10 after
4299 Reg->setWeightInfinite(); 4297 Reg->setWeightInfinite();
4300 else 4298 else
4301 Reg->setRegNum(RegNum); 4299 Reg->setRegNum(RegNum);
4302 return Reg; 4300 return Reg;
4303 } 4301 }
4304 4302
4305 void TargetX8632::postLower() { 4303 void TargetX8632::postLower() {
4306 if (Ctx->getOptLevel() != Opt_m1) 4304 if (Ctx->getOptLevel() != Opt_m1)
4307 return; 4305 return;
4308 static TimerIdT IDpostLower = GlobalContext::getTimerID("postLower"); 4306 static TimerIdT IDpostLower = GlobalContext::getTimerID("postLower");
4309 TimerMarker T(IDpostLower, Ctx); 4307 TimerMarker T(IDpostLower, Func);
4310 // TODO: Avoid recomputing WhiteList every instruction. 4308 // TODO: Avoid recomputing WhiteList every instruction.
4311 RegSetMask RegInclude = RegSet_All; 4309 RegSetMask RegInclude = RegSet_All;
4312 RegSetMask RegExclude = RegSet_StackPointer; 4310 RegSetMask RegExclude = RegSet_StackPointer;
4313 if (hasFramePointer()) 4311 if (hasFramePointer())
4314 RegExclude |= RegSet_FramePointer; 4312 RegExclude |= RegSet_FramePointer;
4315 llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude); 4313 llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude);
4316 // Make one pass to black-list pre-colored registers. TODO: If 4314 // Make one pass to black-list pre-colored registers. TODO: If
4317 // there was some prior register allocation pass that made register 4315 // there was some prior register allocation pass that made register
4318 // assignments, those registers need to be black-listed here as 4316 // assignments, those registers need to be black-listed here as
4319 // well. 4317 // well.
(...skipping 200 matching lines...) Expand 10 before | Expand all | Expand 10 after
4520 Str << "\t.align\t" << Align << "\n"; 4518 Str << "\t.align\t" << Align << "\n";
4521 Str << MangledName << ":\n"; 4519 Str << MangledName << ":\n";
4522 for (SizeT i = 0; i < Size; ++i) { 4520 for (SizeT i = 0; i < Size; ++i) {
4523 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n"; 4521 Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n";
4524 } 4522 }
4525 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; 4523 Str << "\t.size\t" << MangledName << ", " << Size << "\n";
4526 } 4524 }
4527 } 4525 }
4528 4526
4529 } // end of namespace Ice 4527 } // end of namespace Ice
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