Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(144)

Side by Side Diff: src/x64/disasm-x64.cc

Issue 619903005: fix imul(reg, op, imm) emission on x64 (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/x64/assembler-x64.cc ('k') | test/cctest/test-disasm-x64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 8
9 #include "src/v8.h" 9 #include "src/v8.h"
10 10
(...skipping 1468 matching lines...) Expand 10 before | Expand all | Expand 10 after
1479 // need to do special processing on it. 1479 // need to do special processing on it.
1480 if (!processed) { 1480 if (!processed) {
1481 switch (*data) { 1481 switch (*data) {
1482 case 0xC2: 1482 case 0xC2:
1483 AppendToBuffer("ret 0x%x", *reinterpret_cast<uint16_t*>(data + 1)); 1483 AppendToBuffer("ret 0x%x", *reinterpret_cast<uint16_t*>(data + 1));
1484 data += 3; 1484 data += 3;
1485 break; 1485 break;
1486 1486
1487 case 0x69: // fall through 1487 case 0x69: // fall through
1488 case 0x6B: { 1488 case 0x6B: {
1489 int mod, regop, rm; 1489 int count = 1;
1490 get_modrm(*(data + 1), &mod, &regop, &rm); 1490 count += PrintOperands("imul", REG_OPER_OP_ORDER, data + count);
1491 int32_t imm = *data == 0x6B ? *(data + 2) 1491 AppendToBuffer(",0x");
1492 : *reinterpret_cast<int32_t*>(data + 2); 1492 if (*data == 0x69) {
1493 AppendToBuffer("imul%c %s,%s,0x%x", 1493 count += PrintImmediate(data + count, operand_size());
1494 operand_size_code(), 1494 } else {
1495 NameOfCPURegister(regop), 1495 count += PrintImmediate(data + count, OPERAND_BYTE_SIZE);
1496 NameOfCPURegister(rm), imm); 1496 }
1497 data += 2 + (*data == 0x6B ? 1 : 4); 1497 data += count;
1498 break; 1498 break;
1499 } 1499 }
1500 1500
1501 case 0x81: // fall through 1501 case 0x81: // fall through
1502 case 0x83: // 0x81 with sign extension bit set 1502 case 0x83: // 0x81 with sign extension bit set
1503 data += PrintImmediateOp(data); 1503 data += PrintImmediateOp(data);
1504 break; 1504 break;
1505 1505
1506 case 0x0F: 1506 case 0x0F:
1507 data += TwoByteOpcodeInstruction(data); 1507 data += TwoByteOpcodeInstruction(data);
(...skipping 395 matching lines...) Expand 10 before | Expand all | Expand 10 after
1903 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { 1903 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
1904 fprintf(f, " "); 1904 fprintf(f, " ");
1905 } 1905 }
1906 fprintf(f, " %s\n", buffer.start()); 1906 fprintf(f, " %s\n", buffer.start());
1907 } 1907 }
1908 } 1908 }
1909 1909
1910 } // namespace disasm 1910 } // namespace disasm
1911 1911
1912 #endif // V8_TARGET_ARCH_X64 1912 #endif // V8_TARGET_ARCH_X64
OLDNEW
« no previous file with comments | « src/x64/assembler-x64.cc ('k') | test/cctest/test-disasm-x64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698