| Index: src/IceCfgNode.cpp
|
| diff --git a/src/IceCfgNode.cpp b/src/IceCfgNode.cpp
|
| index 011b04dd0f01463b6a71c1d5f3b3e5cdef705511..f3640f12c97b9f4e66eced7527279e17a0492d6d 100644
|
| --- a/src/IceCfgNode.cpp
|
| +++ b/src/IceCfgNode.cpp
|
| @@ -55,14 +55,10 @@ void CfgNode::appendInst(Inst *Inst) {
|
| // instruction numbers in a block, from lowest to highest, must not
|
| // overlap with the range of any other block.
|
| void CfgNode::renumberInstructions() {
|
| - for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - (*I)->renumber(Func);
|
| - }
|
| - InstList::const_iterator I = Insts.begin(), E = Insts.end();
|
| - while (I != E) {
|
| - Inst *Inst = *I++;
|
| - Inst->renumber(Func);
|
| - }
|
| + for (auto &I : Phis)
|
| + I->renumber(Func);
|
| + for (auto &I : Insts)
|
| + I->renumber(Func);
|
| }
|
|
|
| // When a node is created, the OutEdges are immediately knows, but the
|
| @@ -71,11 +67,8 @@ void CfgNode::renumberInstructions() {
|
| // creating the InEdges list.
|
| void CfgNode::computePredecessors() {
|
| OutEdges = (*Insts.rbegin())->getTerminatorEdges();
|
| - for (NodeList::const_iterator I = OutEdges.begin(), E = OutEdges.end();
|
| - I != E; ++I) {
|
| - CfgNode *Node = *I;
|
| + for (auto &Node : OutEdges)
|
| Node->InEdges.push_back(this);
|
| - }
|
| }
|
|
|
| // This does part 1 of Phi lowering, by creating a new dest variable
|
| @@ -90,10 +83,8 @@ void CfgNode::computePredecessors() {
|
| // instructions and appends assignment instructions to predecessor
|
| // blocks. Note that this transformation preserves SSA form.
|
| void CfgNode::placePhiLoads() {
|
| - for (PhiList::iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - Inst *Inst = (*I)->lower(Func);
|
| - Insts.insert(Insts.begin(), Inst);
|
| - }
|
| + for (auto &I : Phis)
|
| + Insts.insert(Insts.begin(), I->lower(Func));
|
| }
|
|
|
| // This does part 2 of Phi lowering. For each Phi instruction at each
|
| @@ -188,16 +179,12 @@ void CfgNode::placePhiStores() {
|
| }
|
|
|
| // Consider every out-edge.
|
| - for (NodeList::const_iterator I1 = OutEdges.begin(), E1 = OutEdges.end();
|
| - I1 != E1; ++I1) {
|
| - CfgNode *Target = *I1;
|
| + for (auto &Target : OutEdges) {
|
| // Consider every Phi instruction at the out-edge.
|
| - for (PhiList::const_iterator I2 = Target->Phis.begin(),
|
| - E2 = Target->Phis.end();
|
| - I2 != E2; ++I2) {
|
| - Operand *Operand = (*I2)->getOperandForTarget(this);
|
| + for (auto &I2 : Target->Phis) {
|
| + Operand *Operand = I2->getOperandForTarget(this);
|
| assert(Operand);
|
| - Variable *Dest = (*I2)->getDest();
|
| + Variable *Dest = I2->getDest();
|
| assert(Dest);
|
| InstAssign *NewInst = InstAssign::create(Func, Dest, Operand);
|
| if (CmpInstDest == Operand)
|
| @@ -210,9 +197,8 @@ void CfgNode::placePhiStores() {
|
|
|
| // Deletes the phi instructions after the loads and stores are placed.
|
| void CfgNode::deletePhis() {
|
| - for (PhiList::iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - (*I)->setDeleted();
|
| - }
|
| + for (auto &I : Phis)
|
| + I->setDeleted();
|
| }
|
|
|
| // Does address mode optimization. Pass each instruction to the
|
| @@ -267,16 +253,15 @@ void CfgNode::livenessLightweight() {
|
| SizeT NumVars = Func->getNumVariables();
|
| llvm::BitVector Live(NumVars);
|
| // Process regular instructions in reverse order.
|
| - for (InstList::const_reverse_iterator I = Insts.rbegin(), E = Insts.rend();
|
| - I != E; ++I) {
|
| + for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
|
| if ((*I)->isDeleted())
|
| continue;
|
| (*I)->livenessLightweight(Func, Live);
|
| }
|
| - for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - if ((*I)->isDeleted())
|
| + for (auto &I : Phis) {
|
| + if (I->isDeleted())
|
| continue;
|
| - (*I)->livenessLightweight(Func, Live);
|
| + I->livenessLightweight(Func, Live);
|
| }
|
| }
|
|
|
| @@ -295,21 +280,16 @@ bool CfgNode::liveness(Liveness *Liveness) {
|
| LiveBegin.assign(NumVars, Sentinel);
|
| LiveEnd.assign(NumVars, Sentinel);
|
| // Initialize Live to be the union of all successors' LiveIn.
|
| - for (NodeList::const_iterator I = OutEdges.begin(), E = OutEdges.end();
|
| - I != E; ++I) {
|
| - CfgNode *Succ = *I;
|
| + for (auto &Succ : OutEdges) {
|
| Live |= Liveness->getLiveIn(Succ);
|
| // Mark corresponding argument of phis in successor as live.
|
| - for (PhiList::const_iterator I1 = Succ->Phis.begin(), E1 = Succ->Phis.end();
|
| - I1 != E1; ++I1) {
|
| - (*I1)->livenessPhiOperand(Live, this, Liveness);
|
| - }
|
| + for (auto &I : Succ->Phis)
|
| + I->livenessPhiOperand(Live, this, Liveness);
|
| }
|
| Liveness->getLiveOut(this) = Live;
|
|
|
| // Process regular instructions in reverse order.
|
| - for (InstList::const_reverse_iterator I = Insts.rbegin(), E = Insts.rend();
|
| - I != E; ++I) {
|
| + for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
|
| if ((*I)->isDeleted())
|
| continue;
|
| (*I)->liveness((*I)->getNumber(), Live, Liveness, this);
|
| @@ -318,12 +298,12 @@ bool CfgNode::liveness(Liveness *Liveness) {
|
| // instruction number to be that of the earliest phi instruction in
|
| // the block.
|
| InstNumberT FirstPhiNumber = Inst::NumberSentinel;
|
| - for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - if ((*I)->isDeleted())
|
| + for (auto &I : Phis) {
|
| + if (I->isDeleted())
|
| continue;
|
| if (FirstPhiNumber == Inst::NumberSentinel)
|
| - FirstPhiNumber = (*I)->getNumber();
|
| - (*I)->liveness(FirstPhiNumber, Live, Liveness, this);
|
| + FirstPhiNumber = I->getNumber();
|
| + I->liveness(FirstPhiNumber, Live, Liveness, this);
|
| }
|
|
|
| // When using the sparse representation, after traversing the
|
| @@ -376,8 +356,7 @@ void CfgNode::livenessPostprocess(LivenessMode Mode, Liveness *Liveness) {
|
| InstNumberT FirstInstNum = Inst::NumberSentinel;
|
| InstNumberT LastInstNum = Inst::NumberSentinel;
|
| // Process phis in any order. Process only Dest operands.
|
| - for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - InstPhi *Inst = *I;
|
| + for (auto &Inst : Phis) {
|
| Inst->deleteIfDead();
|
| if (Inst->isDeleted())
|
| continue;
|
| @@ -387,9 +366,7 @@ void CfgNode::livenessPostprocess(LivenessMode Mode, Liveness *Liveness) {
|
| LastInstNum = Inst->getNumber();
|
| }
|
| // Process instructions
|
| - for (InstList::const_iterator I = Insts.begin(), E = Insts.end(); I != E;
|
| - ++I) {
|
| - Inst *Inst = *I;
|
| + for (auto &Inst : Insts) {
|
| Inst->deleteIfDead();
|
| if (Inst->isDeleted())
|
| continue;
|
| @@ -454,10 +431,8 @@ void CfgNode::doBranchOpt(const CfgNode *NextNode) {
|
| // first opportunity, unless there is some target lowering where we
|
| // have the possibility of multiple such optimizations per block
|
| // (currently not the case for x86 lowering).
|
| - for (InstList::const_iterator I = Insts.begin(), E = Insts.end(); I != E;
|
| - ++I) {
|
| - Target->doBranchOpt(*I, NextNode);
|
| - }
|
| + for (auto &I : Insts)
|
| + Target->doBranchOpt(I, NextNode);
|
| }
|
|
|
| // ======================== Dump routines ======================== //
|
| @@ -469,17 +444,14 @@ void CfgNode::emit(Cfg *Func) const {
|
| Str << Func->getContext()->mangleName(Func->getFunctionName()) << ":\n";
|
| }
|
| Str << getAsmName() << ":\n";
|
| - for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
|
| - InstPhi *Phi = *I;
|
| + for (auto &Phi : Phis) {
|
| if (Phi->isDeleted())
|
| continue;
|
| // Emitting a Phi instruction should cause an error.
|
| Inst *Instr = Phi;
|
| Instr->emit(Func);
|
| }
|
| - for (InstList::const_iterator I = Insts.begin(), E = Insts.end(); I != E;
|
| - ++I) {
|
| - Inst *Inst = *I;
|
| + for (auto &Inst : Insts) {
|
| if (Inst->isDeleted())
|
| continue;
|
| // Here we detect redundant assignments like "mov eax, eax" and
|
| @@ -487,20 +459,20 @@ void CfgNode::emit(Cfg *Func) const {
|
| if (Inst->isRedundantAssign())
|
| continue;
|
| if (Func->UseIntegratedAssembler()) {
|
| - (*I)->emitIAS(Func);
|
| + Inst->emitIAS(Func);
|
| } else {
|
| - (*I)->emit(Func);
|
| + Inst->emit(Func);
|
| }
|
| // Update emitted instruction count, plus fill/spill count for
|
| // Variable operands without a physical register.
|
| - if (uint32_t Count = (*I)->getEmitInstCount()) {
|
| + if (uint32_t Count = Inst->getEmitInstCount()) {
|
| Func->getContext()->statsUpdateEmitted(Count);
|
| - if (Variable *Dest = (*I)->getDest()) {
|
| + if (Variable *Dest = Inst->getDest()) {
|
| if (!Dest->hasReg())
|
| Func->getContext()->statsUpdateFills();
|
| }
|
| - for (SizeT S = 0; S < (*I)->getSrcSize(); ++S) {
|
| - if (Variable *Src = llvm::dyn_cast<Variable>((*I)->getSrc(S))) {
|
| + for (SizeT S = 0; S < Inst->getSrcSize(); ++S) {
|
| + if (Variable *Src = llvm::dyn_cast<Variable>(Inst->getSrc(S))) {
|
| if (!Src->hasReg())
|
| Func->getContext()->statsUpdateSpills();
|
| }
|
| @@ -519,8 +491,7 @@ void CfgNode::dump(Cfg *Func) const {
|
| // Dump list of predecessor nodes.
|
| if (Func->getContext()->isVerbose(IceV_Preds) && !InEdges.empty()) {
|
| Str << " // preds = ";
|
| - for (NodeList::const_iterator I = InEdges.begin(), E = InEdges.end();
|
| - I != E; ++I) {
|
| + for (auto I = InEdges.begin(), E = InEdges.end(); I != E; ++I) {
|
| if (I != InEdges.begin())
|
| Str << ", ";
|
| Str << "%" << (*I)->getName();
|
| @@ -542,16 +513,10 @@ void CfgNode::dump(Cfg *Func) const {
|
| }
|
| // Dump each instruction.
|
| if (Func->getContext()->isVerbose(IceV_Instructions)) {
|
| - for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E;
|
| - ++I) {
|
| - const Inst *Inst = *I;
|
| + for (auto &Inst : Phis)
|
| Inst->dumpDecorated(Func);
|
| - }
|
| - InstList::const_iterator I = Insts.begin(), E = Insts.end();
|
| - while (I != E) {
|
| - Inst *Inst = *I++;
|
| + for (auto &Inst : Insts)
|
| Inst->dumpDecorated(Func);
|
| - }
|
| }
|
| // Dump the live-out variables.
|
| llvm::BitVector LiveOut;
|
| @@ -569,8 +534,7 @@ void CfgNode::dump(Cfg *Func) const {
|
| // Dump list of successor nodes.
|
| if (Func->getContext()->isVerbose(IceV_Succs)) {
|
| Str << " // succs = ";
|
| - for (NodeList::const_iterator I = OutEdges.begin(), E = OutEdges.end();
|
| - I != E; ++I) {
|
| + for (auto I = OutEdges.begin(), E = OutEdges.end(); I != E; ++I) {
|
| if (I != OutEdges.begin())
|
| Str << ", ";
|
| Str << "%" << (*I)->getName();
|
|
|