Subzero: Auto-awesome iterators.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the CfgNode class, including the complexities
@@ skipping 37 matching lines @@
     Insts.push_back(Inst);
   }
 }
 
 // Renumbers the non-deleted instructions in the node.  This needs to
 // be done in preparation for live range analysis.  The instruction
 // numbers in a block must be monotonically increasing.  The range of
 // instruction numbers in a block, from lowest to highest, must not
 // overlap with the range of any other block.
 void CfgNode::renumberInstructions() {
-  for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    (*I)->renumber(Func);
-  }
-  InstList::const_iterator I = Insts.begin(), E = Insts.end();
-  while (I != E) {
-    Inst *Inst = *I++;
-    Inst->renumber(Func);
-  }
+  for (InstPhi *I : Phis)
+    I->renumber(Func);
+  for (Inst *I : Insts)
+    I->renumber(Func);
 }
 
 // When a node is created, the OutEdges are immediately knows, but the
 // InEdges have to be built up incrementally.  After the CFG has been
 // constructed, the computePredecessors() pass finalizes it by
 // creating the InEdges list.
 void CfgNode::computePredecessors() {
   OutEdges = (*Insts.rbegin())->getTerminatorEdges();
-  for (NodeList::const_iterator I = OutEdges.begin(), E = OutEdges.end();
-       I != E; ++I) {
-    CfgNode *Node = *I;
-    Node->InEdges.push_back(this);
-  }
+  for (CfgNode *Succ : OutEdges)
+    Succ->InEdges.push_back(this);
 }
 
 // This does part 1 of Phi lowering, by creating a new dest variable
 // for each Phi instruction, replacing the Phi instruction's dest with
 // that variable, and adding an explicit assignment of the old dest to
 // the new dest.  For example,
 //   a=phi(...)
 // changes to
 //   "a_phi=phi(...); a=a_phi".
 //
 // This is in preparation for part 2 which deletes the Phi
 // instructions and appends assignment instructions to predecessor
 // blocks.  Note that this transformation preserves SSA form.
 void CfgNode::placePhiLoads() {
-  for (PhiList::iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    Inst *Inst = (*I)->lower(Func);
-    Insts.insert(Insts.begin(), Inst);
-  }
+  for (InstPhi *I : Phis)
+    Insts.insert(Insts.begin(), I->lower(Func));
 }
 
 // This does part 2 of Phi lowering.  For each Phi instruction at each
 // out-edge, create a corresponding assignment instruction, and add
 // all the assignments near the end of this block.  They need to be
 // added before any branch instruction, and also if the block ends
 // with a compare instruction followed by a branch instruction that we
 // may want to fuse, it's better to insert the new assignments before
 // the compare instruction. The tryOptimizedCmpxchgCmpBr() method
 // assumes this ordering of instructions.
@@ skipping 74 matching lines @@
             llvm::isa<InstFcmp>(*InsertionPoint)) {
           CmpInstDest = (*InsertionPoint)->getDest();
         } else {
           ++InsertionPoint;
         }
       }
     }
   }
 
   // Consider every out-edge.
-  for (NodeList::const_iterator I1 = OutEdges.begin(), E1 = OutEdges.end();
-       I1 != E1; ++I1) {
-    CfgNode *Target = *I1;
+  for (CfgNode *Succ : OutEdges) {
     // Consider every Phi instruction at the out-edge.
-    for (PhiList::const_iterator I2 = Target->Phis.begin(),
-                                 E2 = Target->Phis.end();
-         I2 != E2; ++I2) {
-      Operand *Operand = (*I2)->getOperandForTarget(this);
+    for (InstPhi *I : Succ->Phis) {
+      Operand *Operand = I->getOperandForTarget(this);
       assert(Operand);
-      Variable *Dest = (*I2)->getDest();
+      Variable *Dest = I->getDest();
       assert(Dest);
       InstAssign *NewInst = InstAssign::create(Func, Dest, Operand);
       if (CmpInstDest == Operand)
         Insts.insert(SafeInsertionPoint, NewInst);
       else
         Insts.insert(InsertionPoint, NewInst);
     }
   }
 }
 
 // Deletes the phi instructions after the loads and stores are placed.
 void CfgNode::deletePhis() {
-  for (PhiList::iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    (*I)->setDeleted();
-  }
+  for (InstPhi *I : Phis)
+    I->setDeleted();
 }
 
 // Does address mode optimization.  Pass each instruction to the
 // TargetLowering object.  If it returns a new instruction
 // (representing the optimized address mode), then insert the new
 // instruction and delete the old.
 void CfgNode::doAddressOpt() {
   TargetLowering *Target = Func->getTarget();
   LoweringContext &Context = Target->getContext();
   Context.init(this);
@@ skipping 34 matching lines @@
     Target->lower();
     // Ensure target lowering actually moved the cursor.
     assert(Context.getCur() != Orig);
   }
 }
 
 void CfgNode::livenessLightweight() {
   SizeT NumVars = Func->getNumVariables();
   llvm::BitVector Live(NumVars);
   // Process regular instructions in reverse order.
-  for (InstList::const_reverse_iterator I = Insts.rbegin(), E = Insts.rend();
-       I != E; ++I) {
+  // TODO(stichnot): Use llvm::make_range with LLVM 3.5.
+  for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
     if ((*I)->isDeleted())
       continue;
     (*I)->livenessLightweight(Func, Live);
   }
-  for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    if ((*I)->isDeleted())
+  for (InstPhi *I : Phis) {
+    if (I->isDeleted())
       continue;
-    (*I)->livenessLightweight(Func, Live);
+    I->livenessLightweight(Func, Live);
   }
 }
 
 // Performs liveness analysis on the block.  Returns true if the
 // incoming liveness changed from before, false if it stayed the same.
 // (If it changes, the node's predecessors need to be processed
 // again.)
 bool CfgNode::liveness(Liveness *Liveness) {
   SizeT NumVars = Liveness->getNumVarsInNode(this);
   llvm::BitVector Live(NumVars);
   // Mark the beginning and ending of each variable's live range
   // with the sentinel instruction number 0.
   std::vector<InstNumberT> &LiveBegin = Liveness->getLiveBegin(this);
   std::vector<InstNumberT> &LiveEnd = Liveness->getLiveEnd(this);
   InstNumberT Sentinel = Inst::NumberSentinel;
   LiveBegin.assign(NumVars, Sentinel);
   LiveEnd.assign(NumVars, Sentinel);
   // Initialize Live to be the union of all successors' LiveIn.
-  for (NodeList::const_iterator I = OutEdges.begin(), E = OutEdges.end();
-       I != E; ++I) {
-    CfgNode *Succ = *I;
+  for (CfgNode *Succ : OutEdges) {
     Live |= Liveness->getLiveIn(Succ);
     // Mark corresponding argument of phis in successor as live.
-    for (PhiList::const_iterator I1 = Succ->Phis.begin(), E1 = Succ->Phis.end();
-         I1 != E1; ++I1) {
-      (*I1)->livenessPhiOperand(Live, this, Liveness);
-    }
+    for (InstPhi *I : Succ->Phis)
+      I->livenessPhiOperand(Live, this, Liveness);
   }
   Liveness->getLiveOut(this) = Live;
 
   // Process regular instructions in reverse order.
-  for (InstList::const_reverse_iterator I = Insts.rbegin(), E = Insts.rend();
-       I != E; ++I) {
+  // TODO(stichnot): Use llvm::make_range with LLVM 3.5.
+  for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
     if ((*I)->isDeleted())
       continue;
     (*I)->liveness((*I)->getNumber(), Live, Liveness, this);
   }
   // Process phis in forward order so that we can override the
   // instruction number to be that of the earliest phi instruction in
   // the block.
   InstNumberT FirstPhiNumber = Inst::NumberSentinel;
-  for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    if ((*I)->isDeleted())
+  for (InstPhi *I : Phis) {
+    if (I->isDeleted())
       continue;
     if (FirstPhiNumber == Inst::NumberSentinel)
-      FirstPhiNumber = (*I)->getNumber();
-    (*I)->liveness(FirstPhiNumber, Live, Liveness, this);
+      FirstPhiNumber = I->getNumber();
+    I->liveness(FirstPhiNumber, Live, Liveness, this);
   }
 
   // When using the sparse representation, after traversing the
   // instructions in the block, the Live bitvector should only contain
   // set bits for global variables upon block entry.  We validate this
   // by shrinking the Live vector and then testing it against the
   // pre-shrunk version.  (The shrinking is required, but the
   // validation is not.)
   llvm::BitVector LiveOrig = Live;
   Live.resize(Liveness->getNumGlobalVars());
@@ skipping 32 matching lines @@
 // It is assumed that within a single basic block, a live range begins
 // at most once and ends at most once.  This is certainly true for
 // pure SSA form.  It is also true once phis are lowered, since each
 // assignment to the phi-based temporary is in a different basic
 // block, and there is a single read that ends the live in the basic
 // block that contained the actual phi instruction.
 void CfgNode::livenessPostprocess(LivenessMode Mode, Liveness *Liveness) {
   InstNumberT FirstInstNum = Inst::NumberSentinel;
   InstNumberT LastInstNum = Inst::NumberSentinel;
   // Process phis in any order.  Process only Dest operands.
-  for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    InstPhi *Inst = *I;
-    Inst->deleteIfDead();
-    if (Inst->isDeleted())
+  for (InstPhi *I : Phis) {
+    I->deleteIfDead();
+    if (I->isDeleted())
       continue;
     if (FirstInstNum == Inst::NumberSentinel)
-      FirstInstNum = Inst->getNumber();
-    assert(Inst->getNumber() > LastInstNum);
-    LastInstNum = Inst->getNumber();
+      FirstInstNum = I->getNumber();
+    assert(I->getNumber() > LastInstNum);
+    LastInstNum = I->getNumber();
   }
   // Process instructions
-  for (InstList::const_iterator I = Insts.begin(), E = Insts.end(); I != E;
-       ++I) {
-    Inst *Inst = *I;
-    Inst->deleteIfDead();
-    if (Inst->isDeleted())
+  for (Inst *I : Insts) {
+    I->deleteIfDead();
+    if (I->isDeleted())
       continue;
     if (FirstInstNum == Inst::NumberSentinel)
-      FirstInstNum = Inst->getNumber();
-    assert(Inst->getNumber() > LastInstNum);
-    LastInstNum = Inst->getNumber();
+      FirstInstNum = I->getNumber();
+    assert(I->getNumber() > LastInstNum);
+    LastInstNum = I->getNumber();
     // Create fake live ranges for a Kill instruction, but only if the
     // linked instruction is still alive.
     if (Mode == Liveness_Intervals) {
-      if (InstFakeKill *Kill = llvm::dyn_cast<InstFakeKill>(Inst)) {
+      if (InstFakeKill *Kill = llvm::dyn_cast<InstFakeKill>(I)) {
         if (!Kill->getLinked()->isDeleted()) {
-          SizeT NumSrcs = Inst->getSrcSize();
-          for (SizeT i = 0; i < NumSrcs; ++i) {
-            Variable *Var = llvm::cast<Variable>(Inst->getSrc(i));
-            InstNumberT InstNumber = Inst->getNumber();
+          SizeT NumSrcs = I->getSrcSize();
+          for (SizeT Src = 0; Src < NumSrcs; ++Src) {
+            Variable *Var = llvm::cast<Variable>(I->getSrc(Src));
+            InstNumberT InstNumber = I->getNumber();
             Liveness->addLiveRange(Var, InstNumber, InstNumber, 1);
           }
         }
       }
     }
   }
   if (Mode != Liveness_Intervals)
     return;
 
   SizeT NumVars = Liveness->getNumVarsInNode(this);
@@ skipping 28 matching lines @@
   }
 }
 
 void CfgNode::doBranchOpt(const CfgNode *NextNode) {
   TargetLowering *Target = Func->getTarget();
   // Check every instruction for a branch optimization opportunity.
   // It may be more efficient to iterate in reverse and stop after the
   // first opportunity, unless there is some target lowering where we
   // have the possibility of multiple such optimizations per block
   // (currently not the case for x86 lowering).
-  for (InstList::const_iterator I = Insts.begin(), E = Insts.end(); I != E;
-       ++I) {
-    Target->doBranchOpt(*I, NextNode);
-  }
+  for (Inst *I : Insts)
+    Target->doBranchOpt(I, NextNode);
 }
 
 // ======================== Dump routines ======================== //
 
 void CfgNode::emit(Cfg *Func) const {
   Func->setCurrentNode(this);
   Ostream &Str = Func->getContext()->getStrEmit();
   if (Func->getEntryNode() == this) {
     Str << Func->getContext()->mangleName(Func->getFunctionName()) << ":\n";
   }
   Str << getAsmName() << ":\n";
-  for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E; ++I) {
-    InstPhi *Phi = *I;
+  for (InstPhi *Phi : Phis) {
     if (Phi->isDeleted())
       continue;
     // Emitting a Phi instruction should cause an error.
     Inst *Instr = Phi;
     Instr->emit(Func);
   }
-  for (InstList::const_iterator I = Insts.begin(), E = Insts.end(); I != E;
-       ++I) {
-    Inst *Inst = *I;
-    if (Inst->isDeleted())
+  for (Inst *I : Insts) {
+    if (I->isDeleted())
       continue;
     // Here we detect redundant assignments like "mov eax, eax" and
     // suppress them.
-    if (Inst->isRedundantAssign())
+    if (I->isRedundantAssign())
       continue;
     if (Func->UseIntegratedAssembler()) {
-      (*I)->emitIAS(Func);
+      I->emitIAS(Func);
     } else {
-      (*I)->emit(Func);
+      I->emit(Func);
     }
     // Update emitted instruction count, plus fill/spill count for
     // Variable operands without a physical register.
-    if (uint32_t Count = (*I)->getEmitInstCount()) {
+    if (uint32_t Count = I->getEmitInstCount()) {
       Func->getContext()->statsUpdateEmitted(Count);
-      if (Variable *Dest = (*I)->getDest()) {
+      if (Variable *Dest = I->getDest()) {
         if (!Dest->hasReg())
           Func->getContext()->statsUpdateFills();
       }
-      for (SizeT S = 0; S < (*I)->getSrcSize(); ++S) {
-        if (Variable *Src = llvm::dyn_cast<Variable>((*I)->getSrc(S))) {
+      for (SizeT S = 0; S < I->getSrcSize(); ++S) {
+        if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
           if (!Src->hasReg())
             Func->getContext()->statsUpdateSpills();
         }
       }
     }
   }
 }
 
 void CfgNode::dump(Cfg *Func) const {
   Func->setCurrentNode(this);
   Ostream &Str = Func->getContext()->getStrDump();
   Liveness *Liveness = Func->getLiveness();
   if (Func->getContext()->isVerbose(IceV_Instructions)) {
     Str << getName() << ":\n";
   }
   // Dump list of predecessor nodes.
   if (Func->getContext()->isVerbose(IceV_Preds) && !InEdges.empty()) {
     Str << "    // preds = ";
-    for (NodeList::const_iterator I = InEdges.begin(), E = InEdges.end();
-         I != E; ++I) {
-      if (I != InEdges.begin())
+    bool First = true;
+    for (CfgNode *I : InEdges) {
+      if (First)
         Str << ", ";
-      Str << "%" << (*I)->getName();
+      First = false;
+      Str << "%" << I->getName();
     }
     Str << "\n";
   }
   // Dump the live-in variables.
   llvm::BitVector LiveIn;
   if (Liveness)
     LiveIn = Liveness->getLiveIn(this);
   if (Func->getContext()->isVerbose(IceV_Liveness) && !LiveIn.empty()) {
     Str << "    // LiveIn:";
     for (SizeT i = 0; i < LiveIn.size(); ++i) {
       if (LiveIn[i]) {
         Str << " %" << Liveness->getVariable(i, this)->getName();
       }
     }
     Str << "\n";
   }
   // Dump each instruction.
   if (Func->getContext()->isVerbose(IceV_Instructions)) {
-    for (PhiList::const_iterator I = Phis.begin(), E = Phis.end(); I != E;
-         ++I) {
-      const Inst *Inst = *I;
-      Inst->dumpDecorated(Func);
-    }
-    InstList::const_iterator I = Insts.begin(), E = Insts.end();
-    while (I != E) {
-      Inst *Inst = *I++;
-      Inst->dumpDecorated(Func);
-    }
+    for (InstPhi *I : Phis)
+      I->dumpDecorated(Func);
+    for (Inst *I : Insts)
+      I->dumpDecorated(Func);
   }
   // Dump the live-out variables.
   llvm::BitVector LiveOut;
   if (Liveness)
     LiveOut = Liveness->getLiveOut(this);
   if (Func->getContext()->isVerbose(IceV_Liveness) && !LiveOut.empty()) {
     Str << "    // LiveOut:";
     for (SizeT i = 0; i < LiveOut.size(); ++i) {
       if (LiveOut[i]) {
         Str << " %" << Liveness->getVariable(i, this)->getName();
       }
     }
     Str << "\n";
   }
   // Dump list of successor nodes.
   if (Func->getContext()->isVerbose(IceV_Succs)) {
     Str << "    // succs = ";
-    for (NodeList::const_iterator I = OutEdges.begin(), E = OutEdges.end();
-         I != E; ++I) {
-      if (I != OutEdges.begin())
+    bool First = true;
+    for (CfgNode *I : OutEdges) {
+      if (First)
         Str << ", ";
-      Str << "%" << (*I)->getName();
+      First = false;
+      Str << "%" << I->getName();
     }
     Str << "\n";
   }
 }
 
 } // end of namespace Ice