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Unified Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 619663002: [turbofan] support all shift operands on ia32 (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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Index: src/compiler/ia32/instruction-selector-ia32.cc
diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc
index b252e71e0395eaf099f360d6404ceac45c021bad..8d3e69ae1466204e87d3859610f792e842bd36da 100644
--- a/src/compiler/ia32/instruction-selector-ia32.cc
+++ b/src/compiler/ia32/instruction-selector-ia32.cc
@@ -329,9 +329,8 @@ static inline void VisitShift(InstructionSelector* selector, Node* node,
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
- // TODO(turbofan): assembler only supports some addressing modes for shifts.
if (g.CanBeImmediate(right)) {
- selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left),
+ selector->Emit(opcode, g.DefineSameAsFirst(node), g.Use(left),
g.UseImmediate(right));
} else {
Int32BinopMatcher m(node);
@@ -341,7 +340,7 @@ static inline void VisitShift(InstructionSelector* selector, Node* node,
right = mright.left().node();
}
}
- selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left),
+ selector->Emit(opcode, g.DefineSameAsFirst(node), g.Use(left),
g.UseFixed(right, ecx));
}
}
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