Roll BoringSSL.

third_party/boringssl/win-x86_64/crypto/rc4/rc4-x86_64.asm

 OPTION  DOTNAME
 .text$  SEGMENT ALIGN(256) 'CODE'
 EXTERN  OPENSSL_ia32cap_P:NEAR
 
 PUBLIC  asm_RC4
 
 ALIGN   16
 asm_RC4 PROC PUBLIC
         mov     QWORD PTR[8+rsp],rdi    ;WIN64 prologue
         mov     QWORD PTR[16+rsp],rsi
@@ skipping 19 matching lines @@
         mov     r12,rdx
         mov     r13,rcx
         xor     r10,r10
         xor     rcx,rcx
 
         lea     rdi,QWORD PTR[8+rdi]
         mov     r10b,BYTE PTR[((-8))+rdi]
         mov     cl,BYTE PTR[((-4))+rdi]
         cmp     DWORD PTR[256+rdi],-1
         je      $L$RC4_CHAR
-        lea     r8,QWORD PTR[OPENSSL_ia32cap_P]
-        mov     r8d,DWORD PTR[r8]
+        mov     r8d,DWORD PTR[OPENSSL_ia32cap_P]

[agl, 2014/10/01 19:35:10]

This is obviously not a no-op change on Windows. It's unclear which is correct.
(It probably doesn't matter for now.)

[davidben, 2014/10/01 19:43:50]

Hrm. I'm guessing this is a result the GOTPCREL change. I'm not familiar with
masm syntax... does QWORD PTR vs DWORD PTR change the value of the address? At a
glance it seems equivalent. Load the address of QWORD PTR[OPENSSL_ia32cap_P]
into r8 then read a DWORD from r8 vs. read a DWORD from DWORD
PTR[OPENSSL_ia32cap_P].

I'll build with Win64 later and make sure all the CPUID bits are still doing
something.

[agl, 2014/10/01 20:17:37]

Yes, this is a result of the GOT change.

Actually, I'm much less worried about this now because I didn't notice that the
first instruction is an lea, not a mov.

         xor     rbx,rbx
         inc     r10b
         sub     rbx,r10
         sub     r13,r12
         mov     eax,DWORD PTR[r10*4+rdi]
         test    r11,-16
         jz      $L$loop1
         bt      r8d,30
         jc      $L$intel
         and     rbx,7
@@ skipping 498 matching lines @@
 
         lea     rdi,QWORD PTR[8+rdi]
         lea     rdx,QWORD PTR[rsi*1+rdx]
         neg     rsi
         mov     rcx,rsi
         xor     eax,eax
         xor     r9,r9
         xor     r10,r10
         xor     r11,r11
 
-        lea     r8,QWORD PTR[OPENSSL_ia32cap_P]
-        mov     r8d,DWORD PTR[r8]
+        mov     r8d,DWORD PTR[OPENSSL_ia32cap_P]
         bt      r8d,20
         jc      $L$c1stloop
         jmp     $L$w1stloop
 
 ALIGN   16
 $L$w1stloop::
         mov     DWORD PTR[rax*4+rdi],eax
         add     al,1
         jnc     $L$w1stloop
 
@@ skipping 194 matching lines @@
 ALIGN   8
 $L$SEH_info_asm_RC4::
 DB      9,0,0,0
         DD      imagerel stream_se_handler
 $L$SEH_info_asm_RC4_set_key::
 DB      9,0,0,0
         DD      imagerel key_se_handler
 
 .xdata  ENDS
 END