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Issue 618193005: MIPS: Improve runtime detection and compatibility wrt arch. revisions. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Improve revision detection not to rely on NaN representation. Created 6 years, 2 months ago
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1 # Copyright 2013 the V8 project authors. All rights reserved. 1 # Copyright 2013 the V8 project authors. All rights reserved.
2 # Redistribution and use in source and binary forms, with or without 2 # Redistribution and use in source and binary forms, with or without
3 # modification, are permitted provided that the following conditions are 3 # modification, are permitted provided that the following conditions are
4 # met: 4 # met:
5 # 5 #
6 # * Redistributions of source code must retain the above copyright 6 # * Redistributions of source code must retain the above copyright
7 # notice, this list of conditions and the following disclaimer. 7 # notice, this list of conditions and the following disclaimer.
8 # * Redistributions in binary form must reproduce the above 8 # * Redistributions in binary form must reproduce the above
9 # copyright notice, this list of conditions and the following 9 # copyright notice, this list of conditions and the following
10 # disclaimer in the documentation and/or other materials provided 10 # disclaimer in the documentation and/or other materials provided
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295 ['mips_fpu_mode=="fp64"', { 295 ['mips_fpu_mode=="fp64"', {
296 'cflags': ['-mfp64'], 296 'cflags': ['-mfp64'],
297 }], 297 }],
298 ['mips_fpu_mode=="fpxx"', { 298 ['mips_fpu_mode=="fpxx"', {
299 'cflags': ['-mfpxx'], 299 'cflags': ['-mfpxx'],
300 }], 300 }],
301 ['mips_fpu_mode=="fp32"', { 301 ['mips_fpu_mode=="fp32"', {
302 'cflags': ['-mfp32'], 302 'cflags': ['-mfp32'],
303 }], 303 }],
304 ['mips_arch_variant=="r6"', { 304 ['mips_arch_variant=="r6"', {
305 'cflags!': ['-mfp32'], 305 'cflags!': ['-mfp32', '-mfpxx'],
306 'cflags': ['-mips32r6', '-Wa,-mips32r6'], 306 'cflags': ['-mips32r6', '-Wa,-mips32r6'],
307 'ldflags': [ 307 'ldflags': [
308 '-mips32r6', 308 '-mips32r6',
309 '-Wl,--dynamic-linker=$(LDSO_PATH)', 309 '-Wl,--dynamic-linker=$(LDSO_PATH)',
310 '-Wl,--rpath=$(LD_R_PATH)', 310 '-Wl,--rpath=$(LD_R_PATH)',
311 ], 311 ],
312 }], 312 }],
313 ['mips_arch_variant=="r2"', { 313 ['mips_arch_variant=="r2"', {
314 'cflags': ['-mips32r2', '-Wa,-mips32r2'], 314 'cflags': ['-mips32r2', '-Wa,-mips32r2'],
315 'ldflags': ['-mips32r2'],
315 }], 316 }],
316 ['mips_arch_variant=="r1"', { 317 ['mips_arch_variant=="r1"', {
317 'cflags!': ['-mfp64'], 318 'cflags!': ['-mfp64', '-mfpxx'],
318 'cflags': ['-mips32', '-Wa,-mips32'], 319 'cflags': ['-mips32', '-Wa,-mips32'],
320 'ldflags': ['-mips32'],
319 }], 321 }],
320 ['mips_arch_variant=="rx"', { 322 ['mips_arch_variant=="rx"', {
321 'cflags!': ['-mfp64'], 323 'cflags!': ['-mfp64', '-mfp32'],
322 'cflags': ['-mips32', '-Wa,-mips32'], 324 'cflags': ['-mips32', '-Wa,-mips32', '-mfpxx'],
325 'ldflags': ['-mips32'],
323 }], 326 }],
324 ], 327 ],
325 }], 328 }],
326 ], 329 ],
327 }], 330 }],
328 [ 'v8_can_use_fpu_instructions=="true"', { 331 [ 'v8_can_use_fpu_instructions=="true"', {
329 'defines': [ 332 'defines': [
330 'CAN_USE_FPU_INSTRUCTIONS', 333 'CAN_USE_FPU_INSTRUCTIONS',
331 ], 334 ],
332 }], 335 }],
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393 ['mips_fpu_mode=="fp64"', { 396 ['mips_fpu_mode=="fp64"', {
394 'cflags': ['-mfp64'], 397 'cflags': ['-mfp64'],
395 }], 398 }],
396 ['mips_fpu_mode=="fpxx"', { 399 ['mips_fpu_mode=="fpxx"', {
397 'cflags': ['-mfpxx'], 400 'cflags': ['-mfpxx'],
398 }], 401 }],
399 ['mips_fpu_mode=="fp32"', { 402 ['mips_fpu_mode=="fp32"', {
400 'cflags': ['-mfp32'], 403 'cflags': ['-mfp32'],
401 }], 404 }],
402 ['mips_arch_variant=="r6"', { 405 ['mips_arch_variant=="r6"', {
403 'cflags!': ['-mfp32'], 406 'cflags!': ['-mfp32', '-mfpxx'],
404 'cflags': ['-mips32r6', '-Wa,-mips32r6'], 407 'cflags': ['-mips32r6', '-Wa,-mips32r6'],
405 'ldflags': [ 408 'ldflags': [
406 '-mips32r6', 409 '-mips32r6',
407 '-Wl,--dynamic-linker=$(LDSO_PATH)', 410 '-Wl,--dynamic-linker=$(LDSO_PATH)',
408 '-Wl,--rpath=$(LD_R_PATH)', 411 '-Wl,--rpath=$(LD_R_PATH)',
409 ], 412 ],
410 }], 413 }],
411 ['mips_arch_variant=="r2"', { 414 ['mips_arch_variant=="r2"', {
412 'cflags': ['-mips32r2', '-Wa,-mips32r2'], 415 'cflags': ['-mips32r2', '-Wa,-mips32r2'],
416 'ldflags': ['-mips32r2'],
413 }], 417 }],
414 ['mips_arch_variant=="r1"', { 418 ['mips_arch_variant=="r1"', {
415 'cflags!': ['-mfp64'], 419 'cflags!': ['-mfp64', '-mfpxx'],
416 'cflags': ['-mips32', '-Wa,-mips32'], 420 'cflags': ['-mips32', '-Wa,-mips32'],
421 'ldflags': ['-mips32'],
417 }], 422 }],
418 ['mips_arch_variant=="rx"', { 423 ['mips_arch_variant=="rx"', {
419 'cflags!': ['-mfp64'], 424 'cflags!': ['-mfp64', '-mfp32'],
420 'cflags': ['-mips32', '-Wa,-mips32'], 425 'cflags': ['-mips32', '-Wa,-mips32', '-mfpxx'],
426 'ldflags': ['-mips32'],
421 }], 427 }],
422 ['mips_arch_variant=="loongson"', { 428 ['mips_arch_variant=="loongson"', {
423 'cflags!': ['-mfp64'], 429 'cflags!': ['-mfp64', '-mfp32', '-mfpxx'],
424 'cflags': ['-mips3', '-Wa,-mips3'], 430 'cflags': ['-mips3', '-Wa,-mips3'],
425 }], 431 }],
426 ], 432 ],
427 }], 433 }],
428 ], 434 ],
429 }], 435 }],
430 [ 'v8_can_use_fpu_instructions=="true"', { 436 [ 'v8_can_use_fpu_instructions=="true"', {
431 'defines': [ 437 'defines': [
432 'CAN_USE_FPU_INSTRUCTIONS', 438 'CAN_USE_FPU_INSTRUCTIONS',
433 ], 439 ],
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974 'OptimizeReferences': '2', 980 'OptimizeReferences': '2',
975 'EnableCOMDATFolding': '2', 981 'EnableCOMDATFolding': '2',
976 }, 982 },
977 }, 983 },
978 }], # OS=="win" 984 }], # OS=="win"
979 ], # conditions 985 ], # conditions
980 }, # Release 986 }, # Release
981 }, # configurations 987 }, # configurations
982 }, # target_defaults 988 }, # target_defaults
983 } 989 }
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