Handle imul, pcmpeq, pcmpgt.

src/assembler_ia32.cpp

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32  -------------===//
 //
 //                        The Subzero Code Generator
 //
@@ skipping 1038 matching lines @@
 
 void AssemblerX86::pmovsxdq(XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x66);
   EmitUint8(0x0F);
   EmitUint8(0x38);
   EmitUint8(0x25);
   EmitXmmRegisterOperand(dst, src);
 }
 
-void AssemblerX86::pcmpeqq(XmmRegister dst, XmmRegister src) {
+void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x66);
   EmitUint8(0x0F);
-  EmitUint8(0x38);
-  EmitUint8(0x29);
+  if (isByteSizedArithType(Ty)) {
+    EmitUint8(0x74);
+  } else if (Ty == IceType_i16) {
+    EmitUint8(0x75);
+  } else {
+    EmitUint8(0x76);
+  }
   EmitXmmRegisterOperand(dst, src);
 }
 
+void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x66);
+  EmitUint8(0x0F);
+  if (isByteSizedArithType(Ty)) {
+    EmitUint8(0x74);
+  } else if (Ty == IceType_i16) {
+    EmitUint8(0x75);
+  } else {
+    EmitUint8(0x76);
+  }
+  EmitOperand(dst, src);
+}
+
+void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x66);
+  EmitUint8(0x0F);
+  if (isByteSizedArithType(Ty)) {
+    EmitUint8(0x64);
+  } else if (Ty == IceType_i16) {
+    EmitUint8(0x65);
+  } else {
+    EmitUint8(0x66);
+  }
+  EmitXmmRegisterOperand(dst, src);
+}
+
+void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x66);
+  EmitUint8(0x0F);
+  if (isByteSizedArithType(Ty)) {
+    EmitUint8(0x64);
+  } else if (Ty == IceType_i16) {
+    EmitUint8(0x65);
+  } else {
+    EmitUint8(0x66);
+  }
+  EmitOperand(dst, src);
+}
+
 void AssemblerX86::roundsd(XmmRegister dst, XmmRegister src,
                            RoundingMode mode) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x66);
   EmitUint8(0x0F);
   EmitUint8(0x3A);
   EmitUint8(0x0B);
   EmitXmmRegisterOperand(dst, src);
   // Mask precision exeption.
   EmitUint8(static_cast<uint8_t>(mode) | 0x8);
@@ skipping 404 matching lines @@
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (isByteSizedArithType(Ty))
     EmitUint8(0xF6);
   else
     EmitUint8(0xF7);
   EmitOperand(7, addr);
 }
 
-void AssemblerX86::imull(GPRRegister dst, GPRRegister src) {
+void AssemblerX86::imul(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
   EmitUint8(0x0F);
   EmitUint8(0xAF);
-  EmitOperand(dst, Operand(src));
+  EmitRegisterOperand(dst, src);
 }
 
-void AssemblerX86::imull(GPRRegister reg, const Immediate &imm) {
+void AssemblerX86::imul(Type Ty, GPRRegister reg, const Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0x69);
-  EmitOperand(reg, Operand(reg));
-  EmitImmediate(BrokenType, imm);
-}
-
-void AssemblerX86::imull(GPRRegister reg, const Address &address) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
   EmitUint8(0x0F);
   EmitUint8(0xAF);
   EmitOperand(reg, address);
 }
 
-void AssemblerX86::imull(GPRRegister reg) {
+void AssemblerX86::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF7);
-  EmitOperand(5, Operand(reg));
+  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (imm.is_int8()) {
+    EmitUint8(0x6B);
+    EmitRegisterOperand(reg, reg);
+    EmitUint8(imm.value() & 0xFF);
+  } else {
+    EmitUint8(0x69);
+    EmitRegisterOperand(reg, reg);
+    EmitImmediate(Ty, imm);
+  }
 }
 
-void AssemblerX86::imull(const Address &address) {
+void AssemblerX86::imul(Type Ty, GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xF7);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (isByteSizedArithType(Ty))
+    EmitUint8(0xF6);
+  else
+    EmitUint8(0xF7);
+  EmitRegisterOperand(5, reg);
+}
+
+void AssemblerX86::imul(Type Ty, const Address &address) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (isByteSizedArithType(Ty))
+    EmitUint8(0xF6);
+  else
+    EmitUint8(0xF7);
   EmitOperand(5, address);
 }
 
 void AssemblerX86::mul(Type Ty, GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (isByteSizedArithType(Ty))
     EmitUint8(0xF6);
   else
@@ skipping 540 matching lines @@
 void AssemblerX86::EmitGenericShift(int rm, const Operand &operand,
                                     GPRRegister shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   assert(shifter == RegX8632::Encoded_Reg_ecx);
   EmitUint8(0xD3);
   EmitOperand(rm, Operand(operand));
 }
 
 } // end of namespace x86
 } // end of namespace Ice