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Side by Side Diff: third_party/yasm/patched-yasm/modules/arch/x86/x86expr.c

Issue 6170009: Update our yasm copy to yasm 1.1.0 (Part 1: yasm side)... (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/deps/
Patch Set: Created 9 years, 11 months ago
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1 /* 1 /*
2 * x86 expression handling 2 * x86 expression handling
3 * 3 *
4 * Copyright (C) 2001-2007 Peter Johnson 4 * Copyright (C) 2001-2007 Peter Johnson
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS'' 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS''
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE. 25 * POSSIBILITY OF SUCH DAMAGE.
26 */ 26 */
27 #include <util.h> 27 #include <util.h>
28 /*@unused@*/ RCSID("$Id: x86expr.c 2162 2008-12-21 10:57:36Z peter $"); 28 /*@unused@*/ RCSID("$Id: x86expr.c 2199 2009-05-10 05:24:46Z peter $");
29 29
30 #include <libyasm.h> 30 #include <libyasm.h>
31 31
32 #include "x86arch.h" 32 #include "x86arch.h"
33 33
34 34
35 typedef struct x86_checkea_reg3264_data { 35 typedef struct x86_checkea_reg3264_data {
36 int *regs; /* total multiplier for each reg */ 36 int *regs; /* total multiplier for each reg */
37 unsigned char bits; 37 unsigned char bits;
38 unsigned char addrsize; 38 unsigned char addrsize;
(...skipping 526 matching lines...) Expand 10 before | Expand all | Expand 10 after
565 } else 565 } else
566 return 0; 566 return 0;
567 } 567 }
568 568
569 int 569 int
570 yasm_x86__expr_checkea(x86_effaddr *x86_ea, unsigned char *addrsize, 570 yasm_x86__expr_checkea(x86_effaddr *x86_ea, unsigned char *addrsize,
571 unsigned int bits, int address16_op, unsigned char *rex, 571 unsigned int bits, int address16_op, unsigned char *rex,
572 yasm_bytecode *bc) 572 yasm_bytecode *bc)
573 { 573 {
574 int retval; 574 int retval;
575 unsigned char *drex = x86_ea->need_drex ? &x86_ea->drex : NULL;
576 575
577 if (*addrsize == 0) { 576 if (*addrsize == 0) {
578 /* we need to figure out the address size from what we know about: 577 /* we need to figure out the address size from what we know about:
579 * - the displacement length 578 * - the displacement length
580 * - what registers are used in the expression 579 * - what registers are used in the expression
581 * - the bits setting 580 * - the bits setting
582 */ 581 */
583 switch (x86_ea->ea.disp.size) { 582 switch (x86_ea->ea.disp.size) {
584 case 16: 583 case 16:
585 /* must be 16-bit */ 584 /* must be 16-bit */
(...skipping 230 matching lines...) Expand 10 before | Expand all | Expand 10 after
816 /* RIP always requires a 32-bit displacement */ 815 /* RIP always requires a 32-bit displacement */
817 x86_ea->valid_modrm = 1; 816 x86_ea->valid_modrm = 1;
818 x86_ea->ea.disp.size = 32; 817 x86_ea->ea.disp.size = 32;
819 return 0; 818 return 0;
820 } else if (indexreg == REG3264_NONE) { 819 } else if (indexreg == REG3264_NONE) {
821 /* basereg only */ 820 /* basereg only */
822 /* Don't need to go to the full effort of determining what type 821 /* Don't need to go to the full effort of determining what type
823 * of register basereg is, as x86_set_rex_from_reg doesn't pay 822 * of register basereg is, as x86_set_rex_from_reg doesn't pay
824 * much attention. 823 * much attention.
825 */ 824 */
826 if (yasm_x86__set_rex_from_reg(rex, drex, &low3, 825 if (yasm_x86__set_rex_from_reg(rex, &low3,
827 (unsigned int)(X86_REG64 | basereg), 826 (unsigned int)(X86_REG64 | basereg),
828 bits, X86_REX_B)) 827 bits, X86_REX_B))
829 return 1; 828 return 1;
830 x86_ea->modrm |= low3; 829 x86_ea->modrm |= low3;
831 /* we don't need an SIB *unless* basereg is ESP or R12 */ 830 /* we don't need an SIB *unless* basereg is ESP or R12 */
832 if (basereg == REG3264_ESP || basereg == REG64_R12) 831 if (basereg == REG3264_ESP || basereg == REG64_R12)
833 x86_ea->need_sib = 1; 832 x86_ea->need_sib = 1;
834 else { 833 else {
835 x86_ea->sib = 0; 834 x86_ea->sib = 0;
836 x86_ea->valid_sib = 0; 835 x86_ea->valid_sib = 0;
837 x86_ea->need_sib = 0; 836 x86_ea->need_sib = 0;
838 } 837 }
839 } else { 838 } else {
840 /* index or both base and index */ 839 /* index or both base and index */
841 x86_ea->modrm |= 4; 840 x86_ea->modrm |= 4;
842 x86_ea->need_sib = 1; 841 x86_ea->need_sib = 1;
843 } 842 }
844 843
845 /* Determine SIB if needed */ 844 /* Determine SIB if needed */
846 if (x86_ea->need_sib == 1) { 845 if (x86_ea->need_sib == 1) {
847 x86_ea->sib = 0; /* start with 0 */ 846 x86_ea->sib = 0; /* start with 0 */
848 847
849 /* Special case: no basereg */ 848 /* Special case: no basereg */
850 if (basereg == REG3264_NONE) 849 if (basereg == REG3264_NONE)
851 x86_ea->sib |= 5; 850 x86_ea->sib |= 5;
852 else { 851 else {
853 if (yasm_x86__set_rex_from_reg(rex, drex, &low3, (unsigned int) 852 if (yasm_x86__set_rex_from_reg(rex, &low3, (unsigned int)
854 (X86_REG64 | basereg), bits, 853 (X86_REG64 | basereg), bits,
855 X86_REX_B)) 854 X86_REX_B))
856 return 1; 855 return 1;
857 x86_ea->sib |= low3; 856 x86_ea->sib |= low3;
858 } 857 }
859 858
860 /* Put in indexreg, checking for none case */ 859 /* Put in indexreg, checking for none case */
861 if (indexreg == REG3264_NONE) 860 if (indexreg == REG3264_NONE)
862 x86_ea->sib |= 040; 861 x86_ea->sib |= 040;
863 /* Any scale field is valid, just leave at 0. */ 862 /* Any scale field is valid, just leave at 0. */
864 else { 863 else {
865 if (yasm_x86__set_rex_from_reg(rex, drex, &low3, (unsigned int) 864 if (yasm_x86__set_rex_from_reg(rex, &low3, (unsigned int)
866 (X86_REG64 | indexreg), bits, 865 (X86_REG64 | indexreg), bits,
867 X86_REX_X)) 866 X86_REX_X))
868 return 1; 867 return 1;
869 x86_ea->sib |= low3 << 3; 868 x86_ea->sib |= low3 << 3;
870 /* Set scale field, 1 case -> 0, so don't bother. */ 869 /* Set scale field, 1 case -> 0, so don't bother. */
871 switch (reg3264mult[indexreg]) { 870 switch (reg3264mult[indexreg]) {
872 case 2: 871 case 2:
873 x86_ea->sib |= 0100; 872 x86_ea->sib |= 0100;
874 break; 873 break;
875 case 4: 874 case 4:
(...skipping 128 matching lines...) Expand 10 before | Expand all | Expand 10 after
1004 { 1003 {
1005 if (!yasm_floatnum_check_size(flt, valsize)) { 1004 if (!yasm_floatnum_check_size(flt, valsize)) {
1006 yasm_error_set(YASM_ERROR_FLOATING_POINT, 1005 yasm_error_set(YASM_ERROR_FLOATING_POINT,
1007 N_("invalid floating point constant size")); 1006 N_("invalid floating point constant size"));
1008 return 1; 1007 return 1;
1009 } 1008 }
1010 1009
1011 yasm_floatnum_get_sized(flt, buf, destsize, valsize, shift, 0, warn); 1010 yasm_floatnum_get_sized(flt, buf, destsize, valsize, shift, 0, warn);
1012 return 0; 1011 return 0;
1013 } 1012 }
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