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Side by Side Diff: third_party/yasm/patched-yasm/modules/arch/x86/x86cpu.gperf

Issue 6170009: Update our yasm copy to yasm 1.1.0 (Part 1: yasm side)... (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/deps/
Patch Set: Created 9 years, 11 months ago
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1 # 1 #
2 # x86 CPU recognition 2 # x86 CPU recognition
3 # 3 #
4 # Copyright (C) 2002-2007 Peter Johnson 4 # Copyright (C) 2002-2007 Peter Johnson
5 # 5 #
6 # Redistribution and use in source and binary forms, with or without 6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions 7 # modification, are permitted provided that the following conditions
8 # are met: 8 # are met:
9 # 1. Redistributions of source code must retain the above copyright 9 # 1. Redistributions of source code must retain the above copyright
10 # notice, this list of conditions and the following disclaimer. 10 # notice, this list of conditions and the following disclaimer.
11 # 2. Redistributions in binary form must reproduce the above copyright 11 # 2. Redistributions in binary form must reproduce the above copyright
12 # notice, this list of conditions and the following disclaimer in the 12 # notice, this list of conditions and the following disclaimer in the
13 # documentation and/or other materials provided with the distribution. 13 # documentation and/or other materials provided with the distribution.
14 # 14 #
15 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS'' 15 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS''
16 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 # ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE 18 # ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE
19 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 # POSSIBILITY OF SUCH DAMAGE. 25 # POSSIBILITY OF SUCH DAMAGE.
26 %{ 26 %{
27 #include <util.h> 27 #include <util.h>
28 RCSID("$Id: x86cpu.gperf 2181 2009-03-20 07:36:49Z peter $"); 28 RCSID("$Id: x86cpu.gperf 2346 2010-08-01 01:37:37Z peter $");
29 29
30 #include <ctype.h> 30 #include <ctype.h>
31 #include <libyasm.h> 31 #include <libyasm.h>
32 #include <libyasm/phash.h> 32 #include <libyasm/phash.h>
33 33
34 #include "modules/arch/x86/x86arch.h" 34 #include "modules/arch/x86/x86arch.h"
35 35
36 #define PROC_8086 0 36 #define PROC_8086 0
37 #define PROC_186 1 37 #define PROC_186 1
38 #define PROC_286 2 38 #define PROC_286 2
(...skipping 105 matching lines...) Expand 10 before | Expand all | Expand 10 after
144 144
145 static void 145 static void
146 x86_cpu_amd(wordptr cpu, yasm_arch_x86 *arch_x86, unsigned int data) 146 x86_cpu_amd(wordptr cpu, yasm_arch_x86 *arch_x86, unsigned int data)
147 { 147 {
148 BitVector_Empty(cpu); 148 BitVector_Empty(cpu);
149 149
150 BitVector_Bit_On(cpu, CPU_Priv); 150 BitVector_Bit_On(cpu, CPU_Priv);
151 BitVector_Bit_On(cpu, CPU_Prot); 151 BitVector_Bit_On(cpu, CPU_Prot);
152 BitVector_Bit_On(cpu, CPU_SMM); 152 BitVector_Bit_On(cpu, CPU_SMM);
153 BitVector_Bit_On(cpu, CPU_3DNow); 153 BitVector_Bit_On(cpu, CPU_3DNow);
154 if (data >= PROC_bulldozer) 154 if (data >= PROC_bulldozer) {
155 BitVector_Bit_On(cpu, CPU_SSE5); 155 BitVector_Bit_On(cpu, CPU_XOP);
156 BitVector_Bit_On(cpu, CPU_FMA4);
157 }
156 if (data >= PROC_k10) 158 if (data >= PROC_k10)
157 BitVector_Bit_On(cpu, CPU_SSE4a); 159 BitVector_Bit_On(cpu, CPU_SSE4a);
158 if (data >= PROC_venice) 160 if (data >= PROC_venice)
159 BitVector_Bit_On(cpu, CPU_SSE3); 161 BitVector_Bit_On(cpu, CPU_SSE3);
160 if (data >= PROC_hammer) 162 if (data >= PROC_hammer)
161 BitVector_Bit_On(cpu, CPU_SSE2); 163 BitVector_Bit_On(cpu, CPU_SSE2);
162 if (data >= PROC_k7) 164 if (data >= PROC_k7)
163 BitVector_Bit_On(cpu, CPU_SSE); 165 BitVector_Bit_On(cpu, CPU_SSE);
164 if (data >= PROC_k6) 166 if (data >= PROC_k6)
165 BitVector_Bit_On(cpu, CPU_MMX); 167 BitVector_Bit_On(cpu, CPU_MMX);
(...skipping 184 matching lines...) Expand 10 before | Expand all | Expand 10 after
350 sse41, x86_cpu_set, CPU_SSE41 352 sse41, x86_cpu_set, CPU_SSE41
351 nosse41, x86_cpu_clear, CPU_SSE41 353 nosse41, x86_cpu_clear, CPU_SSE41
352 sse4.2, x86_cpu_set, CPU_SSE42 354 sse4.2, x86_cpu_set, CPU_SSE42
353 nosse4.2, x86_cpu_clear, CPU_SSE42 355 nosse4.2, x86_cpu_clear, CPU_SSE42
354 sse42, x86_cpu_set, CPU_SSE42 356 sse42, x86_cpu_set, CPU_SSE42
355 nosse42, x86_cpu_clear, CPU_SSE42 357 nosse42, x86_cpu_clear, CPU_SSE42
356 sse4a, x86_cpu_set, CPU_SSE4a 358 sse4a, x86_cpu_set, CPU_SSE4a
357 nosse4a, x86_cpu_clear, CPU_SSE4a 359 nosse4a, x86_cpu_clear, CPU_SSE4a
358 sse4, x86_cpu_set_sse4, 0 360 sse4, x86_cpu_set_sse4, 0
359 nosse4, x86_cpu_clear_sse4, 0 361 nosse4, x86_cpu_clear_sse4, 0
360 sse5, x86_cpu_set, CPU_SSE5
361 nosse5, x86_cpu_clear, CPU_SSE5
362 xsave, x86_cpu_set, CPU_XSAVE 362 xsave, x86_cpu_set, CPU_XSAVE
363 noxsave, x86_cpu_clear, CPU_XSAVE 363 noxsave, x86_cpu_clear, CPU_XSAVE
364 avx, x86_cpu_set, CPU_AVX 364 avx, x86_cpu_set, CPU_AVX
365 noavx, x86_cpu_clear, CPU_AVX 365 noavx, x86_cpu_clear, CPU_AVX
366 fma, x86_cpu_set, CPU_FMA 366 fma, x86_cpu_set, CPU_FMA
367 nofma, x86_cpu_clear, CPU_FMA 367 nofma, x86_cpu_clear, CPU_FMA
368 aes, x86_cpu_set, CPU_AES 368 aes, x86_cpu_set, CPU_AES
369 noaes, x86_cpu_clear, CPU_AES 369 noaes, x86_cpu_clear, CPU_AES
370 clmul, x86_cpu_set, CPU_CLMUL 370 clmul, x86_cpu_set, CPU_CLMUL
371 noclmul, x86_cpu_clear, CPU_CLMUL 371 noclmul, x86_cpu_clear, CPU_CLMUL
372 pclmulqdq, x86_cpu_set, CPU_CLMUL 372 pclmulqdq, x86_cpu_set, CPU_CLMUL
373 nopclmulqdq, x86_cpu_clear, CPU_CLMUL 373 nopclmulqdq, x86_cpu_clear, CPU_CLMUL
374 movbe, x86_cpu_set, CPU_MOVBE 374 movbe, x86_cpu_set, CPU_MOVBE
375 nomovbe, x86_cpu_clear, CPU_MOVBE 375 nomovbe, x86_cpu_clear, CPU_MOVBE
376 xop, x86_cpu_set, CPU_XOP
377 noxop, x86_cpu_clear, CPU_XOP
378 fma4, x86_cpu_set, CPU_FMA4
379 nofma4, x86_cpu_clear, CPU_FMA4
380 f16c, x86_cpu_set, CPU_F16C
381 nof16c, x86_cpu_clear, CPU_F16C
382 fsgsbase, x86_cpu_set, CPU_FSGSBASE
383 nofsgsbase, x86_cpu_clear, CPU_FSGSBASE
384 rdrand, x86_cpu_set, CPU_RDRAND
385 nordrand, x86_cpu_clear, CPU_RDRAND
386 xsaveopt, x86_cpu_set, CPU_XSAVEOPT
387 noxsaveopt, x86_cpu_clear, CPU_XSAVEOPT
388 eptvpid, x86_cpu_set, CPU_EPTVPID
389 noeptvpid, x86_cpu_clear, CPU_EPTVPID
390 smx, x86_cpu_set, CPU_SMX
391 nosmx, x86_cpu_clear, CPU_SMX
376 # Change NOP patterns 392 # Change NOP patterns
377 basicnop, x86_nop, X86_NOP_BASIC 393 basicnop, x86_nop, X86_NOP_BASIC
378 intelnop, x86_nop, X86_NOP_INTEL 394 intelnop, x86_nop, X86_NOP_INTEL
379 amdnop, x86_nop, X86_NOP_AMD 395 amdnop, x86_nop, X86_NOP_AMD
380 %% 396 %%
381 397
382 void 398 void
383 yasm_x86__parse_cpu(yasm_arch_x86 *arch_x86, const char *cpuid, 399 yasm_x86__parse_cpu(yasm_arch_x86 *arch_x86, const char *cpuid,
384 size_t cpuid_len) 400 size_t cpuid_len)
385 { 401 {
(...skipping 27 matching lines...) Expand all
413 } 429 }
414 } 430 }
415 431
416 /* not found, need to add a new entry */ 432 /* not found, need to add a new entry */
417 arch_x86->active_cpu = arch_x86->cpu_enables_size++; 433 arch_x86->active_cpu = arch_x86->cpu_enables_size++;
418 arch_x86->cpu_enables = 434 arch_x86->cpu_enables =
419 yasm_xrealloc(arch_x86->cpu_enables, 435 yasm_xrealloc(arch_x86->cpu_enables,
420 arch_x86->cpu_enables_size*sizeof(wordptr)); 436 arch_x86->cpu_enables_size*sizeof(wordptr));
421 arch_x86->cpu_enables[arch_x86->active_cpu] = new_cpu; 437 arch_x86->cpu_enables[arch_x86->active_cpu] = new_cpu;
422 } 438 }
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