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1 /* | 1 /* |
2 * x86 architecture description | 2 * x86 architecture description |
3 * | 3 * |
4 * Copyright (C) 2002-2007 Peter Johnson | 4 * Copyright (C) 2002-2007 Peter Johnson |
5 * | 5 * |
6 * Redistribution and use in source and binary forms, with or without | 6 * Redistribution and use in source and binary forms, with or without |
7 * modification, are permitted provided that the following conditions | 7 * modification, are permitted provided that the following conditions |
8 * are met: | 8 * are met: |
9 * 1. Redistributions of source code must retain the above copyright | 9 * 1. Redistributions of source code must retain the above copyright |
10 * notice, this list of conditions and the following disclaimer. | 10 * notice, this list of conditions and the following disclaimer. |
11 * 2. Redistributions in binary form must reproduce the above copyright | 11 * 2. Redistributions in binary form must reproduce the above copyright |
12 * notice, this list of conditions and the following disclaimer in the | 12 * notice, this list of conditions and the following disclaimer in the |
13 * documentation and/or other materials provided with the distribution. | 13 * documentation and/or other materials provided with the distribution. |
14 * | 14 * |
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS'' | 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS'' |
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE | 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE |
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
25 * POSSIBILITY OF SUCH DAMAGE. | 25 * POSSIBILITY OF SUCH DAMAGE. |
26 */ | 26 */ |
27 #include <util.h> | 27 #include <util.h> |
28 /*@unused@*/ RCSID("$Id: x86arch.c 2181 2009-03-20 07:36:49Z peter $"); | 28 /*@unused@*/ RCSID("$Id: x86arch.c 2279 2010-01-19 07:57:43Z peter $"); |
29 | 29 |
30 #include <libyasm.h> | 30 #include <libyasm.h> |
31 | 31 |
32 #include "x86arch.h" | 32 #include "x86arch.h" |
33 | 33 |
34 | 34 |
35 yasm_arch_module yasm_x86_LTX_arch; | 35 yasm_arch_module yasm_x86_LTX_arch; |
36 | 36 |
37 | 37 |
38 static /*@only@*/ yasm_arch * | 38 static /*@only@*/ yasm_arch * |
(...skipping 22 matching lines...) Expand all Loading... |
61 arch_x86->active_cpu = 0; | 61 arch_x86->active_cpu = 0; |
62 arch_x86->cpu_enables_size = 1; | 62 arch_x86->cpu_enables_size = 1; |
63 arch_x86->cpu_enables = yasm_xmalloc(sizeof(wordptr)); | 63 arch_x86->cpu_enables = yasm_xmalloc(sizeof(wordptr)); |
64 arch_x86->cpu_enables[0] = BitVector_Create(64, FALSE); | 64 arch_x86->cpu_enables[0] = BitVector_Create(64, FALSE); |
65 BitVector_Fill(arch_x86->cpu_enables[0]); | 65 BitVector_Fill(arch_x86->cpu_enables[0]); |
66 | 66 |
67 arch_x86->amd64_machine = amd64_machine; | 67 arch_x86->amd64_machine = amd64_machine; |
68 arch_x86->mode_bits = 0; | 68 arch_x86->mode_bits = 0; |
69 arch_x86->force_strict = 0; | 69 arch_x86->force_strict = 0; |
70 arch_x86->default_rel = 0; | 70 arch_x86->default_rel = 0; |
| 71 arch_x86->gas_intel_mode = 0; |
71 arch_x86->nop = X86_NOP_BASIC; | 72 arch_x86->nop = X86_NOP_BASIC; |
72 | 73 |
73 if (yasm__strcasecmp(parser, "nasm") == 0) | 74 if (yasm__strcasecmp(parser, "nasm") == 0) |
74 arch_x86->parser = X86_PARSER_NASM; | 75 arch_x86->parser = X86_PARSER_NASM; |
75 else if (yasm__strcasecmp(parser, "tasm") == 0) | 76 else if (yasm__strcasecmp(parser, "tasm") == 0) |
76 arch_x86->parser = X86_PARSER_TASM; | 77 arch_x86->parser = X86_PARSER_TASM; |
77 else if (yasm__strcasecmp(parser, "gas") == 0 | 78 else if (yasm__strcasecmp(parser, "gas") == 0 |
78 || yasm__strcasecmp(parser, "gnu") == 0) | 79 || yasm__strcasecmp(parser, "gnu") == 0) |
79 arch_x86->parser = X86_PARSER_GAS; | 80 arch_x86->parser = X86_PARSER_GAS; |
80 else { | 81 else { |
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126 if (yasm__strcasecmp(var, "mode_bits") == 0) | 127 if (yasm__strcasecmp(var, "mode_bits") == 0) |
127 arch_x86->mode_bits = (unsigned int)val; | 128 arch_x86->mode_bits = (unsigned int)val; |
128 else if (yasm__strcasecmp(var, "force_strict") == 0) | 129 else if (yasm__strcasecmp(var, "force_strict") == 0) |
129 arch_x86->force_strict = (unsigned int)val; | 130 arch_x86->force_strict = (unsigned int)val; |
130 else if (yasm__strcasecmp(var, "default_rel") == 0) { | 131 else if (yasm__strcasecmp(var, "default_rel") == 0) { |
131 if (arch_x86->mode_bits != 64) | 132 if (arch_x86->mode_bits != 64) |
132 yasm_warn_set(YASM_WARN_GENERAL, | 133 yasm_warn_set(YASM_WARN_GENERAL, |
133 N_("ignoring default rel in non-64-bit mode")); | 134 N_("ignoring default rel in non-64-bit mode")); |
134 else | 135 else |
135 arch_x86->default_rel = (unsigned int)val; | 136 arch_x86->default_rel = (unsigned int)val; |
| 137 } else if (yasm__strcasecmp(var, "gas_intel_mode") == 0) { |
| 138 arch_x86->gas_intel_mode = (unsigned int)val; |
136 } else | 139 } else |
137 return 1; | 140 return 1; |
138 return 0; | 141 return 0; |
139 } | 142 } |
140 | 143 |
141 static void | 144 static void |
142 x86_dir_cpu(yasm_object *object, yasm_valparamhead *valparams, | 145 x86_dir_cpu(yasm_object *object, yasm_valparamhead *valparams, |
143 yasm_valparamhead *objext_valparams, unsigned long line) | 146 yasm_valparamhead *objext_valparams, unsigned long line) |
144 { | 147 { |
145 yasm_arch_x86 *arch_x86 = (yasm_arch_x86 *)object->arch; | 148 yasm_arch_x86 *arch_x86 = (yasm_arch_x86 *)object->arch; |
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614 x86_segreg_print, | 617 x86_segreg_print, |
615 yasm_x86__ea_create_expr, | 618 yasm_x86__ea_create_expr, |
616 yasm_x86__ea_destroy, | 619 yasm_x86__ea_destroy, |
617 yasm_x86__ea_print, | 620 yasm_x86__ea_print, |
618 yasm_x86__create_empty_insn, | 621 yasm_x86__create_empty_insn, |
619 x86_machines, | 622 x86_machines, |
620 "x86", | 623 "x86", |
621 16, | 624 16, |
622 1 | 625 1 |
623 }; | 626 }; |
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