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Side by Side Diff: runtime/vm/simulator_arm64.cc

Issue 616873003: Use UnboxedInt32 and UnboxedUint32 representation for LoadIndexedInstr (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Created 6 years, 2 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include <setjmp.h> 5 #include <setjmp.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 7
8 #include "vm/globals.h" 8 #include "vm/globals.h"
9 #if defined(TARGET_ARCH_ARM64) 9 #if defined(TARGET_ARCH_ARM64)
10 10
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2742 } 2742 }
2743 } 2743 }
2744 2744
2745 2745
2746 void Simulator::DecodeFPIntCvt(Instr* instr) { 2746 void Simulator::DecodeFPIntCvt(Instr* instr) {
2747 const VRegister vd = instr->VdField(); 2747 const VRegister vd = instr->VdField();
2748 const VRegister vn = instr->VnField(); 2748 const VRegister vn = instr->VnField();
2749 const Register rd = instr->RdField(); 2749 const Register rd = instr->RdField();
2750 const Register rn = instr->RnField(); 2750 const Register rn = instr->RnField();
2751 2751
2752 if ((instr->SFField() != 1) || (instr->Bit(29) != 0) || 2752 if ((instr->Bit(29) != 0) || (instr->Bits(22, 2) != 1) ||
2753 (instr->Bits(22, 2) != 1)) { 2753 ((instr->SFField() == 0) && (instr->Bits(16, 5) != 2))) {
2754 UnimplementedInstruction(instr); 2754 UnimplementedInstruction(instr);
2755 return; 2755 return;
2756 } 2756 }
2757 if (instr->Bits(16, 5) == 2) { 2757 if (instr->Bits(16, 5) == 2) {
2758 // Format(instr, "scvtfd 'vd, 'vn"); 2758 // Format(instr, "scvtfd'sf 'vd, 'rn");
2759 const int64_t rn_val = get_register(rn, instr->RnMode()); 2759 const int64_t rn_val64 = get_register(rn, instr->RnMode());
2760 const double vn_dbl = static_cast<double>(rn_val); 2760 const int32_t rn_val32 = get_wregister(rn, instr->RnMode());
2761 const double vn_dbl = (instr->SFField() == 1) ?
2762 static_cast<double>(rn_val64) : static_cast<double>(rn_val32);
2761 set_vregisterd(vd, 0, bit_cast<int64_t, double>(vn_dbl)); 2763 set_vregisterd(vd, 0, bit_cast<int64_t, double>(vn_dbl));
2762 set_vregisterd(vd, 1, 0); 2764 set_vregisterd(vd, 1, 0);
2763 } else if (instr->Bits(16, 5) == 6) { 2765 } else if (instr->Bits(16, 5) == 6) {
2764 // Format(instr, "fmovrd 'rd, 'vn"); 2766 // Format(instr, "fmovrd'sf 'rd, 'vn");
2765 const int64_t vn_val = get_vregisterd(vn, 0); 2767 const int64_t vn_val = get_vregisterd(vn, 0);
2766 set_register(instr, rd, vn_val, R31IsZR); 2768 set_register(instr, rd, vn_val, R31IsZR);
2767 } else if (instr->Bits(16, 5) == 7) { 2769 } else if (instr->Bits(16, 5) == 7) {
2768 // Format(instr, "fmovdr 'vd, 'rn"); 2770 // Format(instr, "fmovdr'sf 'vd, 'rn");
2769 const int64_t rn_val = get_register(rn, R31IsZR); 2771 const int64_t rn_val = get_register(rn, R31IsZR);
2770 set_vregisterd(vd, 0, rn_val); 2772 set_vregisterd(vd, 0, rn_val);
2771 set_vregisterd(vd, 1, 0); 2773 set_vregisterd(vd, 1, 0);
2772 } else if (instr->Bits(16, 5) == 24) { 2774 } else if (instr->Bits(16, 5) == 24) {
2773 // Format(instr, "fcvtzds 'rd, 'vn"); 2775 // Format(instr, "fcvtzds'sf 'rd, 'vn");
2774 const double vn_val = bit_cast<double, int64_t>(get_vregisterd(vn, 0)); 2776 const double vn_val = bit_cast<double, int64_t>(get_vregisterd(vn, 0));
2775 set_register(instr, rd, static_cast<int64_t>(vn_val), instr->RdMode()); 2777 set_register(instr, rd, static_cast<int64_t>(vn_val), instr->RdMode());
2776 } else { 2778 } else {
2777 UnimplementedInstruction(instr); 2779 UnimplementedInstruction(instr);
2778 } 2780 }
2779 } 2781 }
2780 2782
2781 2783
2782 void Simulator::DecodeFPOneSource(Instr* instr) { 2784 void Simulator::DecodeFPOneSource(Instr* instr) {
2783 const int opc = instr->Bits(15, 6); 2785 const int opc = instr->Bits(15, 6);
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3139 set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception)); 3141 set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception));
3140 set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace)); 3142 set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace));
3141 buf->Longjmp(); 3143 buf->Longjmp();
3142 } 3144 }
3143 3145
3144 } // namespace dart 3146 } // namespace dart
3145 3147
3146 #endif // !defined(HOST_ARCH_ARM64) 3148 #endif // !defined(HOST_ARCH_ARM64)
3147 3149
3148 #endif // defined TARGET_ARCH_ARM64 3150 #endif // defined TARGET_ARCH_ARM64
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