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Side by Side Diff: src/compiler/ia32/instruction-codes-ia32.h

Issue 616833002: [turbofan] ia32 lea multiplication matching (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
43 V(SSEUint32ToFloat64) \ 43 V(SSEUint32ToFloat64) \
44 V(IA32Movsxbl) \ 44 V(IA32Movsxbl) \
45 V(IA32Movzxbl) \ 45 V(IA32Movzxbl) \
46 V(IA32Movb) \ 46 V(IA32Movb) \
47 V(IA32Movsxwl) \ 47 V(IA32Movsxwl) \
48 V(IA32Movzxwl) \ 48 V(IA32Movzxwl) \
49 V(IA32Movw) \ 49 V(IA32Movw) \
50 V(IA32Movl) \ 50 V(IA32Movl) \
51 V(IA32Movss) \ 51 V(IA32Movss) \
52 V(IA32Movsd) \ 52 V(IA32Movsd) \
53 V(IA32Lea) \
53 V(IA32Push) \ 54 V(IA32Push) \
54 V(IA32StoreWriteBarrier) 55 V(IA32StoreWriteBarrier)
55 56
56 57
57 // Addressing modes represent the "shape" of inputs to an instruction. 58 // Addressing modes represent the "shape" of inputs to an instruction.
58 // Many instructions support multiple addressing modes. Addressing modes 59 // Many instructions support multiple addressing modes. Addressing modes
59 // are encoded into the InstructionCode of the instruction and tell the 60 // are encoded into the InstructionCode of the instruction and tell the
60 // code generator after register allocation which assembler method to call. 61 // code generator after register allocation which assembler method to call.
61 // 62 //
62 // We use the following local notation for addressing modes: 63 // We use the following local notation for addressing modes:
(...skipping 22 matching lines...) Expand all
85 V(M2I) /* [ %r2*2 + K] */ \ 86 V(M2I) /* [ %r2*2 + K] */ \
86 V(M4I) /* [ %r2*4 + K] */ \ 87 V(M4I) /* [ %r2*4 + K] */ \
87 V(M8I) /* [ %r2*8 + K] */ \ 88 V(M8I) /* [ %r2*8 + K] */ \
88 V(MI) /* [ K] */ 89 V(MI) /* [ K] */
89 90
90 } // namespace compiler 91 } // namespace compiler
91 } // namespace internal 92 } // namespace internal
92 } // namespace v8 93 } // namespace v8
93 94
94 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 95 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
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