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Side by Side Diff: runtime/vm/assembler_arm.cc

Issue 616223005: Adds back arm ldrex strex. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 2 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
(...skipping 551 matching lines...) Expand 10 before | Expand all | Expand 10 after
562 EmitMultiMemOp(cond, am, false, base, regs); 562 EmitMultiMemOp(cond, am, false, base, regs);
563 if (TargetCPUFeatures::arm_version() == ARMv5TE) { 563 if (TargetCPUFeatures::arm_version() == ARMv5TE) {
564 // On ARMv5, touching a "banked" register after an stm gives undefined 564 // On ARMv5, touching a "banked" register after an stm gives undefined
565 // behavior, so we just add a nop here to make that case easy to avoid. 565 // behavior, so we just add a nop here to make that case easy to avoid.
566 nop(); 566 nop();
567 } 567 }
568 } 568 }
569 569
570 570
571 void Assembler::ldrex(Register rt, Register rn, Condition cond) { 571 void Assembler::ldrex(Register rt, Register rn, Condition cond) {
572 ASSERT(TargetCPUFeatures::arm_version() != ARMv5TE);
572 ASSERT(rn != kNoRegister); 573 ASSERT(rn != kNoRegister);
573 ASSERT(rt != kNoRegister); 574 ASSERT(rt != kNoRegister);
574 ASSERT(cond != kNoCondition); 575 ASSERT(cond != kNoCondition);
575 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 576 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
576 B24 | 577 B24 |
577 B23 | 578 B23 |
578 L | 579 L |
579 (static_cast<int32_t>(rn) << kLdExRnShift) | 580 (static_cast<int32_t>(rn) << kLdExRnShift) |
580 (static_cast<int32_t>(rt) << kLdExRtShift) | 581 (static_cast<int32_t>(rt) << kLdExRtShift) |
581 B11 | B10 | B9 | B8 | B7 | B4 | B3 | B2 | B1 | B0; 582 B11 | B10 | B9 | B8 | B7 | B4 | B3 | B2 | B1 | B0;
582 Emit(encoding); 583 Emit(encoding);
583 } 584 }
584 585
585 586
586 void Assembler::strex(Register rd, Register rt, Register rn, Condition cond) { 587 void Assembler::strex(Register rd, Register rt, Register rn, Condition cond) {
588 ASSERT(TargetCPUFeatures::arm_version() != ARMv5TE);
587 ASSERT(rn != kNoRegister); 589 ASSERT(rn != kNoRegister);
588 ASSERT(rd != kNoRegister); 590 ASSERT(rd != kNoRegister);
589 ASSERT(rt != kNoRegister); 591 ASSERT(rt != kNoRegister);
590 ASSERT(cond != kNoCondition); 592 ASSERT(cond != kNoCondition);
591 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 593 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
592 B24 | 594 B24 |
593 B23 | 595 B23 |
594 (static_cast<int32_t>(rn) << kStrExRnShift) | 596 (static_cast<int32_t>(rn) << kStrExRnShift) |
595 (static_cast<int32_t>(rd) << kStrExRdShift) | 597 (static_cast<int32_t>(rd) << kStrExRdShift) |
596 B11 | B10 | B9 | B8 | B7 | B4 | 598 B11 | B10 | B9 | B8 | B7 | B4 |
597 (static_cast<int32_t>(rt) << kStrExRtShift); 599 (static_cast<int32_t>(rt) << kStrExRtShift);
598 Emit(encoding); 600 Emit(encoding);
599 } 601 }
600 602
601 603
602 void Assembler::clrex() { 604 void Assembler::clrex() {
605 ASSERT(TargetCPUFeatures::arm_version() != ARMv5TE);
603 int32_t encoding = (kSpecialCondition << kConditionShift) | 606 int32_t encoding = (kSpecialCondition << kConditionShift) |
604 B26 | B24 | B22 | B21 | B20 | (0xff << 12) | B4 | 0xf; 607 B26 | B24 | B22 | B21 | B20 | (0xff << 12) | B4 | 0xf;
605 Emit(encoding); 608 Emit(encoding);
606 } 609 }
607 610
608 611
609 void Assembler::nop(Condition cond) { 612 void Assembler::nop(Condition cond) {
610 ASSERT(cond != kNoCondition); 613 ASSERT(cond != kNoCondition);
611 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 614 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
612 B25 | B24 | B21 | (0xf << 12); 615 B25 | B24 | B21 | (0xf << 12);
(...skipping 2783 matching lines...) Expand 10 before | Expand all | Expand 10 after
3396 3399
3397 3400
3398 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3401 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3399 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3402 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3400 return fpu_reg_names[reg]; 3403 return fpu_reg_names[reg];
3401 } 3404 }
3402 3405
3403 } // namespace dart 3406 } // namespace dart
3404 3407
3405 #endif // defined TARGET_ARCH_ARM 3408 #endif // defined TARGET_ARCH_ARM
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