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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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61 V(X64Movzxbl) \ | 61 V(X64Movzxbl) \ |
62 V(X64Movb) \ | 62 V(X64Movb) \ |
63 V(X64Movsxwl) \ | 63 V(X64Movsxwl) \ |
64 V(X64Movzxwl) \ | 64 V(X64Movzxwl) \ |
65 V(X64Movw) \ | 65 V(X64Movw) \ |
66 V(X64Movl) \ | 66 V(X64Movl) \ |
67 V(X64Movsxlq) \ | 67 V(X64Movsxlq) \ |
68 V(X64Movq) \ | 68 V(X64Movq) \ |
69 V(X64Movsd) \ | 69 V(X64Movsd) \ |
70 V(X64Movss) \ | 70 V(X64Movss) \ |
| 71 V(X64Lea32) \ |
| 72 V(X64Lea) \ |
71 V(X64Push) \ | 73 V(X64Push) \ |
72 V(X64StoreWriteBarrier) | 74 V(X64StoreWriteBarrier) |
73 | 75 |
74 | 76 |
75 // Addressing modes represent the "shape" of inputs to an instruction. | 77 // Addressing modes represent the "shape" of inputs to an instruction. |
76 // Many instructions support multiple addressing modes. Addressing modes | 78 // Many instructions support multiple addressing modes. Addressing modes |
77 // are encoded into the InstructionCode of the instruction and tell the | 79 // are encoded into the InstructionCode of the instruction and tell the |
78 // code generator after register allocation which assembler method to call. | 80 // code generator after register allocation which assembler method to call. |
79 // | 81 // |
80 // We use the following local notation for addressing modes: | 82 // We use the following local notation for addressing modes: |
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102 V(M1I) /* [ %r2*1 + K] */ \ | 104 V(M1I) /* [ %r2*1 + K] */ \ |
103 V(M2I) /* [ %r2*2 + K] */ \ | 105 V(M2I) /* [ %r2*2 + K] */ \ |
104 V(M4I) /* [ %r2*4 + K] */ \ | 106 V(M4I) /* [ %r2*4 + K] */ \ |
105 V(M8I) /* [ %r2*8 + K] */ | 107 V(M8I) /* [ %r2*8 + K] */ |
106 | 108 |
107 } // namespace compiler | 109 } // namespace compiler |
108 } // namespace internal | 110 } // namespace internal |
109 } // namespace v8 | 111 } // namespace v8 |
110 | 112 |
111 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 113 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
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