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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32-unittest.cc

Issue 615393002: Move unit tests to test/unittests. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE Created 6 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "src/compiler/instruction-selector-unittest.h"
6
7 namespace v8 {
8 namespace internal {
9 namespace compiler {
10
11 namespace {
12
13 // Immediates (random subset).
14 static const int32_t kImmediates[] = {
15 kMinInt, -42, -1, 0, 1, 2, 3, 4, 5,
16 6, 7, 8, 16, 42, 0xff, 0xffff, 0x0f0f0f0f, kMaxInt};
17
18 } // namespace
19
20
21 TEST_F(InstructionSelectorTest, Int32AddWithParameter) {
22 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
23 m.Return(m.Int32Add(m.Parameter(0), m.Parameter(1)));
24 Stream s = m.Build();
25 ASSERT_EQ(1U, s.size());
26 EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
27 }
28
29
30 TEST_F(InstructionSelectorTest, Int32AddWithImmediate) {
31 TRACED_FOREACH(int32_t, imm, kImmediates) {
32 {
33 StreamBuilder m(this, kMachInt32, kMachInt32);
34 m.Return(m.Int32Add(m.Parameter(0), m.Int32Constant(imm)));
35 Stream s = m.Build();
36 ASSERT_EQ(1U, s.size());
37 EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
38 ASSERT_EQ(2U, s[0]->InputCount());
39 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
40 }
41 {
42 StreamBuilder m(this, kMachInt32, kMachInt32);
43 m.Return(m.Int32Add(m.Int32Constant(imm), m.Parameter(0)));
44 Stream s = m.Build();
45 ASSERT_EQ(1U, s.size());
46 EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
47 ASSERT_EQ(2U, s[0]->InputCount());
48 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
49 }
50 }
51 }
52
53
54 TEST_F(InstructionSelectorTest, Int32SubWithParameter) {
55 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
56 m.Return(m.Int32Sub(m.Parameter(0), m.Parameter(1)));
57 Stream s = m.Build();
58 ASSERT_EQ(1U, s.size());
59 EXPECT_EQ(kIA32Sub, s[0]->arch_opcode());
60 EXPECT_EQ(1U, s[0]->OutputCount());
61 }
62
63
64 TEST_F(InstructionSelectorTest, Int32SubWithImmediate) {
65 TRACED_FOREACH(int32_t, imm, kImmediates) {
66 StreamBuilder m(this, kMachInt32, kMachInt32);
67 m.Return(m.Int32Sub(m.Parameter(0), m.Int32Constant(imm)));
68 Stream s = m.Build();
69 ASSERT_EQ(1U, s.size());
70 EXPECT_EQ(kIA32Sub, s[0]->arch_opcode());
71 ASSERT_EQ(2U, s[0]->InputCount());
72 EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
73 }
74 }
75
76
77 // -----------------------------------------------------------------------------
78 // Conversions.
79
80
81 TEST_F(InstructionSelectorTest, ChangeFloat32ToFloat64WithParameter) {
82 StreamBuilder m(this, kMachFloat32, kMachFloat64);
83 m.Return(m.ChangeFloat32ToFloat64(m.Parameter(0)));
84 Stream s = m.Build();
85 ASSERT_EQ(1U, s.size());
86 EXPECT_EQ(kSSECvtss2sd, s[0]->arch_opcode());
87 EXPECT_EQ(1U, s[0]->InputCount());
88 EXPECT_EQ(1U, s[0]->OutputCount());
89 }
90
91
92 TEST_F(InstructionSelectorTest, TruncateFloat64ToFloat32WithParameter) {
93 StreamBuilder m(this, kMachFloat64, kMachFloat32);
94 m.Return(m.TruncateFloat64ToFloat32(m.Parameter(0)));
95 Stream s = m.Build();
96 ASSERT_EQ(1U, s.size());
97 EXPECT_EQ(kSSECvtsd2ss, s[0]->arch_opcode());
98 EXPECT_EQ(1U, s[0]->InputCount());
99 EXPECT_EQ(1U, s[0]->OutputCount());
100 }
101
102
103 // -----------------------------------------------------------------------------
104 // Better left operand for commutative binops
105
106 TEST_F(InstructionSelectorTest, BetterLeftOperandTestAddBinop) {
107 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
108 Node* param1 = m.Parameter(0);
109 Node* param2 = m.Parameter(1);
110 Node* add = m.Int32Add(param1, param2);
111 m.Return(m.Int32Add(add, param1));
112 Stream s = m.Build();
113 ASSERT_EQ(2U, s.size());
114 EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
115 ASSERT_EQ(2U, s[0]->InputCount());
116 ASSERT_TRUE(s[0]->InputAt(0)->IsUnallocated());
117 EXPECT_EQ(param2->id(), s.ToVreg(s[0]->InputAt(0)));
118 }
119
120
121 TEST_F(InstructionSelectorTest, BetterLeftOperandTestMulBinop) {
122 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
123 Node* param1 = m.Parameter(0);
124 Node* param2 = m.Parameter(1);
125 Node* mul = m.Int32Mul(param1, param2);
126 m.Return(m.Int32Mul(mul, param1));
127 Stream s = m.Build();
128 ASSERT_EQ(2U, s.size());
129 EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
130 ASSERT_EQ(2U, s[0]->InputCount());
131 ASSERT_TRUE(s[0]->InputAt(0)->IsUnallocated());
132 EXPECT_EQ(param2->id(), s.ToVreg(s[0]->InputAt(0)));
133 }
134
135
136 // -----------------------------------------------------------------------------
137 // Conversions.
138
139 TEST_F(InstructionSelectorTest, ChangeUint32ToFloat64WithParameter) {
140 StreamBuilder m(this, kMachFloat64, kMachUint32);
141 m.Return(m.ChangeUint32ToFloat64(m.Parameter(0)));
142 Stream s = m.Build();
143 ASSERT_EQ(1U, s.size());
144 EXPECT_EQ(kSSEUint32ToFloat64, s[0]->arch_opcode());
145 }
146
147
148 // -----------------------------------------------------------------------------
149 // Loads and stores
150
151 namespace {
152
153 struct MemoryAccess {
154 MachineType type;
155 ArchOpcode load_opcode;
156 ArchOpcode store_opcode;
157 };
158
159
160 std::ostream& operator<<(std::ostream& os, const MemoryAccess& memacc) {
161 return os << memacc.type;
162 }
163
164
165 static const MemoryAccess kMemoryAccesses[] = {
166 {kMachInt8, kIA32Movsxbl, kIA32Movb},
167 {kMachUint8, kIA32Movzxbl, kIA32Movb},
168 {kMachInt16, kIA32Movsxwl, kIA32Movw},
169 {kMachUint16, kIA32Movzxwl, kIA32Movw},
170 {kMachInt32, kIA32Movl, kIA32Movl},
171 {kMachUint32, kIA32Movl, kIA32Movl},
172 {kMachFloat32, kIA32Movss, kIA32Movss},
173 {kMachFloat64, kIA32Movsd, kIA32Movsd}};
174
175 } // namespace
176
177
178 typedef InstructionSelectorTestWithParam<MemoryAccess>
179 InstructionSelectorMemoryAccessTest;
180
181
182 TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
183 const MemoryAccess memacc = GetParam();
184 StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32);
185 m.Return(m.Load(memacc.type, m.Parameter(0), m.Parameter(1)));
186 Stream s = m.Build();
187 ASSERT_EQ(1U, s.size());
188 EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
189 EXPECT_EQ(2U, s[0]->InputCount());
190 EXPECT_EQ(1U, s[0]->OutputCount());
191 }
192
193
194 TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateBase) {
195 const MemoryAccess memacc = GetParam();
196 TRACED_FOREACH(int32_t, base, kImmediates) {
197 StreamBuilder m(this, memacc.type, kMachPtr);
198 m.Return(m.Load(memacc.type, m.Int32Constant(base), m.Parameter(0)));
199 Stream s = m.Build();
200 ASSERT_EQ(1U, s.size());
201 EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
202 if (base == 0) {
203 ASSERT_EQ(1U, s[0]->InputCount());
204 } else {
205 ASSERT_EQ(2U, s[0]->InputCount());
206 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
207 EXPECT_EQ(base, s.ToInt32(s[0]->InputAt(1)));
208 }
209 EXPECT_EQ(1U, s[0]->OutputCount());
210 }
211 }
212
213
214 TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateIndex) {
215 const MemoryAccess memacc = GetParam();
216 TRACED_FOREACH(int32_t, index, kImmediates) {
217 StreamBuilder m(this, memacc.type, kMachPtr);
218 m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
219 Stream s = m.Build();
220 ASSERT_EQ(1U, s.size());
221 EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
222 if (index == 0) {
223 ASSERT_EQ(1U, s[0]->InputCount());
224 } else {
225 ASSERT_EQ(2U, s[0]->InputCount());
226 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
227 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
228 }
229 EXPECT_EQ(1U, s[0]->OutputCount());
230 }
231 }
232
233
234 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
235 const MemoryAccess memacc = GetParam();
236 StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
237 m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2));
238 m.Return(m.Int32Constant(0));
239 Stream s = m.Build();
240 ASSERT_EQ(1U, s.size());
241 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
242 EXPECT_EQ(3U, s[0]->InputCount());
243 EXPECT_EQ(0U, s[0]->OutputCount());
244 }
245
246
247 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateBase) {
248 const MemoryAccess memacc = GetParam();
249 TRACED_FOREACH(int32_t, base, kImmediates) {
250 StreamBuilder m(this, kMachInt32, kMachInt32, memacc.type);
251 m.Store(memacc.type, m.Int32Constant(base), m.Parameter(0), m.Parameter(1));
252 m.Return(m.Int32Constant(0));
253 Stream s = m.Build();
254 ASSERT_EQ(1U, s.size());
255 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
256 if (base == 0) {
257 ASSERT_EQ(2U, s[0]->InputCount());
258 } else {
259 ASSERT_EQ(3U, s[0]->InputCount());
260 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
261 EXPECT_EQ(base, s.ToInt32(s[0]->InputAt(1)));
262 }
263 EXPECT_EQ(0U, s[0]->OutputCount());
264 }
265 }
266
267
268 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
269 const MemoryAccess memacc = GetParam();
270 TRACED_FOREACH(int32_t, index, kImmediates) {
271 StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
272 m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index),
273 m.Parameter(1));
274 m.Return(m.Int32Constant(0));
275 Stream s = m.Build();
276 ASSERT_EQ(1U, s.size());
277 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
278 if (index == 0) {
279 ASSERT_EQ(2U, s[0]->InputCount());
280 } else {
281 ASSERT_EQ(3U, s[0]->InputCount());
282 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
283 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
284 }
285 EXPECT_EQ(0U, s[0]->OutputCount());
286 }
287 }
288
289
290 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
291 InstructionSelectorMemoryAccessTest,
292 ::testing::ValuesIn(kMemoryAccesses));
293
294
295 // -----------------------------------------------------------------------------
296 // AddressingMode for loads and stores.
297
298 class AddressingModeUnitTest : public InstructionSelectorTest {
299 public:
300 AddressingModeUnitTest() : m(NULL) { Reset(); }
301 ~AddressingModeUnitTest() { delete m; }
302
303 void Run(Node* base, Node* index, AddressingMode mode) {
304 Node* load = m->Load(kMachInt32, base, index);
305 m->Store(kMachInt32, base, index, load);
306 m->Return(m->Int32Constant(0));
307 Stream s = m->Build();
308 ASSERT_EQ(2U, s.size());
309 EXPECT_EQ(mode, s[0]->addressing_mode());
310 EXPECT_EQ(mode, s[1]->addressing_mode());
311 }
312
313 Node* zero;
314 Node* null_ptr;
315 Node* non_zero;
316 Node* base_reg; // opaque value to generate base as register
317 Node* index_reg; // opaque value to generate index as register
318 Node* scales[4];
319 StreamBuilder* m;
320
321 void Reset() {
322 delete m;
323 m = new StreamBuilder(this, kMachInt32, kMachInt32, kMachInt32);
324 zero = m->Int32Constant(0);
325 null_ptr = m->Int32Constant(0);
326 non_zero = m->Int32Constant(127);
327 base_reg = m->Parameter(0);
328 index_reg = m->Parameter(0);
329
330 scales[0] = m->Int32Constant(1);
331 scales[1] = m->Int32Constant(2);
332 scales[2] = m->Int32Constant(4);
333 scales[3] = m->Int32Constant(8);
334 }
335 };
336
337
338 TEST_F(AddressingModeUnitTest, AddressingMode_MR) {
339 Node* base = base_reg;
340 Node* index = zero;
341 Run(base, index, kMode_MR);
342 }
343
344
345 TEST_F(AddressingModeUnitTest, AddressingMode_MRI) {
346 Node* base = base_reg;
347 Node* index = non_zero;
348 Run(base, index, kMode_MRI);
349 }
350
351
352 TEST_F(AddressingModeUnitTest, AddressingMode_MR1) {
353 Node* base = base_reg;
354 Node* index = index_reg;
355 Run(base, index, kMode_MR1);
356 }
357
358
359 TEST_F(AddressingModeUnitTest, AddressingMode_MRN) {
360 AddressingMode expected[] = {kMode_MR1, kMode_MR2, kMode_MR4, kMode_MR8};
361 for (size_t i = 0; i < arraysize(scales); ++i) {
362 Reset();
363 Node* base = base_reg;
364 Node* index = m->Int32Mul(index_reg, scales[i]);
365 Run(base, index, expected[i]);
366 }
367 }
368
369
370 TEST_F(AddressingModeUnitTest, AddressingMode_MR1I) {
371 Node* base = base_reg;
372 Node* index = m->Int32Add(index_reg, non_zero);
373 Run(base, index, kMode_MR1I);
374 }
375
376
377 TEST_F(AddressingModeUnitTest, AddressingMode_MRNI) {
378 AddressingMode expected[] = {kMode_MR1I, kMode_MR2I, kMode_MR4I, kMode_MR8I};
379 for (size_t i = 0; i < arraysize(scales); ++i) {
380 Reset();
381 Node* base = base_reg;
382 Node* index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
383 Run(base, index, expected[i]);
384 }
385 }
386
387
388 TEST_F(AddressingModeUnitTest, AddressingMode_M1) {
389 Node* base = null_ptr;
390 Node* index = index_reg;
391 Run(base, index, kMode_M1);
392 }
393
394
395 TEST_F(AddressingModeUnitTest, AddressingMode_MN) {
396 AddressingMode expected[] = {kMode_M1, kMode_M2, kMode_M4, kMode_M8};
397 for (size_t i = 0; i < arraysize(scales); ++i) {
398 Reset();
399 Node* base = null_ptr;
400 Node* index = m->Int32Mul(index_reg, scales[i]);
401 Run(base, index, expected[i]);
402 }
403 }
404
405
406 TEST_F(AddressingModeUnitTest, AddressingMode_M1I) {
407 Node* base = null_ptr;
408 Node* index = m->Int32Add(index_reg, non_zero);
409 Run(base, index, kMode_M1I);
410 }
411
412
413 TEST_F(AddressingModeUnitTest, AddressingMode_MNI) {
414 AddressingMode expected[] = {kMode_M1I, kMode_M2I, kMode_M4I, kMode_M8I};
415 for (size_t i = 0; i < arraysize(scales); ++i) {
416 Reset();
417 Node* base = null_ptr;
418 Node* index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
419 Run(base, index, expected[i]);
420 }
421 }
422
423
424 TEST_F(AddressingModeUnitTest, AddressingMode_MI) {
425 Node* bases[] = {null_ptr, non_zero};
426 Node* indices[] = {zero, non_zero};
427 for (size_t i = 0; i < arraysize(bases); ++i) {
428 for (size_t j = 0; j < arraysize(indices); ++j) {
429 Reset();
430 Node* base = bases[i];
431 Node* index = indices[j];
432 Run(base, index, kMode_MI);
433 }
434 }
435 }
436
437
438 // -----------------------------------------------------------------------------
439 // Multiplication.
440
441 namespace {
442
443 struct MultParam {
444 int value;
445 bool lea_expected;
446 AddressingMode addressing_mode;
447 };
448
449
450 std::ostream& operator<<(std::ostream& os, const MultParam& m) {
451 return os << m.value << "." << m.lea_expected << "." << m.addressing_mode;
452 }
453
454
455 const MultParam kMultParams[] = {{-1, false, kMode_None},
456 {0, false, kMode_None},
457 {1, true, kMode_M1},
458 {2, true, kMode_M2},
459 {3, true, kMode_MR2},
460 {4, true, kMode_M4},
461 {5, true, kMode_MR4},
462 {6, false, kMode_None},
463 {7, false, kMode_None},
464 {8, true, kMode_M8},
465 {9, true, kMode_MR8},
466 {10, false, kMode_None},
467 {11, false, kMode_None}};
468
469 } // namespace
470
471
472 typedef InstructionSelectorTestWithParam<MultParam> InstructionSelectorMultTest;
473
474
475 static unsigned InputCountForLea(AddressingMode mode) {
476 switch (mode) {
477 case kMode_MR1:
478 case kMode_MR2:
479 case kMode_MR4:
480 case kMode_MR8:
481 return 2U;
482 case kMode_M1:
483 case kMode_M2:
484 case kMode_M4:
485 case kMode_M8:
486 return 1U;
487 default:
488 UNREACHABLE();
489 return 0U;
490 }
491 }
492
493
494 TEST_P(InstructionSelectorMultTest, Mult32) {
495 const MultParam m_param = GetParam();
496 StreamBuilder m(this, kMachInt32, kMachInt32);
497 Node* param = m.Parameter(0);
498 Node* mult = m.Int32Mul(param, m.Int32Constant(m_param.value));
499 m.Return(mult);
500 Stream s = m.Build();
501 ASSERT_EQ(1U, s.size());
502 EXPECT_EQ(m_param.addressing_mode, s[0]->addressing_mode());
503 if (m_param.lea_expected) {
504 EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
505 ASSERT_EQ(InputCountForLea(s[0]->addressing_mode()), s[0]->InputCount());
506 } else {
507 EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
508 ASSERT_EQ(2U, s[0]->InputCount());
509 }
510 EXPECT_EQ(param->id(), s.ToVreg(s[0]->InputAt(0)));
511 }
512
513
514 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorMultTest,
515 ::testing::ValuesIn(kMultParams));
516
517 } // namespace compiler
518 } // namespace internal
519 } // namespace v8
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