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Unified Diff: src/assembler_ia32.cpp

Issue 613483002: Change some explicit type checks into using helper functions. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: format Created 6 years, 3 months ago
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Index: src/assembler_ia32.cpp
diff --git a/src/assembler_ia32.cpp b/src/assembler_ia32.cpp
index 34e7a4258f0c0bb25d4db8560052cf5b2dc6d157..494b72f20ab209e77aefded8819fb24dedba7cb3 100644
--- a/src/assembler_ia32.cpp
+++ b/src/assembler_ia32.cpp
@@ -33,7 +33,7 @@ public:
DirectCallRelocation(Kind, Sym);
}
- void Process(const MemoryRegion &region, intptr_t position) {
+ void Process(const MemoryRegion &region, intptr_t position) override {
// Direct calls are relative to the following instruction on x86.
int32_t pointer = region.Load<int32_t>(position);
int32_t delta = region.start() + position + sizeof(int32_t);
@@ -355,7 +355,7 @@ void AssemblerX86::movq(XmmRegister dst, const Address &src) {
void AssemblerX86::addss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x58);
EmitXmmRegisterOperand(dst, src);
@@ -363,7 +363,7 @@ void AssemblerX86::addss(Type Ty, XmmRegister dst, XmmRegister src) {
void AssemblerX86::addss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x58);
EmitOperand(dst, src);
@@ -371,7 +371,7 @@ void AssemblerX86::addss(Type Ty, XmmRegister dst, const Address &src) {
void AssemblerX86::subss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x5C);
EmitXmmRegisterOperand(dst, src);
@@ -379,7 +379,7 @@ void AssemblerX86::subss(Type Ty, XmmRegister dst, XmmRegister src) {
void AssemblerX86::subss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x5C);
EmitOperand(dst, src);
@@ -387,7 +387,7 @@ void AssemblerX86::subss(Type Ty, XmmRegister dst, const Address &src) {
void AssemblerX86::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x59);
EmitXmmRegisterOperand(dst, src);
@@ -395,7 +395,7 @@ void AssemblerX86::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
void AssemblerX86::mulss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x59);
EmitOperand(dst, src);
@@ -403,7 +403,7 @@ void AssemblerX86::mulss(Type Ty, XmmRegister dst, const Address &src) {
void AssemblerX86::divss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x5E);
EmitXmmRegisterOperand(dst, src);
@@ -411,7 +411,7 @@ void AssemblerX86::divss(Type Ty, XmmRegister dst, XmmRegister src) {
void AssemblerX86::divss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x5E);
EmitOperand(dst, src);
@@ -478,7 +478,7 @@ void AssemblerX86::padd(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitUint8(0xFC);
} else if (Ty == IceType_i16) {
EmitUint8(0xFD);
@@ -492,7 +492,7 @@ void AssemblerX86::padd(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitUint8(0xFC);
} else if (Ty == IceType_i16) {
EmitUint8(0xFD);
@@ -570,7 +570,7 @@ void AssemblerX86::psub(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitUint8(0xF8);
} else if (Ty == IceType_i16) {
EmitUint8(0xF9);
@@ -584,7 +584,7 @@ void AssemblerX86::psub(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x66);
EmitUint8(0x0F);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitUint8(0xF8);
} else if (Ty == IceType_i16) {
EmitUint8(0xF9);
@@ -965,7 +965,7 @@ void AssemblerX86::movmskps(GPRRegister dst, XmmRegister src) {
void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x51);
EmitOperand(dst, src);
@@ -973,7 +973,7 @@ void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- EmitUint8(Ty == IceType_f32 ? 0xF3 : 0xF2);
+ EmitUint8(isFloat32Assuming32Or64(Ty) ? 0xF3 : 0xF2);
EmitUint8(0x0F);
EmitUint8(0x51);
EmitXmmRegisterOperand(dst, src);
@@ -1199,7 +1199,7 @@ void AssemblerX86::And(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedType(Ty))
EmitUint8(0x22);
else
EmitUint8(0x23);
@@ -1210,7 +1210,7 @@ void AssemblerX86::And(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedType(Ty))
EmitUint8(0x22);
else
EmitUint8(0x23);
@@ -1219,7 +1219,7 @@ void AssemblerX86::And(Type Ty, GPRRegister dst, const Address &address) {
void AssemblerX86::And(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedType(Ty)) {
EmitComplexI8(4, Operand(dst), imm);
return;
}
@@ -1232,7 +1232,7 @@ void AssemblerX86::Or(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedType(Ty))
EmitUint8(0x0A);
else
EmitUint8(0x0B);
@@ -1243,7 +1243,7 @@ void AssemblerX86::Or(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedType(Ty))
EmitUint8(0x0A);
else
EmitUint8(0x0B);
@@ -1252,7 +1252,7 @@ void AssemblerX86::Or(Type Ty, GPRRegister dst, const Address &address) {
void AssemblerX86::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedType(Ty)) {
EmitComplexI8(1, Operand(dst), imm);
return;
}
@@ -1265,7 +1265,7 @@ void AssemblerX86::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedType(Ty))
EmitUint8(0x32);
else
EmitUint8(0x33);
@@ -1276,7 +1276,7 @@ void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedType(Ty))
EmitUint8(0x32);
else
EmitUint8(0x33);
@@ -1285,7 +1285,7 @@ void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Address &address) {
void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedType(Ty)) {
EmitComplexI8(6, Operand(dst), imm);
return;
}
@@ -1298,7 +1298,7 @@ void AssemblerX86::add(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x02);
else
EmitUint8(0x03);
@@ -1309,7 +1309,7 @@ void AssemblerX86::add(Type Ty, GPRRegister reg, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x02);
else
EmitUint8(0x03);
@@ -1318,7 +1318,7 @@ void AssemblerX86::add(Type Ty, GPRRegister reg, const Address &address) {
void AssemblerX86::add(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitComplexI8(0, Operand(reg), imm);
return;
}
@@ -1331,7 +1331,7 @@ void AssemblerX86::adc(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x12);
else
EmitUint8(0x13);
@@ -1342,7 +1342,7 @@ void AssemblerX86::adc(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x12);
else
EmitUint8(0x13);
@@ -1351,7 +1351,7 @@ void AssemblerX86::adc(Type Ty, GPRRegister dst, const Address &address) {
void AssemblerX86::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitComplexI8(2, Operand(reg), imm);
return;
}
@@ -1364,7 +1364,7 @@ void AssemblerX86::sub(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x2A);
else
EmitUint8(0x2B);
@@ -1375,7 +1375,7 @@ void AssemblerX86::sub(Type Ty, GPRRegister reg, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x2A);
else
EmitUint8(0x2B);
@@ -1384,7 +1384,7 @@ void AssemblerX86::sub(Type Ty, GPRRegister reg, const Address &address) {
void AssemblerX86::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitComplexI8(5, Operand(reg), imm);
return;
}
@@ -1397,7 +1397,7 @@ void AssemblerX86::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x1A);
else
EmitUint8(0x1B);
@@ -1408,7 +1408,7 @@ void AssemblerX86::sbb(Type Ty, GPRRegister dst, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x1A);
else
EmitUint8(0x1B);
@@ -1417,7 +1417,7 @@ void AssemblerX86::sbb(Type Ty, GPRRegister dst, const Address &address) {
void AssemblerX86::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
- if (Ty == IceType_i8 || Ty == IceType_i1) {
+ if (isByteSizedArithType(Ty)) {
EmitComplexI8(3, Operand(reg), imm);
return;
}
@@ -1447,7 +1447,7 @@ void AssemblerX86::div(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1458,7 +1458,7 @@ void AssemblerX86::div(Type Ty, const Address &addr) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1469,7 +1469,7 @@ void AssemblerX86::idiv(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1480,7 +1480,7 @@ void AssemblerX86::idiv(Type Ty, const Address &addr) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1524,7 +1524,7 @@ void AssemblerX86::mul(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1535,7 +1535,7 @@ void AssemblerX86::mul(Type Ty, const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1648,7 +1648,7 @@ void AssemblerX86::neg(Type Ty, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1659,7 +1659,7 @@ void AssemblerX86::neg(Type Ty, const Address &addr) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xF6);
else
EmitUint8(0xF7);
@@ -1898,7 +1898,7 @@ void AssemblerX86::cmpxchg(Type Ty, const Address &address, GPRRegister reg) {
if (Ty == IceType_i16)
EmitOperandSizeOverride();
EmitUint8(0x0F);
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xB0);
else
EmitUint8(0xB1);
@@ -1917,7 +1917,7 @@ void AssemblerX86::xadd(Type Ty, const Address &addr, GPRRegister reg) {
if (Ty == IceType_i16)
EmitOperandSizeOverride();
EmitUint8(0x0F);
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0xC0);
else
EmitUint8(0xC1);
@@ -1928,7 +1928,7 @@ void AssemblerX86::xchg(Type Ty, const Address &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
if (Ty == IceType_i16)
EmitOperandSizeOverride();
- if (Ty == IceType_i8 || Ty == IceType_i1)
+ if (isByteSizedArithType(Ty))
EmitUint8(0x86);
else
EmitUint8(0x87);
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